2 * c67x00-sched.c: Cypress C67X00 USB Host Controller Driver - TD scheduling
4 * Copyright (C) 2006-2008 Barco N.V.
5 * Derived from the Cypress cy7c67200/300 ezusb linux driver and
6 * based on multiple host controller drivers inside the linux kernel.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
24 #include <linux/kthread.h>
25 #include <linux/slab.h>
28 #include "c67x00-hcd.h"
31 * These are the stages for a control urb, they are kept
32 * in both urb->interval and td->privdata.
36 #define STATUS_STAGE 2
38 /* -------------------------------------------------------------------------- */
41 * struct c67x00_ep_data: Host endpoint data structure
43 struct c67x00_ep_data
{
44 struct list_head queue
;
45 struct list_head node
;
46 struct usb_host_endpoint
*hep
;
47 struct usb_device
*dev
;
48 u16 next_frame
; /* For int/isoc transactions */
54 * Hardware parts are little endiannes, SW in CPU endianess.
57 /* HW specific part */
58 __le16 ly_base_addr
; /* Bytes 0-1 */
59 __le16 port_length
; /* Bytes 2-3 */
60 u8 pid_ep
; /* Byte 4 */
61 u8 dev_addr
; /* Byte 5 */
62 u8 ctrl_reg
; /* Byte 6 */
63 u8 status
; /* Byte 7 */
64 u8 retry_cnt
; /* Byte 8 */
67 #define TT_ISOCHRONOUS 1
69 #define TT_INTERRUPT 3
70 u8 residue
; /* Byte 9 */
71 __le16 next_td_addr
; /* Bytes 10-11 */
73 struct list_head td_list
;
77 unsigned long privdata
;
79 /* These are needed for handling the toggle bits:
80 * an urb can be dequeued while a td is in progress
81 * after checking the td, the toggle bit might need to
83 struct c67x00_ep_data
*ep_data
;
87 struct c67x00_urb_priv
{
88 struct list_head hep_node
;
91 int cnt
; /* packet number for isoc */
93 struct c67x00_ep_data
*ep_data
;
96 #define td_udev(td) ((td)->ep_data->dev)
100 #define TD_PIDEP_OFFSET 0x04
101 #define TD_PIDEPMASK_PID 0xF0
102 #define TD_PIDEPMASK_EP 0x0F
103 #define TD_PORTLENMASK_DL 0x03FF
104 #define TD_PORTLENMASK_PN 0xC000
106 #define TD_STATUS_OFFSET 0x07
107 #define TD_STATUSMASK_ACK 0x01
108 #define TD_STATUSMASK_ERR 0x02
109 #define TD_STATUSMASK_TMOUT 0x04
110 #define TD_STATUSMASK_SEQ 0x08
111 #define TD_STATUSMASK_SETUP 0x10
112 #define TD_STATUSMASK_OVF 0x20
113 #define TD_STATUSMASK_NAK 0x40
114 #define TD_STATUSMASK_STALL 0x80
116 #define TD_ERROR_MASK (TD_STATUSMASK_ERR | TD_STATUSMASK_TMOUT | \
119 #define TD_RETRYCNT_OFFSET 0x08
120 #define TD_RETRYCNTMASK_ACT_FLG 0x10
121 #define TD_RETRYCNTMASK_TX_TYPE 0x0C
122 #define TD_RETRYCNTMASK_RTY_CNT 0x03
124 #define TD_RESIDUE_OVERFLOW 0x80
126 #define TD_PID_IN 0x90
128 /* Residue: signed 8bits, neg -> OVERFLOW, pos -> UNDERFLOW */
129 #define td_residue(td) ((__s8)(td->residue))
130 #define td_ly_base_addr(td) (__le16_to_cpu((td)->ly_base_addr))
131 #define td_port_length(td) (__le16_to_cpu((td)->port_length))
132 #define td_next_td_addr(td) (__le16_to_cpu((td)->next_td_addr))
134 #define td_active(td) ((td)->retry_cnt & TD_RETRYCNTMASK_ACT_FLG)
135 #define td_length(td) (td_port_length(td) & TD_PORTLENMASK_DL)
137 #define td_sequence_ok(td) (!td->status || \
138 (!(td->status & TD_STATUSMASK_SEQ) == \
139 !(td->ctrl_reg & SEQ_SEL)))
141 #define td_acked(td) (!td->status || \
142 (td->status & TD_STATUSMASK_ACK))
143 #define td_actual_bytes(td) (td_length(td) - td_residue(td))
145 /* -------------------------------------------------------------------------- */
148 * dbg_td - Dump the contents of the TD
150 static void dbg_td(struct c67x00_hcd
*c67x00
, struct c67x00_td
*td
, char *msg
)
152 struct device
*dev
= c67x00_hcd_dev(c67x00
);
154 dev_dbg(dev
, "### %s at 0x%04x\n", msg
, td
->td_addr
);
155 dev_dbg(dev
, "urb: 0x%p\n", td
->urb
);
156 dev_dbg(dev
, "endpoint: %4d\n", usb_pipeendpoint(td
->pipe
));
157 dev_dbg(dev
, "pipeout: %4d\n", usb_pipeout(td
->pipe
));
158 dev_dbg(dev
, "ly_base_addr: 0x%04x\n", td_ly_base_addr(td
));
159 dev_dbg(dev
, "port_length: 0x%04x\n", td_port_length(td
));
160 dev_dbg(dev
, "pid_ep: 0x%02x\n", td
->pid_ep
);
161 dev_dbg(dev
, "dev_addr: 0x%02x\n", td
->dev_addr
);
162 dev_dbg(dev
, "ctrl_reg: 0x%02x\n", td
->ctrl_reg
);
163 dev_dbg(dev
, "status: 0x%02x\n", td
->status
);
164 dev_dbg(dev
, "retry_cnt: 0x%02x\n", td
->retry_cnt
);
165 dev_dbg(dev
, "residue: 0x%02x\n", td
->residue
);
166 dev_dbg(dev
, "next_td_addr: 0x%04x\n", td_next_td_addr(td
));
167 dev_dbg(dev
, "data: %*ph\n", td_length(td
), td
->data
);
170 /* -------------------------------------------------------------------------- */
171 /* Helper functions */
173 static inline u16
c67x00_get_current_frame_number(struct c67x00_hcd
*c67x00
)
175 return c67x00_ll_husb_get_frame(c67x00
->sie
) & HOST_FRAME_MASK
;
180 * Software wraparound for framenumbers.
182 static inline u16
frame_add(u16 a
, u16 b
)
184 return (a
+ b
) & HOST_FRAME_MASK
;
188 * frame_after - is frame a after frame b
190 static inline int frame_after(u16 a
, u16 b
)
192 return ((HOST_FRAME_MASK
+ a
- b
) & HOST_FRAME_MASK
) <
193 (HOST_FRAME_MASK
/ 2);
197 * frame_after_eq - is frame a after or equal to frame b
199 static inline int frame_after_eq(u16 a
, u16 b
)
201 return ((HOST_FRAME_MASK
+ 1 + a
- b
) & HOST_FRAME_MASK
) <
202 (HOST_FRAME_MASK
/ 2);
205 /* -------------------------------------------------------------------------- */
208 * c67x00_release_urb - remove link from all tds to this urb
209 * Disconnects the urb from it's tds, so that it can be given back.
210 * pre: urb->hcpriv != NULL
212 static void c67x00_release_urb(struct c67x00_hcd
*c67x00
, struct urb
*urb
)
214 struct c67x00_td
*td
;
215 struct c67x00_urb_priv
*urbp
;
221 if (usb_pipetype(urb
->pipe
) == PIPE_ISOCHRONOUS
) {
222 c67x00
->urb_iso_count
--;
223 if (c67x00
->urb_iso_count
== 0)
224 c67x00
->max_frame_bw
= MAX_FRAME_BW_STD
;
227 /* TODO this might be not so efficient when we've got many urbs!
229 * * only clear when needed
230 * * keep a list of tds with each urbp
232 list_for_each_entry(td
, &c67x00
->td_list
, td_list
)
238 list_del(&urbp
->hep_node
);
242 /* -------------------------------------------------------------------------- */
244 static struct c67x00_ep_data
*
245 c67x00_ep_data_alloc(struct c67x00_hcd
*c67x00
, struct urb
*urb
)
247 struct usb_host_endpoint
*hep
= urb
->ep
;
248 struct c67x00_ep_data
*ep_data
;
251 c67x00
->current_frame
= c67x00_get_current_frame_number(c67x00
);
253 /* Check if endpoint already has a c67x00_ep_data struct allocated */
255 ep_data
= hep
->hcpriv
;
256 if (frame_after(c67x00
->current_frame
, ep_data
->next_frame
))
257 ep_data
->next_frame
=
258 frame_add(c67x00
->current_frame
, 1);
262 /* Allocate and initialize a new c67x00 endpoint data structure */
263 ep_data
= kzalloc(sizeof(*ep_data
), GFP_ATOMIC
);
267 INIT_LIST_HEAD(&ep_data
->queue
);
268 INIT_LIST_HEAD(&ep_data
->node
);
271 /* hold a reference to udev as long as this endpoint lives,
272 * this is needed to possibly fix the data toggle */
273 ep_data
->dev
= usb_get_dev(urb
->dev
);
274 hep
->hcpriv
= ep_data
;
276 /* For ISOC and INT endpoints, start ASAP: */
277 ep_data
->next_frame
= frame_add(c67x00
->current_frame
, 1);
279 /* Add the endpoint data to one of the pipe lists; must be added
280 in order of endpoint address */
281 type
= usb_pipetype(urb
->pipe
);
282 if (list_empty(&ep_data
->node
)) {
283 list_add(&ep_data
->node
, &c67x00
->list
[type
]);
285 struct c67x00_ep_data
*prev
;
287 list_for_each_entry(prev
, &c67x00
->list
[type
], node
) {
288 if (prev
->hep
->desc
.bEndpointAddress
>
289 hep
->desc
.bEndpointAddress
) {
290 list_add(&ep_data
->node
, prev
->node
.prev
);
299 static int c67x00_ep_data_free(struct usb_host_endpoint
*hep
)
301 struct c67x00_ep_data
*ep_data
= hep
->hcpriv
;
306 if (!list_empty(&ep_data
->queue
))
309 usb_put_dev(ep_data
->dev
);
310 list_del(&ep_data
->queue
);
311 list_del(&ep_data
->node
);
319 void c67x00_endpoint_disable(struct usb_hcd
*hcd
, struct usb_host_endpoint
*ep
)
321 struct c67x00_hcd
*c67x00
= hcd_to_c67x00_hcd(hcd
);
324 if (!list_empty(&ep
->urb_list
))
325 dev_warn(c67x00_hcd_dev(c67x00
), "error: urb list not empty\n");
327 spin_lock_irqsave(&c67x00
->lock
, flags
);
329 /* loop waiting for all transfers in the endpoint queue to complete */
330 while (c67x00_ep_data_free(ep
)) {
331 /* Drop the lock so we can sleep waiting for the hardware */
332 spin_unlock_irqrestore(&c67x00
->lock
, flags
);
334 /* it could happen that we reinitialize this completion, while
335 * somebody was waiting for that completion. The timeout and
336 * while loop handle such cases, but this might be improved */
337 reinit_completion(&c67x00
->endpoint_disable
);
338 c67x00_sched_kick(c67x00
);
339 wait_for_completion_timeout(&c67x00
->endpoint_disable
, 1 * HZ
);
341 spin_lock_irqsave(&c67x00
->lock
, flags
);
344 spin_unlock_irqrestore(&c67x00
->lock
, flags
);
347 /* -------------------------------------------------------------------------- */
349 static inline int get_root_port(struct usb_device
*dev
)
351 while (dev
->parent
->parent
)
356 int c67x00_urb_enqueue(struct usb_hcd
*hcd
,
357 struct urb
*urb
, gfp_t mem_flags
)
361 struct c67x00_urb_priv
*urbp
;
362 struct c67x00_hcd
*c67x00
= hcd_to_c67x00_hcd(hcd
);
363 int port
= get_root_port(urb
->dev
)-1;
365 /* Allocate and initialize urb private data */
366 urbp
= kzalloc(sizeof(*urbp
), mem_flags
);
372 spin_lock_irqsave(&c67x00
->lock
, flags
);
374 /* Make sure host controller is running */
375 if (!HC_IS_RUNNING(hcd
->state
)) {
380 ret
= usb_hcd_link_urb_to_ep(hcd
, urb
);
384 INIT_LIST_HEAD(&urbp
->hep_node
);
388 urbp
->ep_data
= c67x00_ep_data_alloc(c67x00
, urb
);
390 if (!urbp
->ep_data
) {
395 /* TODO claim bandwidth with usb_claim_bandwidth?
396 * also release it somewhere! */
400 urb
->actual_length
= 0; /* Nothing received/transmitted yet */
402 switch (usb_pipetype(urb
->pipe
)) {
404 urb
->interval
= SETUP_STAGE
;
410 case PIPE_ISOCHRONOUS
:
411 if (c67x00
->urb_iso_count
== 0)
412 c67x00
->max_frame_bw
= MAX_FRAME_BW_ISO
;
413 c67x00
->urb_iso_count
++;
414 /* Assume always URB_ISO_ASAP, FIXME */
415 if (list_empty(&urbp
->ep_data
->queue
))
416 urb
->start_frame
= urbp
->ep_data
->next_frame
;
418 /* Go right after the last one */
419 struct urb
*last_urb
;
421 last_urb
= list_entry(urbp
->ep_data
->queue
.prev
,
422 struct c67x00_urb_priv
,
425 frame_add(last_urb
->start_frame
,
426 last_urb
->number_of_packets
*
433 /* Add the URB to the endpoint queue */
434 list_add_tail(&urbp
->hep_node
, &urbp
->ep_data
->queue
);
436 /* If this is the only URB, kick start the controller */
437 if (!c67x00
->urb_count
++)
438 c67x00_ll_hpi_enable_sofeop(c67x00
->sie
);
440 c67x00_sched_kick(c67x00
);
441 spin_unlock_irqrestore(&c67x00
->lock
, flags
);
446 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
448 spin_unlock_irqrestore(&c67x00
->lock
, flags
);
455 int c67x00_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
457 struct c67x00_hcd
*c67x00
= hcd_to_c67x00_hcd(hcd
);
461 spin_lock_irqsave(&c67x00
->lock
, flags
);
462 rc
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
466 c67x00_release_urb(c67x00
, urb
);
467 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
469 spin_unlock(&c67x00
->lock
);
470 usb_hcd_giveback_urb(hcd
, urb
, status
);
471 spin_lock(&c67x00
->lock
);
473 spin_unlock_irqrestore(&c67x00
->lock
, flags
);
478 spin_unlock_irqrestore(&c67x00
->lock
, flags
);
482 /* -------------------------------------------------------------------------- */
485 * pre: c67x00 locked, urb unlocked
488 c67x00_giveback_urb(struct c67x00_hcd
*c67x00
, struct urb
*urb
, int status
)
490 struct c67x00_urb_priv
*urbp
;
496 urbp
->status
= status
;
498 list_del_init(&urbp
->hep_node
);
500 c67x00_release_urb(c67x00
, urb
);
501 usb_hcd_unlink_urb_from_ep(c67x00_hcd_to_hcd(c67x00
), urb
);
502 spin_unlock(&c67x00
->lock
);
503 usb_hcd_giveback_urb(c67x00_hcd_to_hcd(c67x00
), urb
, urbp
->status
);
504 spin_lock(&c67x00
->lock
);
507 /* -------------------------------------------------------------------------- */
509 static int c67x00_claim_frame_bw(struct c67x00_hcd
*c67x00
, struct urb
*urb
,
510 int len
, int periodic
)
512 struct c67x00_urb_priv
*urbp
= urb
->hcpriv
;
515 /* According to the C67x00 BIOS user manual, page 3-18,19, the
516 * following calculations provide the full speed bit times for
519 * FS(in) = 112.5 + 9.36*BC + HOST_DELAY
520 * FS(in,iso) = 90.5 + 9.36*BC + HOST_DELAY
521 * FS(out) = 112.5 + 9.36*BC + HOST_DELAY
522 * FS(out,iso) = 78.4 + 9.36*BC + HOST_DELAY
523 * LS(in) = 802.4 + 75.78*BC + HOST_DELAY
524 * LS(out) = 802.6 + 74.67*BC + HOST_DELAY
526 * HOST_DELAY == 106 for the c67200 and c67300.
529 /* make calculations in 1/100 bit times to maintain resolution */
530 if (urbp
->ep_data
->dev
->speed
== USB_SPEED_LOW
) {
532 if (usb_pipein(urb
->pipe
))
533 bit_time
= 80240 + 7578*len
;
535 bit_time
= 80260 + 7467*len
;
538 if (usb_pipeisoc(urb
->pipe
))
539 bit_time
= usb_pipein(urb
->pipe
) ? 9050 : 7840;
545 /* Scale back down to integer bit times. Use a host delay of 106.
546 * (this is the only place it is used) */
547 bit_time
= ((bit_time
+50) / 100) + 106;
549 if (unlikely(bit_time
+ c67x00
->bandwidth_allocated
>=
550 c67x00
->max_frame_bw
))
553 if (unlikely(c67x00
->next_td_addr
+ CY_TD_SIZE
>=
554 c67x00
->td_base_addr
+ SIE_TD_SIZE
))
557 if (unlikely(c67x00
->next_buf_addr
+ len
>=
558 c67x00
->buf_base_addr
+ SIE_TD_BUF_SIZE
))
562 if (unlikely(bit_time
+ c67x00
->periodic_bw_allocated
>=
563 MAX_PERIODIC_BW(c67x00
->max_frame_bw
)))
565 c67x00
->periodic_bw_allocated
+= bit_time
;
568 c67x00
->bandwidth_allocated
+= bit_time
;
572 /* -------------------------------------------------------------------------- */
575 * td_addr and buf_addr must be word aligned
577 static int c67x00_create_td(struct c67x00_hcd
*c67x00
, struct urb
*urb
,
578 void *data
, int len
, int pid
, int toggle
,
579 unsigned long privdata
)
581 struct c67x00_td
*td
;
582 struct c67x00_urb_priv
*urbp
= urb
->hcpriv
;
583 const __u8 active_flag
= 1, retry_cnt
= 3;
587 if (c67x00_claim_frame_bw(c67x00
, urb
, len
, usb_pipeisoc(urb
->pipe
)
588 || usb_pipeint(urb
->pipe
)))
589 return -EMSGSIZE
; /* Not really an error, but expected */
591 td
= kzalloc(sizeof(*td
), GFP_ATOMIC
);
595 td
->pipe
= urb
->pipe
;
596 td
->ep_data
= urbp
->ep_data
;
598 if ((td_udev(td
)->speed
== USB_SPEED_LOW
) &&
599 !(c67x00
->low_speed_ports
& (1 << urbp
->port
)))
602 switch (usb_pipetype(td
->pipe
)) {
603 case PIPE_ISOCHRONOUS
:
624 td
->td_addr
= c67x00
->next_td_addr
;
625 c67x00
->next_td_addr
= c67x00
->next_td_addr
+ CY_TD_SIZE
;
628 td
->ly_base_addr
= __cpu_to_le16(c67x00
->next_buf_addr
);
629 td
->port_length
= __cpu_to_le16((c67x00
->sie
->sie_num
<< 15) |
630 (urbp
->port
<< 14) | (len
& 0x3FF));
631 td
->pid_ep
= ((pid
& 0xF) << TD_PIDEP_OFFSET
) |
632 (usb_pipeendpoint(td
->pipe
) & 0xF);
633 td
->dev_addr
= usb_pipedevice(td
->pipe
) & 0x7F;
636 td
->retry_cnt
= (tt
<< TT_OFFSET
) | (active_flag
<< 4) | retry_cnt
;
638 td
->next_td_addr
= __cpu_to_le16(c67x00
->next_td_addr
);
643 td
->privdata
= privdata
;
645 c67x00
->next_buf_addr
+= (len
+ 1) & ~0x01; /* properly align */
647 list_add_tail(&td
->td_list
, &c67x00
->td_list
);
651 static inline void c67x00_release_td(struct c67x00_td
*td
)
653 list_del_init(&td
->td_list
);
657 /* -------------------------------------------------------------------------- */
659 static int c67x00_add_data_urb(struct c67x00_hcd
*c67x00
, struct urb
*urb
)
668 toggle
= usb_gettoggle(urb
->dev
, usb_pipeendpoint(urb
->pipe
),
669 usb_pipeout(urb
->pipe
));
670 remaining
= urb
->transfer_buffer_length
- urb
->actual_length
;
672 maxps
= usb_maxpacket(urb
->dev
, urb
->pipe
, usb_pipeout(urb
->pipe
));
674 need_empty
= (urb
->transfer_flags
& URB_ZERO_PACKET
) &&
675 usb_pipeout(urb
->pipe
) && !(remaining
% maxps
);
677 while (remaining
|| need_empty
) {
681 len
= (remaining
> maxps
) ? maxps
: remaining
;
685 pid
= usb_pipeout(urb
->pipe
) ? USB_PID_OUT
: USB_PID_IN
;
686 td_buf
= urb
->transfer_buffer
+ urb
->transfer_buffer_length
-
688 ret
= c67x00_create_td(c67x00
, urb
, td_buf
, len
, pid
, toggle
,
691 return ret
; /* td wasn't created */
695 if (usb_pipecontrol(urb
->pipe
))
703 * return 0 in case more bandwidth is available, else errorcode
705 static int c67x00_add_ctrl_urb(struct c67x00_hcd
*c67x00
, struct urb
*urb
)
710 switch (urb
->interval
) {
713 ret
= c67x00_create_td(c67x00
, urb
, urb
->setup_packet
,
714 8, USB_PID_SETUP
, 0, SETUP_STAGE
);
717 urb
->interval
= SETUP_STAGE
;
718 usb_settoggle(urb
->dev
, usb_pipeendpoint(urb
->pipe
),
719 usb_pipeout(urb
->pipe
), 1);
722 if (urb
->transfer_buffer_length
) {
723 ret
= c67x00_add_data_urb(c67x00
, urb
);
727 } /* else fallthrough */
729 pid
= !usb_pipeout(urb
->pipe
) ? USB_PID_OUT
: USB_PID_IN
;
730 ret
= c67x00_create_td(c67x00
, urb
, NULL
, 0, pid
, 1,
741 * return 0 in case more bandwidth is available, else errorcode
743 static int c67x00_add_int_urb(struct c67x00_hcd
*c67x00
, struct urb
*urb
)
745 struct c67x00_urb_priv
*urbp
= urb
->hcpriv
;
747 if (frame_after_eq(c67x00
->current_frame
, urbp
->ep_data
->next_frame
)) {
748 urbp
->ep_data
->next_frame
=
749 frame_add(urbp
->ep_data
->next_frame
, urb
->interval
);
750 return c67x00_add_data_urb(c67x00
, urb
);
755 static int c67x00_add_iso_urb(struct c67x00_hcd
*c67x00
, struct urb
*urb
)
757 struct c67x00_urb_priv
*urbp
= urb
->hcpriv
;
759 if (frame_after_eq(c67x00
->current_frame
, urbp
->ep_data
->next_frame
)) {
763 BUG_ON(urbp
->cnt
>= urb
->number_of_packets
);
765 td_buf
= urb
->transfer_buffer
+
766 urb
->iso_frame_desc
[urbp
->cnt
].offset
;
767 len
= urb
->iso_frame_desc
[urbp
->cnt
].length
;
768 pid
= usb_pipeout(urb
->pipe
) ? USB_PID_OUT
: USB_PID_IN
;
770 ret
= c67x00_create_td(c67x00
, urb
, td_buf
, len
, pid
, 0,
773 dev_dbg(c67x00_hcd_dev(c67x00
), "create failed: %d\n",
775 urb
->iso_frame_desc
[urbp
->cnt
].actual_length
= 0;
776 urb
->iso_frame_desc
[urbp
->cnt
].status
= ret
;
777 if (urbp
->cnt
+ 1 == urb
->number_of_packets
)
778 c67x00_giveback_urb(c67x00
, urb
, 0);
781 urbp
->ep_data
->next_frame
=
782 frame_add(urbp
->ep_data
->next_frame
, urb
->interval
);
788 /* -------------------------------------------------------------------------- */
790 static void c67x00_fill_from_list(struct c67x00_hcd
*c67x00
, int type
,
791 int (*add
)(struct c67x00_hcd
*, struct urb
*))
793 struct c67x00_ep_data
*ep_data
;
796 /* traverse every endpoint on the list */
797 list_for_each_entry(ep_data
, &c67x00
->list
[type
], node
) {
798 if (!list_empty(&ep_data
->queue
)) {
799 /* and add the first urb */
800 /* isochronous transfer rely on this */
801 urb
= list_entry(ep_data
->queue
.next
,
802 struct c67x00_urb_priv
,
809 static void c67x00_fill_frame(struct c67x00_hcd
*c67x00
)
811 struct c67x00_td
*td
, *ttd
;
813 /* Check if we can proceed */
814 if (!list_empty(&c67x00
->td_list
)) {
815 dev_warn(c67x00_hcd_dev(c67x00
),
816 "TD list not empty! This should not happen!\n");
817 list_for_each_entry_safe(td
, ttd
, &c67x00
->td_list
, td_list
) {
818 dbg_td(c67x00
, td
, "Unprocessed td");
819 c67x00_release_td(td
);
823 /* Reinitialize variables */
824 c67x00
->bandwidth_allocated
= 0;
825 c67x00
->periodic_bw_allocated
= 0;
827 c67x00
->next_td_addr
= c67x00
->td_base_addr
;
828 c67x00
->next_buf_addr
= c67x00
->buf_base_addr
;
831 c67x00_fill_from_list(c67x00
, PIPE_ISOCHRONOUS
, c67x00_add_iso_urb
);
832 c67x00_fill_from_list(c67x00
, PIPE_INTERRUPT
, c67x00_add_int_urb
);
833 c67x00_fill_from_list(c67x00
, PIPE_CONTROL
, c67x00_add_ctrl_urb
);
834 c67x00_fill_from_list(c67x00
, PIPE_BULK
, c67x00_add_data_urb
);
837 /* -------------------------------------------------------------------------- */
843 c67x00_parse_td(struct c67x00_hcd
*c67x00
, struct c67x00_td
*td
)
845 c67x00_ll_read_mem_le16(c67x00
->sie
->dev
,
846 td
->td_addr
, td
, CY_TD_SIZE
);
848 if (usb_pipein(td
->pipe
) && td_actual_bytes(td
))
849 c67x00_ll_read_mem_le16(c67x00
->sie
->dev
, td_ly_base_addr(td
),
850 td
->data
, td_actual_bytes(td
));
853 static int c67x00_td_to_error(struct c67x00_hcd
*c67x00
, struct c67x00_td
*td
)
855 if (td
->status
& TD_STATUSMASK_ERR
) {
856 dbg_td(c67x00
, td
, "ERROR_FLAG");
859 if (td
->status
& TD_STATUSMASK_STALL
) {
860 /* dbg_td(c67x00, td, "STALL"); */
863 if (td
->status
& TD_STATUSMASK_TMOUT
) {
864 dbg_td(c67x00
, td
, "TIMEOUT");
871 static inline int c67x00_end_of_data(struct c67x00_td
*td
)
873 int maxps
, need_empty
, remaining
;
874 struct urb
*urb
= td
->urb
;
877 act_bytes
= td_actual_bytes(td
);
879 if (unlikely(!act_bytes
))
880 return 1; /* This was an empty packet */
882 maxps
= usb_maxpacket(td_udev(td
), td
->pipe
, usb_pipeout(td
->pipe
));
884 if (unlikely(act_bytes
< maxps
))
885 return 1; /* Smaller then full packet */
887 remaining
= urb
->transfer_buffer_length
- urb
->actual_length
;
888 need_empty
= (urb
->transfer_flags
& URB_ZERO_PACKET
) &&
889 usb_pipeout(urb
->pipe
) && !(remaining
% maxps
);
891 if (unlikely(!remaining
&& !need_empty
))
897 /* -------------------------------------------------------------------------- */
899 /* Remove all td's from the list which come
900 * after last_td and are meant for the same pipe.
901 * This is used when a short packet has occurred */
902 static inline void c67x00_clear_pipe(struct c67x00_hcd
*c67x00
,
903 struct c67x00_td
*last_td
)
905 struct c67x00_td
*td
, *tmp
;
908 while (td
->td_list
.next
!= &c67x00
->td_list
) {
909 td
= list_entry(td
->td_list
.next
, struct c67x00_td
, td_list
);
910 if (td
->pipe
== last_td
->pipe
) {
911 c67x00_release_td(td
);
918 /* -------------------------------------------------------------------------- */
920 static void c67x00_handle_successful_td(struct c67x00_hcd
*c67x00
,
921 struct c67x00_td
*td
)
923 struct urb
*urb
= td
->urb
;
928 urb
->actual_length
+= td_actual_bytes(td
);
930 switch (usb_pipetype(td
->pipe
)) {
931 /* isochronous tds are handled separately */
933 switch (td
->privdata
) {
936 urb
->transfer_buffer_length
?
937 DATA_STAGE
: STATUS_STAGE
;
938 /* Don't count setup_packet with normal data: */
939 urb
->actual_length
= 0;
943 if (c67x00_end_of_data(td
)) {
944 urb
->interval
= STATUS_STAGE
;
945 c67x00_clear_pipe(c67x00
, td
);
951 c67x00_giveback_urb(c67x00
, urb
, 0);
958 if (unlikely(c67x00_end_of_data(td
))) {
959 c67x00_clear_pipe(c67x00
, td
);
960 c67x00_giveback_urb(c67x00
, urb
, 0);
966 static void c67x00_handle_isoc(struct c67x00_hcd
*c67x00
, struct c67x00_td
*td
)
968 struct urb
*urb
= td
->urb
;
969 struct c67x00_urb_priv
*urbp
;
978 if (td
->status
& TD_ERROR_MASK
)
981 urb
->iso_frame_desc
[cnt
].actual_length
= td_actual_bytes(td
);
982 urb
->iso_frame_desc
[cnt
].status
= c67x00_td_to_error(c67x00
, td
);
983 if (cnt
+ 1 == urb
->number_of_packets
) /* Last packet */
984 c67x00_giveback_urb(c67x00
, urb
, 0);
987 /* -------------------------------------------------------------------------- */
990 * c67x00_check_td_list - handle tds which have been processed by the c67x00
991 * pre: current_td == 0
993 static inline void c67x00_check_td_list(struct c67x00_hcd
*c67x00
)
995 struct c67x00_td
*td
, *tmp
;
1000 list_for_each_entry_safe(td
, tmp
, &c67x00
->td_list
, td_list
) {
1002 c67x00_parse_td(c67x00
, td
);
1003 urb
= td
->urb
; /* urb can be NULL! */
1007 /* Handle isochronous transfers separately */
1008 if (usb_pipeisoc(td
->pipe
)) {
1010 c67x00_handle_isoc(c67x00
, td
);
1014 /* When an error occurs, all td's for that pipe go into an
1015 * inactive state. This state matches successful transfers so
1016 * we must make sure not to service them. */
1017 if (td
->status
& TD_ERROR_MASK
) {
1018 c67x00_giveback_urb(c67x00
, urb
,
1019 c67x00_td_to_error(c67x00
, td
));
1023 if ((td
->status
& TD_STATUSMASK_NAK
) || !td_sequence_ok(td
) ||
1027 /* Sequence ok and acked, don't need to fix toggle */
1030 if (unlikely(td
->status
& TD_STATUSMASK_OVF
)) {
1031 if (td_residue(td
) & TD_RESIDUE_OVERFLOW
) {
1033 c67x00_giveback_urb(c67x00
, urb
, -EOVERFLOW
);
1039 c67x00_handle_successful_td(c67x00
, td
);
1043 c67x00_clear_pipe(c67x00
, td
);
1045 usb_settoggle(td_udev(td
), usb_pipeendpoint(td
->pipe
),
1046 usb_pipeout(td
->pipe
),
1047 !(td
->ctrl_reg
& SEQ_SEL
));
1048 /* next in list could have been removed, due to clear_pipe! */
1049 tmp
= list_entry(td
->td_list
.next
, typeof(*td
), td_list
);
1050 c67x00_release_td(td
);
1054 /* -------------------------------------------------------------------------- */
1056 static inline int c67x00_all_tds_processed(struct c67x00_hcd
*c67x00
)
1058 /* If all tds are processed, we can check the previous frame (if
1059 * there was any) and start our next frame.
1061 return !c67x00_ll_husb_get_current_td(c67x00
->sie
);
1067 static void c67x00_send_td(struct c67x00_hcd
*c67x00
, struct c67x00_td
*td
)
1069 int len
= td_length(td
);
1071 if (len
&& ((td
->pid_ep
& TD_PIDEPMASK_PID
) != TD_PID_IN
))
1072 c67x00_ll_write_mem_le16(c67x00
->sie
->dev
, td_ly_base_addr(td
),
1075 c67x00_ll_write_mem_le16(c67x00
->sie
->dev
,
1076 td
->td_addr
, td
, CY_TD_SIZE
);
1079 static void c67x00_send_frame(struct c67x00_hcd
*c67x00
)
1081 struct c67x00_td
*td
;
1083 if (list_empty(&c67x00
->td_list
))
1084 dev_warn(c67x00_hcd_dev(c67x00
),
1085 "%s: td list should not be empty here!\n",
1088 list_for_each_entry(td
, &c67x00
->td_list
, td_list
) {
1089 if (td
->td_list
.next
== &c67x00
->td_list
)
1090 td
->next_td_addr
= 0; /* Last td in list */
1092 c67x00_send_td(c67x00
, td
);
1095 c67x00_ll_husb_set_current_td(c67x00
->sie
, c67x00
->td_base_addr
);
1098 /* -------------------------------------------------------------------------- */
1101 * c67x00_do_work - Schedulers state machine
1103 static void c67x00_do_work(struct c67x00_hcd
*c67x00
)
1105 spin_lock(&c67x00
->lock
);
1106 /* Make sure all tds are processed */
1107 if (!c67x00_all_tds_processed(c67x00
))
1110 c67x00_check_td_list(c67x00
);
1112 /* no td's are being processed (current == 0)
1113 * and all have been "checked" */
1114 complete(&c67x00
->endpoint_disable
);
1116 if (!list_empty(&c67x00
->td_list
))
1119 c67x00
->current_frame
= c67x00_get_current_frame_number(c67x00
);
1120 if (c67x00
->current_frame
== c67x00
->last_frame
)
1121 goto out
; /* Don't send tds in same frame */
1122 c67x00
->last_frame
= c67x00
->current_frame
;
1124 /* If no urbs are scheduled, our work is done */
1125 if (!c67x00
->urb_count
) {
1126 c67x00_ll_hpi_disable_sofeop(c67x00
->sie
);
1130 c67x00_fill_frame(c67x00
);
1131 if (!list_empty(&c67x00
->td_list
))
1132 /* TD's have been added to the frame */
1133 c67x00_send_frame(c67x00
);
1136 spin_unlock(&c67x00
->lock
);
1139 /* -------------------------------------------------------------------------- */
1141 static void c67x00_sched_tasklet(unsigned long __c67x00
)
1143 struct c67x00_hcd
*c67x00
= (struct c67x00_hcd
*)__c67x00
;
1144 c67x00_do_work(c67x00
);
1147 void c67x00_sched_kick(struct c67x00_hcd
*c67x00
)
1149 tasklet_hi_schedule(&c67x00
->tasklet
);
1152 int c67x00_sched_start_scheduler(struct c67x00_hcd
*c67x00
)
1154 tasklet_init(&c67x00
->tasklet
, c67x00_sched_tasklet
,
1155 (unsigned long)c67x00
);
1159 void c67x00_sched_stop_scheduler(struct c67x00_hcd
*c67x00
)
1161 tasklet_kill(&c67x00
->tasklet
);