sound/i2c/other/ak4113.c

   1 /*
   2  *  Routines for control of the AK4113 via I2C/4-wire serial interface
   3  *  IEC958 (S/PDIF) receiver by Asahi Kasei
   4  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
   5  *  Copyright (c) by Pavel Hofman <pavel.hofman@ivitera.com>
   6  *
   7  *
   8  *   This program is free software; you can redistribute it and/or modify
   9  *   it under the terms of the GNU General Public License as published by
  10  *   the Free Software Foundation; either version 2 of the License, or
  11  *   (at your option) any later version.
  12  *
  13  *   This program is distributed in the hope that it will be useful,
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *   GNU General Public License for more details.
  17  *
  18  *   You should have received a copy of the GNU General Public License
  19  *   along with this program; if not, write to the Free Software
  20  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  21  *
  22  */
  23
  24 #include <linux/slab.h>
  25 #include <linux/delay.h>
  26 #include <linux/module.h>
  27 #include <sound/core.h>
  28 #include <sound/control.h>
  29 #include <sound/pcm.h>
  30 #include <sound/ak4113.h>
  31 #include <sound/asoundef.h>
  32 #include <sound/info.h>
  33
  34 MODULE_AUTHOR("Pavel Hofman <pavel.hofman@ivitera.com>");
  35 MODULE_DESCRIPTION("AK4113 IEC958 (S/PDIF) receiver by Asahi Kasei");
  36 MODULE_LICENSE("GPL");
  37
  38 #define AK4113_ADDR                     0x00 /* fixed address */
  39
  40 static void ak4113_stats(struct work_struct *work);
  41 static void ak4113_init_regs(struct ak4113 *chip);
  42
  43
  44 static void reg_write(struct ak4113 *ak4113, unsigned char reg,
  45                 unsigned char val)
  46 {
  47         ak4113->write(ak4113->private_data, reg, val);
  48         if (reg < sizeof(ak4113->regmap))
  49                 ak4113->regmap[reg] = val;
  50 }
  51
  52 static inline unsigned char reg_read(struct ak4113 *ak4113, unsigned char reg)
  53 {
  54         return ak4113->read(ak4113->private_data, reg);
  55 }
  56
  57 static void snd_ak4113_free(struct ak4113 *chip)
  58 {
  59         atomic_inc(&chip->wq_processing);       /* don't schedule new work */
  60         cancel_delayed_work_sync(&chip->work);
  61         kfree(chip);
  62 }
  63
  64 static int snd_ak4113_dev_free(struct snd_device *device)
  65 {
  66         struct ak4113 *chip = device->device_data;
  67         snd_ak4113_free(chip);
  68         return 0;
  69 }
  70
  71 int snd_ak4113_create(struct snd_card *card, ak4113_read_t *read,
  72                 ak4113_write_t *write, const unsigned char *pgm,
  73                 void *private_data, struct ak4113 **r_ak4113)
  74 {
  75         struct ak4113 *chip;
  76         int err = 0;
  77         unsigned char reg;
  78         static struct snd_device_ops ops = {
  79                 .dev_free =     snd_ak4113_dev_free,
  80         };
  81
  82         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  83         if (chip == NULL)
  84                 return -ENOMEM;
  85         spin_lock_init(&chip->lock);
  86         chip->card = card;
  87         chip->read = read;
  88         chip->write = write;
  89         chip->private_data = private_data;
  90         INIT_DELAYED_WORK(&chip->work, ak4113_stats);
  91         atomic_set(&chip->wq_processing, 0);
  92
  93         for (reg = 0; reg < AK4113_WRITABLE_REGS ; reg++)
  94                 chip->regmap[reg] = pgm[reg];
  95         ak4113_init_regs(chip);
  96
  97         chip->rcs0 = reg_read(chip, AK4113_REG_RCS0) & ~(AK4113_QINT |
  98                         AK4113_CINT | AK4113_STC);
  99         chip->rcs1 = reg_read(chip, AK4113_REG_RCS1);
 100         chip->rcs2 = reg_read(chip, AK4113_REG_RCS2);
 101         err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops);
 102         if (err < 0)
 103                 goto __fail;
 104
 105         if (r_ak4113)
 106                 *r_ak4113 = chip;
 107         return 0;
 108
 109 __fail:
 110         snd_ak4113_free(chip);
 111         return err < 0 ? err : -EIO;
 112 }
 113 EXPORT_SYMBOL_GPL(snd_ak4113_create);
 114
 115 void snd_ak4113_reg_write(struct ak4113 *chip, unsigned char reg,
 116                 unsigned char mask, unsigned char val)
 117 {
 118         if (reg >= AK4113_WRITABLE_REGS)
 119                 return;
 120         reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
 121 }
 122 EXPORT_SYMBOL_GPL(snd_ak4113_reg_write);
 123
 124 static void ak4113_init_regs(struct ak4113 *chip)
 125 {
 126         unsigned char old = chip->regmap[AK4113_REG_PWRDN], reg;
 127
 128         /* bring the chip to reset state and powerdown state */
 129         reg_write(chip, AK4113_REG_PWRDN, old & ~(AK4113_RST|AK4113_PWN));
 130         udelay(200);
 131         /* release reset, but leave powerdown */
 132         reg_write(chip, AK4113_REG_PWRDN, (old | AK4113_RST) & ~AK4113_PWN);
 133         udelay(200);
 134         for (reg = 1; reg < AK4113_WRITABLE_REGS; reg++)
 135                 reg_write(chip, reg, chip->regmap[reg]);
 136         /* release powerdown, everything is initialized now */
 137         reg_write(chip, AK4113_REG_PWRDN, old | AK4113_RST | AK4113_PWN);
 138 }
 139
 140 void snd_ak4113_reinit(struct ak4113 *chip)
 141 {
 142         if (atomic_inc_return(&chip->wq_processing) == 1)
 143                 cancel_delayed_work_sync(&chip->work);
 144         ak4113_init_regs(chip);
 145         /* bring up statistics / event queing */
 146         if (atomic_dec_and_test(&chip->wq_processing))
 147                 schedule_delayed_work(&chip->work, HZ / 10);
 148 }
 149 EXPORT_SYMBOL_GPL(snd_ak4113_reinit);
 150
 151 static unsigned int external_rate(unsigned char rcs1)
 152 {
 153         switch (rcs1 & (AK4113_FS0|AK4113_FS1|AK4113_FS2|AK4113_FS3)) {
 154         case AK4113_FS_8000HZ:
 155                 return 8000;
 156         case AK4113_FS_11025HZ:
 157                 return 11025;
 158         case AK4113_FS_16000HZ:
 159                 return 16000;
 160         case AK4113_FS_22050HZ:
 161                 return 22050;
 162         case AK4113_FS_24000HZ:
 163                 return 24000;
 164         case AK4113_FS_32000HZ:
 165                 return 32000;
 166         case AK4113_FS_44100HZ:
 167                 return 44100;
 168         case AK4113_FS_48000HZ:
 169                 return 48000;
 170         case AK4113_FS_64000HZ:
 171                 return 64000;
 172         case AK4113_FS_88200HZ:
 173                 return 88200;
 174         case AK4113_FS_96000HZ:
 175                 return 96000;
 176         case AK4113_FS_176400HZ:
 177                 return 176400;
 178         case AK4113_FS_192000HZ:
 179                 return 192000;
 180         default:
 181                 return 0;
 182         }
 183 }
 184
 185 static int snd_ak4113_in_error_info(struct snd_kcontrol *kcontrol,
 186                                     struct snd_ctl_elem_info *uinfo)
 187 {
 188         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
 189         uinfo->count = 1;
 190         uinfo->value.integer.min = 0;
 191         uinfo->value.integer.max = LONG_MAX;
 192         return 0;
 193 }
 194
 195 static int snd_ak4113_in_error_get(struct snd_kcontrol *kcontrol,
 196                                    struct snd_ctl_elem_value *ucontrol)
 197 {
 198         struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
 199         long *ptr;
 200
 201         spin_lock_irq(&chip->lock);
 202         ptr = (long *)(((char *)chip) + kcontrol->private_value);
 203         ucontrol->value.integer.value[0] = *ptr;
 204         *ptr = 0;
 205         spin_unlock_irq(&chip->lock);
 206         return 0;
 207 }
 208
 209 #define snd_ak4113_in_bit_info          snd_ctl_boolean_mono_info
 210
 211 static int snd_ak4113_in_bit_get(struct snd_kcontrol *kcontrol,
 212                                  struct snd_ctl_elem_value *ucontrol)
 213 {
 214         struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
 215         unsigned char reg = kcontrol->private_value & 0xff;
 216         unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
 217         unsigned char inv = (kcontrol->private_value >> 31) & 1;
 218
 219         ucontrol->value.integer.value[0] =
 220                 ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
 221         return 0;
 222 }
 223
 224 static int snd_ak4113_rx_info(struct snd_kcontrol *kcontrol,
 225                               struct snd_ctl_elem_info *uinfo)
 226 {
 227         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
 228         uinfo->count = 1;
 229         uinfo->value.integer.min = 0;
 230         uinfo->value.integer.max = 5;
 231         return 0;
 232 }
 233
 234 static int snd_ak4113_rx_get(struct snd_kcontrol *kcontrol,
 235                              struct snd_ctl_elem_value *ucontrol)
 236 {
 237         struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
 238
 239         ucontrol->value.integer.value[0] =
 240                 (AK4113_IPS(chip->regmap[AK4113_REG_IO1]));
 241         return 0;
 242 }
 243
 244 static int snd_ak4113_rx_put(struct snd_kcontrol *kcontrol,
 245                              struct snd_ctl_elem_value *ucontrol)
 246 {
 247         struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
 248         int change;
 249         u8 old_val;
 250
 251         spin_lock_irq(&chip->lock);
 252         old_val = chip->regmap[AK4113_REG_IO1];
 253         change = ucontrol->value.integer.value[0] != AK4113_IPS(old_val);
 254         if (change)
 255                 reg_write(chip, AK4113_REG_IO1,
 256                                 (old_val & (~AK4113_IPS(0xff))) |
 257                                 (AK4113_IPS(ucontrol->value.integer.value[0])));
 258         spin_unlock_irq(&chip->lock);
 259         return change;
 260 }
 261
 262 static int snd_ak4113_rate_info(struct snd_kcontrol *kcontrol,
 263                                 struct snd_ctl_elem_info *uinfo)
 264 {
 265         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
 266         uinfo->count = 1;
 267         uinfo->value.integer.min = 0;
 268         uinfo->value.integer.max = 192000;
 269         return 0;
 270 }
 271
 272 static int snd_ak4113_rate_get(struct snd_kcontrol *kcontrol,
 273                                struct snd_ctl_elem_value *ucontrol)
 274 {
 275         struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
 276
 277         ucontrol->value.integer.value[0] = external_rate(reg_read(chip,
 278                                 AK4113_REG_RCS1));
 279         return 0;
 280 }
 281
 282 static int snd_ak4113_spdif_info(struct snd_kcontrol *kcontrol,
 283                 struct snd_ctl_elem_info *uinfo)
 284 {
 285         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 286         uinfo->count = 1;
 287         return 0;
 288 }
 289
 290 static int snd_ak4113_spdif_get(struct snd_kcontrol *kcontrol,
 291                                 struct snd_ctl_elem_value *ucontrol)
 292 {
 293         struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
 294         unsigned i;
 295
 296         for (i = 0; i < AK4113_REG_RXCSB_SIZE; i++)
 297                 ucontrol->value.iec958.status[i] = reg_read(chip,
 298                                 AK4113_REG_RXCSB0 + i);
 299         return 0;
 300 }
 301
 302 static int snd_ak4113_spdif_mask_info(struct snd_kcontrol *kcontrol,
 303                 struct snd_ctl_elem_info *uinfo)
 304 {
 305         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 306         uinfo->count = 1;
 307         return 0;
 308 }
 309
 310 static int snd_ak4113_spdif_mask_get(struct snd_kcontrol *kcontrol,
 311                                       struct snd_ctl_elem_value *ucontrol)
 312 {
 313         memset(ucontrol->value.iec958.status, 0xff, AK4113_REG_RXCSB_SIZE);
 314         return 0;
 315 }
 316
 317 static int snd_ak4113_spdif_pinfo(struct snd_kcontrol *kcontrol,
 318                 struct snd_ctl_elem_info *uinfo)
 319 {
 320         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
 321         uinfo->value.integer.min = 0;
 322         uinfo->value.integer.max = 0xffff;
 323         uinfo->count = 4;
 324         return 0;
 325 }
 326
 327 static int snd_ak4113_spdif_pget(struct snd_kcontrol *kcontrol,
 328                                  struct snd_ctl_elem_value *ucontrol)
 329 {
 330         struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
 331         unsigned short tmp;
 332
 333         ucontrol->value.integer.value[0] = 0xf8f2;
 334         ucontrol->value.integer.value[1] = 0x4e1f;
 335         tmp = reg_read(chip, AK4113_REG_Pc0) |
 336                 (reg_read(chip, AK4113_REG_Pc1) << 8);
 337         ucontrol->value.integer.value[2] = tmp;
 338         tmp = reg_read(chip, AK4113_REG_Pd0) |
 339                 (reg_read(chip, AK4113_REG_Pd1) << 8);
 340         ucontrol->value.integer.value[3] = tmp;
 341         return 0;
 342 }
 343
 344 static int snd_ak4113_spdif_qinfo(struct snd_kcontrol *kcontrol,
 345                 struct snd_ctl_elem_info *uinfo)
 346 {
 347         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 348         uinfo->count = AK4113_REG_QSUB_SIZE;
 349         return 0;
 350 }
 351
 352 static int snd_ak4113_spdif_qget(struct snd_kcontrol *kcontrol,
 353                                  struct snd_ctl_elem_value *ucontrol)
 354 {
 355         struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
 356         unsigned i;
 357
 358         for (i = 0; i < AK4113_REG_QSUB_SIZE; i++)
 359                 ucontrol->value.bytes.data[i] = reg_read(chip,
 360                                 AK4113_REG_QSUB_ADDR + i);
 361         return 0;
 362 }
 363
 364 /* Don't forget to change AK4113_CONTROLS define!!! */
 365 static struct snd_kcontrol_new snd_ak4113_iec958_controls[] = {
 366 {
 367         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 368         .name =         "IEC958 Parity Errors",
 369         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 370                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 371         .info =         snd_ak4113_in_error_info,
 372         .get =          snd_ak4113_in_error_get,
 373         .private_value = offsetof(struct ak4113, parity_errors),
 374 },
 375 {
 376         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 377         .name =         "IEC958 V-Bit Errors",
 378         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 379                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 380         .info =         snd_ak4113_in_error_info,
 381         .get =          snd_ak4113_in_error_get,
 382         .private_value = offsetof(struct ak4113, v_bit_errors),
 383 },
 384 {
 385         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 386         .name =         "IEC958 C-CRC Errors",
 387         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 388                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 389         .info =         snd_ak4113_in_error_info,
 390         .get =          snd_ak4113_in_error_get,
 391         .private_value = offsetof(struct ak4113, ccrc_errors),
 392 },
 393 {
 394         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 395         .name =         "IEC958 Q-CRC Errors",
 396         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 397                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 398         .info =         snd_ak4113_in_error_info,
 399         .get =          snd_ak4113_in_error_get,
 400         .private_value = offsetof(struct ak4113, qcrc_errors),
 401 },
 402 {
 403         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 404         .name =         "IEC958 External Rate",
 405         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 406                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 407         .info =         snd_ak4113_rate_info,
 408         .get =          snd_ak4113_rate_get,
 409 },
 410 {
 411         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 412         .name =         SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),
 413         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
 414         .info =         snd_ak4113_spdif_mask_info,
 415         .get =          snd_ak4113_spdif_mask_get,
 416 },
 417 {
 418         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 419         .name =         SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
 420         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 421                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 422         .info =         snd_ak4113_spdif_info,
 423         .get =          snd_ak4113_spdif_get,
 424 },
 425 {
 426         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 427         .name =         "IEC958 Preamble Capture Default",
 428         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 429                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 430         .info =         snd_ak4113_spdif_pinfo,
 431         .get =          snd_ak4113_spdif_pget,
 432 },
 433 {
 434         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 435         .name =         "IEC958 Q-subcode Capture Default",
 436         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 437                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 438         .info =         snd_ak4113_spdif_qinfo,
 439         .get =          snd_ak4113_spdif_qget,
 440 },
 441 {
 442         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 443         .name =         "IEC958 Audio",
 444         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 445                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 446         .info =         snd_ak4113_in_bit_info,
 447         .get =          snd_ak4113_in_bit_get,
 448         .private_value = (1<<31) | (1<<8) | AK4113_REG_RCS0,
 449 },
 450 {
 451         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 452         .name =         "IEC958 Non-PCM Bitstream",
 453         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 454                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 455         .info =         snd_ak4113_in_bit_info,
 456         .get =          snd_ak4113_in_bit_get,
 457         .private_value = (0<<8) | AK4113_REG_RCS1,
 458 },
 459 {
 460         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 461         .name =         "IEC958 DTS Bitstream",
 462         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 463                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 464         .info =         snd_ak4113_in_bit_info,
 465         .get =          snd_ak4113_in_bit_get,
 466         .private_value = (1<<8) | AK4113_REG_RCS1,
 467 },
 468 {
 469         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 470         .name =         "AK4113 Input Select",
 471         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 472                 SNDRV_CTL_ELEM_ACCESS_WRITE,
 473         .info =         snd_ak4113_rx_info,
 474         .get =          snd_ak4113_rx_get,
 475         .put =          snd_ak4113_rx_put,
 476 }
 477 };
 478
 479 static void snd_ak4113_proc_regs_read(struct snd_info_entry *entry,
 480                 struct snd_info_buffer *buffer)
 481 {
 482         struct ak4113 *ak4113 = entry->private_data;
 483         int reg, val;
 484         /* all ak4113 registers 0x00 - 0x1c */
 485         for (reg = 0; reg < 0x1d; reg++) {
 486                 val = reg_read(ak4113, reg);
 487                 snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val);
 488         }
 489 }
 490
 491 static void snd_ak4113_proc_init(struct ak4113 *ak4113)
 492 {
 493         struct snd_info_entry *entry;
 494         if (!snd_card_proc_new(ak4113->card, "ak4113", &entry))
 495                 snd_info_set_text_ops(entry, ak4113, snd_ak4113_proc_regs_read);
 496 }
 497
 498 int snd_ak4113_build(struct ak4113 *ak4113,
 499                 struct snd_pcm_substream *cap_substream)
 500 {
 501         struct snd_kcontrol *kctl;
 502         unsigned int idx;
 503         int err;
 504
 505         if (snd_BUG_ON(!cap_substream))
 506                 return -EINVAL;
 507         ak4113->substream = cap_substream;
 508         for (idx = 0; idx < AK4113_CONTROLS; idx++) {
 509                 kctl = snd_ctl_new1(&snd_ak4113_iec958_controls[idx], ak4113);
 510                 if (kctl == NULL)
 511                         return -ENOMEM;
 512                 kctl->id.device = cap_substream->pcm->device;
 513                 kctl->id.subdevice = cap_substream->number;
 514                 err = snd_ctl_add(ak4113->card, kctl);
 515                 if (err < 0)
 516                         return err;
 517                 ak4113->kctls[idx] = kctl;
 518         }
 519         snd_ak4113_proc_init(ak4113);
 520         /* trigger workq */
 521         schedule_delayed_work(&ak4113->work, HZ / 10);
 522         return 0;
 523 }
 524 EXPORT_SYMBOL_GPL(snd_ak4113_build);
 525
 526 int snd_ak4113_external_rate(struct ak4113 *ak4113)
 527 {
 528         unsigned char rcs1;
 529
 530         rcs1 = reg_read(ak4113, AK4113_REG_RCS1);
 531         return external_rate(rcs1);
 532 }
 533 EXPORT_SYMBOL_GPL(snd_ak4113_external_rate);
 534
 535 int snd_ak4113_check_rate_and_errors(struct ak4113 *ak4113, unsigned int flags)
 536 {
 537         struct snd_pcm_runtime *runtime =
 538                 ak4113->substream ? ak4113->substream->runtime : NULL;
 539         unsigned long _flags;
 540         int res = 0;
 541         unsigned char rcs0, rcs1, rcs2;
 542         unsigned char c0, c1;
 543
 544         rcs1 = reg_read(ak4113, AK4113_REG_RCS1);
 545         if (flags & AK4113_CHECK_NO_STAT)
 546                 goto __rate;
 547         rcs0 = reg_read(ak4113, AK4113_REG_RCS0);
 548         rcs2 = reg_read(ak4113, AK4113_REG_RCS2);
 549         spin_lock_irqsave(&ak4113->lock, _flags);
 550         if (rcs0 & AK4113_PAR)
 551                 ak4113->parity_errors++;
 552         if (rcs0 & AK4113_V)
 553                 ak4113->v_bit_errors++;
 554         if (rcs2 & AK4113_CCRC)
 555                 ak4113->ccrc_errors++;
 556         if (rcs2 & AK4113_QCRC)
 557                 ak4113->qcrc_errors++;
 558         c0 = (ak4113->rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC |
 559                                 AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK)) ^
 560                 (rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC |
 561                          AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK));
 562         c1 = (ak4113->rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM |
 563                                 AK4113_DAT | 0xf0)) ^
 564                 (rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM |
 565                          AK4113_DAT | 0xf0));
 566         ak4113->rcs0 = rcs0 & ~(AK4113_QINT | AK4113_CINT | AK4113_STC);
 567         ak4113->rcs1 = rcs1;
 568         ak4113->rcs2 = rcs2;
 569         spin_unlock_irqrestore(&ak4113->lock, _flags);
 570
 571         if (rcs0 & AK4113_PAR)
 572                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 573                                 &ak4113->kctls[0]->id);
 574         if (rcs0 & AK4113_V)
 575                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 576                                 &ak4113->kctls[1]->id);
 577         if (rcs2 & AK4113_CCRC)
 578                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 579                                 &ak4113->kctls[2]->id);
 580         if (rcs2 & AK4113_QCRC)
 581                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 582                                 &ak4113->kctls[3]->id);
 583
 584         /* rate change */
 585         if (c1 & 0xf0)
 586                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 587                                 &ak4113->kctls[4]->id);
 588
 589         if ((c1 & AK4113_PEM) | (c0 & AK4113_CINT))
 590                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 591                                 &ak4113->kctls[6]->id);
 592         if (c0 & AK4113_QINT)
 593                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 594                                 &ak4113->kctls[8]->id);
 595
 596         if (c0 & AK4113_AUDION)
 597                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 598                                 &ak4113->kctls[9]->id);
 599         if (c1 & AK4113_NPCM)
 600                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 601                                 &ak4113->kctls[10]->id);
 602         if (c1 & AK4113_DTSCD)
 603                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 604                                 &ak4113->kctls[11]->id);
 605
 606         if (ak4113->change_callback && (c0 | c1) != 0)
 607                 ak4113->change_callback(ak4113, c0, c1);
 608
 609 __rate:
 610         /* compare rate */
 611         res = external_rate(rcs1);
 612         if (!(flags & AK4113_CHECK_NO_RATE) && runtime &&
 613                         (runtime->rate != res)) {
 614                 snd_pcm_stream_lock_irqsave(ak4113->substream, _flags);
 615                 if (snd_pcm_running(ak4113->substream)) {
 616                         /*printk(KERN_DEBUG "rate changed (%i <- %i)\n",
 617                          * runtime->rate, res); */
 618                         snd_pcm_stop(ak4113->substream,
 619                                         SNDRV_PCM_STATE_DRAINING);
 620                         wake_up(&runtime->sleep);
 621                         res = 1;
 622                 }
 623                 snd_pcm_stream_unlock_irqrestore(ak4113->substream, _flags);
 624         }
 625         return res;
 626 }
 627 EXPORT_SYMBOL_GPL(snd_ak4113_check_rate_and_errors);
 628
 629 static void ak4113_stats(struct work_struct *work)
 630 {
 631         struct ak4113 *chip = container_of(work, struct ak4113, work.work);
 632
 633         if (atomic_inc_return(&chip->wq_processing) == 1)
 634                 snd_ak4113_check_rate_and_errors(chip, chip->check_flags);
 635
 636         if (atomic_dec_and_test(&chip->wq_processing))
 637                 schedule_delayed_work(&chip->work, HZ / 10);
 638 }