arch/arm/mach-mx3/mach-mx31lilly.c

   1 /*
   2  *  LILLY-1131 module support
   3  *
   4  *    Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
   5  *
   6  *  based on code for other MX31 boards,
   7  *
   8  *    Copyright 2005-2007 Freescale Semiconductor
   9  *    Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
  10  *    Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License as published by
  14  * the Free Software Foundation; either version 2 of the License, or
  15  * (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  */
  22
  23 #include <linux/types.h>
  24 #include <linux/init.h>
  25 #include <linux/clk.h>
  26 #include <linux/gpio.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/interrupt.h>
  29 #include <linux/smsc911x.h>
  30 #include <linux/mtd/physmap.h>
  31 #include <linux/spi/spi.h>
  32 #include <linux/mfd/mc13783.h>
  33 #include <linux/usb/otg.h>
  34 #include <linux/usb/ulpi.h>
  35
  36 #include <asm/mach-types.h>
  37 #include <asm/mach/arch.h>
  38 #include <asm/mach/time.h>
  39 #include <asm/mach/map.h>
  40
  41 #include <mach/hardware.h>
  42 #include <mach/common.h>
  43 #include <mach/iomux-mx3.h>
  44 #include <mach/board-mx31lilly.h>
  45 #include <mach/mxc_ehci.h>
  46 #include <mach/ulpi.h>
  47
  48 #include "devices-imx31.h"
  49 #include "devices.h"
  50
  51 /*
  52  * This file contains module-specific initialization routines for LILLY-1131.
  53  * Initialization of peripherals found on the baseboard is implemented in the
  54  * appropriate baseboard support code.
  55  */
  56
  57 /* SMSC ethernet support */
  58
  59 static struct resource smsc91x_resources[] = {
  60         {
  61                 .start  = MX31_CS4_BASE_ADDR,
  62                 .end    = MX31_CS4_BASE_ADDR + 0xffff,
  63                 .flags  = IORESOURCE_MEM,
  64         },
  65         {
  66                 .start  = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
  67                 .end    = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
  68                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
  69         }
  70 };
  71
  72 static struct smsc911x_platform_config smsc911x_config = {
  73         .phy_interface  = PHY_INTERFACE_MODE_MII,
  74         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  75         .irq_type       = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  76         .flags          = SMSC911X_USE_32BIT |
  77                           SMSC911X_SAVE_MAC_ADDRESS |
  78                           SMSC911X_FORCE_INTERNAL_PHY,
  79 };
  80
  81 static struct platform_device smsc91x_device = {
  82         .name           = "smsc911x",
  83         .id             = -1,
  84         .num_resources  = ARRAY_SIZE(smsc91x_resources),
  85         .resource       = smsc91x_resources,
  86         .dev            = {
  87                 .platform_data = &smsc911x_config,
  88         }
  89 };
  90
  91 /* NOR flash */
  92 static struct physmap_flash_data nor_flash_data = {
  93         .width  = 2,
  94 };
  95
  96 static struct resource nor_flash_resource = {
  97         .start  = 0xa0000000,
  98         .end    = 0xa1ffffff,
  99         .flags  = IORESOURCE_MEM,
 100 };
 101
 102 static struct platform_device physmap_flash_device = {
 103         .name   = "physmap-flash",
 104         .id     = 0,
 105         .dev    = {
 106                 .platform_data  = &nor_flash_data,
 107         },
 108         .resource = &nor_flash_resource,
 109         .num_resources = 1,
 110 };
 111
 112 /* USB */
 113
 114 #if defined(CONFIG_USB_ULPI)
 115
 116 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
 117                         PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
 118
 119 static int usbotg_init(struct platform_device *pdev)
 120 {
 121         unsigned int pins[] = {
 122                 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
 123                 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
 124                 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
 125                 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
 126                 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
 127                 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
 128                 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
 129                 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
 130                 MX31_PIN_USBOTG_CLK__USBOTG_CLK,
 131                 MX31_PIN_USBOTG_DIR__USBOTG_DIR,
 132                 MX31_PIN_USBOTG_NXT__USBOTG_NXT,
 133                 MX31_PIN_USBOTG_STP__USBOTG_STP,
 134         };
 135
 136         mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB OTG");
 137
 138         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
 139         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
 140         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
 141         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
 142         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
 143         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
 144         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
 145         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
 146         mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
 147         mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
 148         mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
 149         mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
 150
 151         mxc_iomux_set_gpr(MUX_PGP_USB_4WIRE, true);
 152         mxc_iomux_set_gpr(MUX_PGP_USB_COMMON, true);
 153
 154         /* chip select */
 155         mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE2, IOMUX_CONFIG_GPIO),
 156                                 "USBOTG_CS");
 157         gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), "USBH1 CS");
 158         gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), 0);
 159
 160         return 0;
 161 }
 162
 163 static int usbh1_init(struct platform_device *pdev)
 164 {
 165         int pins[] = {
 166                 MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
 167                 MX31_PIN_CSPI1_MISO__USBH1_RXDP,
 168                 MX31_PIN_CSPI1_SS0__USBH1_TXDM,
 169                 MX31_PIN_CSPI1_SS1__USBH1_TXDP,
 170                 MX31_PIN_CSPI1_SS2__USBH1_RCV,
 171                 MX31_PIN_CSPI1_SCLK__USBH1_OEB,
 172                 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS,
 173         };
 174
 175         mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H1");
 176
 177         mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
 178         mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
 179         mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
 180         mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
 181         mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
 182         mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
 183         mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
 184
 185         mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
 186
 187         return 0;
 188 }
 189
 190 static int usbh2_init(struct platform_device *pdev)
 191 {
 192         int pins[] = {
 193                 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
 194                 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
 195                 MX31_PIN_USBH2_CLK__USBH2_CLK,
 196                 MX31_PIN_USBH2_DIR__USBH2_DIR,
 197                 MX31_PIN_USBH2_NXT__USBH2_NXT,
 198                 MX31_PIN_USBH2_STP__USBH2_STP,
 199         };
 200
 201         mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
 202
 203         mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
 204         mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
 205         mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
 206         mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
 207         mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
 208         mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
 209         mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
 210         mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
 211         mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
 212         mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
 213         mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
 214         mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
 215
 216         mxc_iomux_set_gpr(MUX_PGP_UH2, true);
 217
 218         /* chip select */
 219         mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
 220                                 "USBH2_CS");
 221         gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
 222         gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
 223
 224         return 0;
 225 }
 226
 227 static struct mxc_usbh_platform_data usbotg_pdata = {
 228         .init   = usbotg_init,
 229         .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
 230         .flags  = MXC_EHCI_POWER_PINS_ENABLED,
 231 };
 232
 233 static struct mxc_usbh_platform_data usbh1_pdata = {
 234         .init   = usbh1_init,
 235         .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
 236         .flags  = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI,
 237 };
 238
 239 static struct mxc_usbh_platform_data usbh2_pdata = {
 240         .init   = usbh2_init,
 241         .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
 242         .flags  = MXC_EHCI_POWER_PINS_ENABLED,
 243 };
 244
 245 static void lilly1131_usb_init(void)
 246 {
 247         usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
 248                                 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
 249         usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
 250                                 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
 251
 252         mxc_register_device(&mxc_usbh1, &usbh1_pdata);
 253         mxc_register_device(&mxc_usbh2, &usbh2_pdata);
 254 }
 255
 256 #else
 257 static inline void lilly1131_usb_init(void) {}
 258 #endif /* CONFIG_USB_ULPI */
 259
 260 /* SPI */
 261
 262 static int spi_internal_chipselect[] = {
 263         MXC_SPI_CS(0),
 264         MXC_SPI_CS(1),
 265         MXC_SPI_CS(2),
 266 };
 267
 268 static const struct spi_imx_master spi0_pdata __initconst = {
 269         .chipselect = spi_internal_chipselect,
 270         .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
 271 };
 272
 273 static const struct spi_imx_master spi1_pdata __initconst = {
 274         .chipselect = spi_internal_chipselect,
 275         .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
 276 };
 277
 278 static struct mc13783_platform_data mc13783_pdata __initdata = {
 279         .flags = MC13783_USE_RTC | MC13783_USE_TOUCHSCREEN,
 280 };
 281
 282 static struct spi_board_info mc13783_dev __initdata = {
 283         .modalias       = "mc13783",
 284         .max_speed_hz   = 1000000,
 285         .bus_num        = 1,
 286         .chip_select    = 0,
 287         .platform_data  = &mc13783_pdata,
 288         .irq            = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
 289 };
 290
 291 static struct platform_device *devices[] __initdata = {
 292         &smsc91x_device,
 293         &physmap_flash_device,
 294 };
 295
 296 static int mx31lilly_baseboard;
 297 core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444);
 298
 299 static void __init mx31lilly_board_init(void)
 300 {
 301         switch (mx31lilly_baseboard) {
 302         case MX31LILLY_NOBOARD:
 303                 break;
 304         case MX31LILLY_DB:
 305                 mx31lilly_db_init();
 306                 break;
 307         default:
 308                 printk(KERN_ERR "Illegal mx31lilly_baseboard type %d\n",
 309                         mx31lilly_baseboard);
 310         }
 311
 312         mxc_iomux_alloc_pin(MX31_PIN_CS4__CS4, "Ethernet CS");
 313
 314         /* SPI */
 315         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SCLK__SCLK, "SPI1_CLK");
 316         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MOSI__MOSI, "SPI1_TX");
 317         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MISO__MISO, "SPI1_RX");
 318         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, "SPI1_RDY");
 319         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS0__SS0, "SPI1_SS0");
 320         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS1__SS1, "SPI1_SS1");
 321         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS2__SS2, "SPI1_SS2");
 322
 323         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SCLK__SCLK, "SPI2_CLK");
 324         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MOSI__MOSI, "SPI2_TX");
 325         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MISO__MISO, "SPI2_RX");
 326         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, "SPI2_RDY");
 327         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS0__SS0, "SPI2_SS0");
 328         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS1__SS1, "SPI2_SS1");
 329         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS2__SS2, "SPI2_SS2");
 330
 331         imx31_add_spi_imx0(&spi0_pdata);
 332         imx31_add_spi_imx1(&spi1_pdata);
 333         spi_register_board_info(&mc13783_dev, 1);
 334
 335         platform_add_devices(devices, ARRAY_SIZE(devices));
 336
 337         /* USB */
 338         lilly1131_usb_init();
 339 }
 340
 341 static void __init mx31lilly_timer_init(void)
 342 {
 343         mx31_clocks_init(26000000);
 344 }
 345
 346 static struct sys_timer mx31lilly_timer = {
 347         .init   = mx31lilly_timer_init,
 348 };
 349
 350 MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
 351         .phys_io        = MX31_AIPS1_BASE_ADDR,
 352         .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
 353         .boot_params    = MX3x_PHYS_OFFSET + 0x100,
 354         .map_io         = mx31_map_io,
 355         .init_irq       = mx31_init_irq,
 356         .init_machine   = mx31lilly_board_init,
 357         .timer          = &mx31lilly_timer,
 358 MACHINE_END
 359