x86: Make the vdso2c compiler use the host architecture headers
[linux/fpc-iii.git] / arch / arm / boot / dts / armada-398-db.dts
blob788c3badb681ca99c3942ee6e8a4d47162e8601d
1 /*
2  * Device Tree Include file for Marvell Armada 398 Development Board
3  *
4  * Copyright (C) 2015 Marvell
5  *
6  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7  *
8  * This file is dual-licensed: you can use it either under the terms
9  * of the GPL or the X11 license, at your option. Note that this dual
10  * licensing only applies to this file, and not this project as a
11  * whole.
12  *
13  *  a) This file is free software; you can redistribute it and/or
14  *     modify it under the terms of the GNU General Public License as
15  *     published by the Free Software Foundation; either version 2 of the
16  *     License, or (at your option) any later version.
17  *
18  *     This file is distributed in the hope that it will be useful
19  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
20  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21  *     GNU General Public License for more details.
22  *
23  * Or, alternatively
24  *
25  *  b) Permission is hereby granted, free of charge, to any person
26  *     obtaining a copy of this software and associated documentation
27  *     files (the "Software"), to deal in the Software without
28  *     restriction, including without limitation the rights to use
29  *     copy, modify, merge, publish, distribute, sublicense, and/or
30  *     sell copies of the Software, and to permit persons to whom the
31  *     Software is furnished to do so, subject to the following
32  *     conditions:
33  *
34  *     The above copyright notice and this permission notice shall be
35  *     included in all copies or substantial portions of the Software.
36  *
37  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
38  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
42  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44  *     OTHER DEALINGS IN THE SOFTWARE.
45  */
47 /dts-v1/;
48 #include "armada-398.dtsi"
50 / {
51         model = "Marvell Armada 398 Development Board";
52         compatible = "marvell,a398-db", "marvell,armada398", "marvell,armada390";
54         chosen {
55                 stdout-path = "serial0:115200n8";
56         };
58         memory {
59                 device_type = "memory";
60                 reg = <0x00000000 0x80000000>; /* 2 GB */
61         };
63         soc {
64                 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
65                           MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
67                 internal-regs {
68                         spi@10680 {
69                                 status = "okay";
70                                 pinctrl-0 = <&spi1_pins>;
71                                 pinctrl-names = "default";
73                                 spi-flash@0 {
74                                         #address-cells = <1>;
75                                         #size-cells = <0>;
76                                         compatible = "n25q128a13", "jedec,spi-nor";
77                                         reg = <0>;
78                                         spi-max-frequency = <108000000>;
80                                         partition@0 {
81                                                 label = "U-Boot";
82                                                 reg = <0 0x400000>;
83                                         };
85                                         partition@400000 {
86                                                 label = "Filesystem";
87                                                 reg = <0x400000 0x1000000>;
88                                         };
89                                 };
90                         };
92                         i2c@11000 {
93                                 pinctrl-0 = <&i2c0_pins>;
94                                 pinctrl-names = "default";
95                                 status = "okay";
96                                 clock-frequency = <100000>;
97                         };
99                         serial@12000 {
100                                 pinctrl-0 = <&uart0_pins>;
101                                 pinctrl-names = "default";
102                                 status = "okay";
103                         };
105                         serial@12100 {
106                                 pinctrl-0 = <&uart1_pins>;
107                                 pinctrl-names = "default";
108                                 status = "okay";
109                         };
111                         flash@d0000 {
112                                 status = "okay";
113                                 pinctrl-0 = <&nand_pins>;
114                                 pinctrl-names = "default";
115                                 num-cs = <1>;
116                                 marvell,nand-keep-config;
117                                 marvell,nand-enable-arbiter;
118                                 nand-on-flash-bbt;
119                                 nand-ecc-strength = <8>;
120                                 nand-ecc-step-size = <512>;
122                                 partition@0 {
123                                         label = "U-Boot";
124                                         reg = <0 0x800000>;
125                                 };
126                                 partition@800000 {
127                                         label = "Linux";
128                                         reg = <0x800000 0x800000>;
129                                 };
130                                 partition@1000000 {
131                                         label = "Filesystem";
132                                         reg = <0x1000000 0x3f000000>;
133                                 };
134                         };
135                 };
137                 pcie-controller {
138                         status = "okay";
140                         pcie@1,0 {
141                                 status = "okay";
142                         };
144                         pcie@2,0 {
145                                 status = "okay";
146                         };
148                         pcie@3,0 {
149                                 status = "okay";
150                         };
151                 };
152         };