arch/arm/boot/dts/at91sam9x5_can.dtsi

   1 /*
   2  * at91sam9x5_can.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1
   3  * Ethernet interface.
   4  *
   5  * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
   6  *
   7  * Licensed under GPLv2.
   8  */
   9
  10 #include <dt-bindings/pinctrl/at91.h>
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12
  13 / {
  14         ahb {
  15                 apb {
  16                         pmc: pmc@fffffc00 {
  17                                 periphck {
  18                                         can0_clk: can0_clk {
  19                                                 #clock-cells = <0>;
  20                                                 reg = <29>;
  21                                         };
  22
  23                                         can1_clk: can1_clk {
  24                                                 #clock-cells = <0>;
  25                                                 reg = <30>;
  26                                         };
  27                                 };
  28                         };
  29
  30                         can0: can@f8000000 {
  31                                 compatible = "atmel,at91sam9x5-can";
  32                                 reg = <0xf8000000 0x300>;
  33                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>;
  34                                 pinctrl-names = "default";
  35                                 pinctrl-0 = <&pinctrl_can0_rx_tx>;
  36                                 clocks = <&can0_clk>;
  37                                 clock-names = "can_clk";
  38                                 status = "disabled";
  39                         };
  40
  41                         can1: can@f8004000 {
  42                                 compatible = "atmel,at91sam9x5-can";
  43                                 reg = <0xf8004000 0x300>;
  44                                 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>;
  45                                 pinctrl-names = "default";
  46                                 pinctrl-0 = <&pinctrl_can1_rx_tx>;
  47                                 clocks = <&can1_clk>;
  48                                 clock-names = "can_clk";
  49                                 status = "disabled";
  50                         };
  51
  52                         pinctrl@fffff400 {
  53                                 can0 {
  54                                         pinctrl_can0_rx_tx: can0_rx_tx {
  55                                                 atmel,pins =
  56                                                         <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE    /* CANRX0, conflicts with DRXD */
  57                                                         AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* CANTX0, conflicts with DTXD */
  58                                         };
  59                                 };
  60
  61                                 can1 {
  62                                         pinctrl_can1_rx_tx: can1_rx_tx {
  63                                                 atmel,pins =
  64                                                         <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE    /* CANRX1, conflicts with RXD1 */
  65                                                         AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;   /* CANTX1, conflicts with TXD1 */
  66                                         };
  67                                 };
  68                         };
  69                 };
  70         };
  71 };