arch/arm/boot/dts/qcom-msm8660.dtsi

   1 /dts-v1/;
   2
   3 /include/ "skeleton.dtsi"
   4
   5 #include <dt-bindings/interrupt-controller/arm-gic.h>
   6 #include <dt-bindings/clock/qcom,gcc-msm8660.h>
   7 #include <dt-bindings/soc/qcom,gsbi.h>
   8
   9 / {
  10         model = "Qualcomm MSM8660";
  11         compatible = "qcom,msm8660";
  12         interrupt-parent = <&intc>;
  13
  14         cpus {
  15                 #address-cells = <1>;
  16                 #size-cells = <0>;
  17
  18                 cpu@0 {
  19                         compatible = "qcom,scorpion";
  20                         enable-method = "qcom,gcc-msm8660";
  21                         device_type = "cpu";
  22                         reg = <0>;
  23                         next-level-cache = <&L2>;
  24                 };
  25
  26                 cpu@1 {
  27                         compatible = "qcom,scorpion";
  28                         enable-method = "qcom,gcc-msm8660";
  29                         device_type = "cpu";
  30                         reg = <1>;
  31                         next-level-cache = <&L2>;
  32                 };
  33
  34                 L2: l2-cache {
  35                         compatible = "cache";
  36                         cache-level = <2>;
  37                 };
  38         };
  39
  40         cpu-pmu {
  41                 compatible = "qcom,scorpion-mp-pmu";
  42                 interrupts = <1 9 0x304>;
  43         };
  44
  45         clocks {
  46                 cxo_board {
  47                         compatible = "fixed-clock";
  48                         #clock-cells = <0>;
  49                         clock-frequency = <19200000>;
  50                 };
  51
  52                 pxo_board {
  53                         compatible = "fixed-clock";
  54                         #clock-cells = <0>;
  55                         clock-frequency = <27000000>;
  56                 };
  57
  58                 sleep_clk {
  59                         compatible = "fixed-clock";
  60                         #clock-cells = <0>;
  61                         clock-frequency = <32768>;
  62                 };
  63         };
  64
  65         soc: soc {
  66                 #address-cells = <1>;
  67                 #size-cells = <1>;
  68                 ranges;
  69                 compatible = "simple-bus";
  70
  71                 intc: interrupt-controller@2080000 {
  72                         compatible = "qcom,msm-8660-qgic";
  73                         interrupt-controller;
  74                         #interrupt-cells = <3>;
  75                         reg = < 0x02080000 0x1000 >,
  76                               < 0x02081000 0x1000 >;
  77                 };
  78
  79                 timer@2000000 {
  80                         compatible = "qcom,scss-timer", "qcom,msm-timer";
  81                         interrupts = <1 0 0x301>,
  82                                      <1 1 0x301>,
  83                                      <1 2 0x301>;
  84                         reg = <0x02000000 0x100>;
  85                         clock-frequency = <27000000>,
  86                                           <32768>;
  87                         cpu-offset = <0x40000>;
  88                 };
  89
  90                 tlmm: pinctrl@800000 {
  91                         compatible = "qcom,msm8660-pinctrl";
  92                         reg = <0x800000 0x4000>;
  93
  94                         gpio-controller;
  95                         #gpio-cells = <2>;
  96                         interrupts = <0 16 0x4>;
  97                         interrupt-controller;
  98                         #interrupt-cells = <2>;
  99
 100                 };
 101
 102                 gcc: clock-controller@900000 {
 103                         compatible = "qcom,gcc-msm8660";
 104                         #clock-cells = <1>;
 105                         #reset-cells = <1>;
 106                         reg = <0x900000 0x4000>;
 107                 };
 108
 109                 gsbi12: gsbi@19c00000 {
 110                         compatible = "qcom,gsbi-v1.0.0";
 111                         cell-index = <12>;
 112                         reg = <0x19c00000 0x100>;
 113                         clocks = <&gcc GSBI12_H_CLK>;
 114                         clock-names = "iface";
 115                         #address-cells = <1>;
 116                         #size-cells = <1>;
 117                         ranges;
 118
 119                         syscon-tcsr = <&tcsr>;
 120
 121                         gsbi12_serial: serial@19c40000 {
 122                                 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
 123                                 reg = <0x19c40000 0x1000>,
 124                                       <0x19c00000 0x1000>;
 125                                 interrupts = <0 195 0x0>;
 126                                 clocks = <&gcc GSBI12_UART_CLK>, <&gcc GSBI12_H_CLK>;
 127                                 clock-names = "core", "iface";
 128                                 status = "disabled";
 129                         };
 130                 };
 131
 132                 qcom,ssbi@500000 {
 133                         compatible = "qcom,ssbi";
 134                         reg = <0x500000 0x1000>;
 135                         qcom,controller-type = "pmic-arbiter";
 136
 137                         pmicintc: pmic@0 {
 138                                 compatible = "qcom,pm8058";
 139                                 interrupt-parent = <&tlmm>;
 140                                 interrupts = <88 8>;
 141                                 #interrupt-cells = <2>;
 142                                 interrupt-controller;
 143                                 #address-cells = <1>;
 144                                 #size-cells = <0>;
 145
 146                                 pwrkey@1c {
 147                                         compatible = "qcom,pm8058-pwrkey";
 148                                         reg = <0x1c>;
 149                                         interrupt-parent = <&pmicintc>;
 150                                         interrupts = <50 1>, <51 1>;
 151                                         debounce = <15625>;
 152                                         pull-up;
 153                                 };
 154
 155                                 keypad@148 {
 156                                         compatible = "qcom,pm8058-keypad";
 157                                         reg = <0x148>;
 158                                         interrupt-parent = <&pmicintc>;
 159                                         interrupts = <74 1>, <75 1>;
 160                                         debounce = <15>;
 161                                         scan-delay = <32>;
 162                                         row-hold = <91500>;
 163                                 };
 164
 165                                 rtc@11d {
 166                                         compatible = "qcom,pm8058-rtc";
 167                                         interrupt-parent = <&pmicintc>;
 168                                         interrupts = <39 1>;
 169                                         reg = <0x11d>;
 170                                         allow-set-time;
 171                                 };
 172
 173                                 vibrator@4a {
 174                                         compatible = "qcom,pm8058-vib";
 175                                         reg = <0x4a>;
 176                                 };
 177                         };
 178                 };
 179
 180                 /* Temporary fixed regulator */
 181                 vsdcc_fixed: vsdcc-regulator {
 182                         compatible = "regulator-fixed";
 183                         regulator-name = "SDCC Power";
 184                         regulator-min-microvolt = <2700000>;
 185                         regulator-max-microvolt = <2700000>;
 186                         regulator-always-on;
 187                 };
 188
 189                 amba {
 190                         compatible = "simple-bus";
 191                         #address-cells = <1>;
 192                         #size-cells = <1>;
 193                         ranges;
 194                         sdcc1: sdcc@12400000 {
 195                                 status          = "disabled";
 196                                 compatible      = "arm,pl18x", "arm,primecell";
 197                                 arm,primecell-periphid = <0x00051180>;
 198                                 reg             = <0x12400000 0x8000>;
 199                                 interrupts      = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
 200                                 interrupt-names = "cmd_irq";
 201                                 clocks          = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
 202                                 clock-names     = "mclk", "apb_pclk";
 203                                 bus-width       = <8>;
 204                                 max-frequency   = <48000000>;
 205                                 non-removable;
 206                                 cap-sd-highspeed;
 207                                 cap-mmc-highspeed;
 208                                 vmmc-supply = <&vsdcc_fixed>;
 209                         };
 210
 211                         sdcc3: sdcc@12180000 {
 212                                 compatible      = "arm,pl18x", "arm,primecell";
 213                                 arm,primecell-periphid = <0x00051180>;
 214                                 status          = "disabled";
 215                                 reg             = <0x12180000 0x8000>;
 216                                 interrupts      = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 217                                 interrupt-names = "cmd_irq";
 218                                 clocks          = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
 219                                 clock-names     = "mclk", "apb_pclk";
 220                                 bus-width       = <4>;
 221                                 cap-sd-highspeed;
 222                                 cap-mmc-highspeed;
 223                                 max-frequency   = <48000000>;
 224                                 no-1-8-v;
 225                                 vmmc-supply = <&vsdcc_fixed>;
 226                         };
 227                 };
 228
 229                 tcsr: syscon@1a400000 {
 230                         compatible = "qcom,tcsr-msm8660", "syscon";
 231                         reg = <0x1a400000 0x100>;
 232                 };
 233         };
 234
 235 };