arch/arm/mach-s3c24xx/osiris.h

   1 /*
   2  * Copyright 2005 Simtec Electronics
   3  *      http://www.simtec.co.uk/products/
   4  *      Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * OSIRIS - CPLD control constants
   7  * OSIRIS - Memory map definitions
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12 */
  13
  14 #ifndef __MACH_S3C24XX_OSIRIS_H
  15 #define __MACH_S3C24XX_OSIRIS_H __FILE__
  16
  17 /* CTRL0 - NAND WP control */
  18
  19 #define OSIRIS_CTRL0_NANDSEL            (0x3)
  20 #define OSIRIS_CTRL0_BOOT_INT           (1<<3)
  21 #define OSIRIS_CTRL0_PCMCIA             (1<<4)
  22 #define OSIRIS_CTRL0_FIX8               (1<<5)
  23 #define OSIRIS_CTRL0_PCMCIA_nWAIT       (1<<6)
  24 #define OSIRIS_CTRL0_PCMCIA_nIOIS16     (1<<7)
  25
  26 #define OSIRIS_CTRL1_FIX8               (1<<0)
  27
  28 #define OSIRIS_ID_REVMASK               (0x7)
  29
  30 /* start peripherals off after the S3C2410 */
  31
  32 #define OSIRIS_IOADDR(x)        (S3C2410_ADDR((x) + 0x04000000))
  33
  34 #define OSIRIS_PA_CPLD          (S3C2410_CS1 | (1<<26))
  35
  36 /* we put the CPLD registers next, to get them out of the way */
  37
  38 #define OSIRIS_VA_CTRL0         OSIRIS_IOADDR(0x00000000)
  39 #define OSIRIS_PA_CTRL0         (OSIRIS_PA_CPLD)
  40
  41 #define OSIRIS_VA_CTRL1         OSIRIS_IOADDR(0x00100000)
  42 #define OSIRIS_PA_CTRL1         (OSIRIS_PA_CPLD + (1<<23))
  43
  44 #define OSIRIS_VA_CTRL2         OSIRIS_IOADDR(0x00200000)
  45 #define OSIRIS_PA_CTRL2         (OSIRIS_PA_CPLD + (2<<23))
  46
  47 #define OSIRIS_VA_CTRL3         OSIRIS_IOADDR(0x00300000)
  48 #define OSIRIS_PA_CTRL3         (OSIRIS_PA_CPLD + (2<<23))
  49
  50 #define OSIRIS_VA_IDREG         OSIRIS_IOADDR(0x00700000)
  51 #define OSIRIS_PA_IDREG         (OSIRIS_PA_CPLD + (7<<23))
  52
  53 #endif /* __MACH_S3C24XX_OSIRIS_H */