2 #include "phy_calibration.h"
5 #include <linux/slab.h>
8 * true : read command process successfully
9 * false : register not support
10 * RegisterNo : start base
11 * pRegisterData : data point
12 * NumberOfData : number of register data
13 * Flag : AUTO_INCREMENT - RegisterNo will auto increment 4
14 * NO_INCREMENT - Function will write data into the same register
16 unsigned char Wb35Reg_BurstWrite(struct hw_data
*pHwData
, u16 RegisterNo
,
17 u32
*pRegisterData
, u8 NumberOfData
, u8 Flag
)
19 struct wb35_reg
*reg
= &pHwData
->reg
;
20 struct urb
*urb
= NULL
;
21 struct wb35_reg_queue
*reg_queue
= NULL
;
23 struct usb_ctrlrequest
*dr
;
24 u16 i
, DataSize
= NumberOfData
* 4;
27 if (pHwData
->SurpriseRemove
)
30 /* Trying to use burst write function if use new hardware */
31 UrbSize
= sizeof(struct wb35_reg_queue
) + DataSize
+ sizeof(struct usb_ctrlrequest
);
32 reg_queue
= kzalloc(UrbSize
, GFP_ATOMIC
);
33 if (reg_queue
== NULL
)
36 urb
= usb_alloc_urb(0, GFP_ATOMIC
);
42 reg_queue
->DIRECT
= 2; /* burst write register */
43 reg_queue
->INDEX
= RegisterNo
;
44 reg_queue
->pBuffer
= (u32
*)((u8
*)reg_queue
+ sizeof(struct wb35_reg_queue
));
45 memcpy(reg_queue
->pBuffer
, pRegisterData
, DataSize
);
46 /* the function for reversing register data from little endian to big endian */
47 for (i
= 0; i
< NumberOfData
; i
++)
48 reg_queue
->pBuffer
[i
] = cpu_to_le32(reg_queue
->pBuffer
[i
]);
50 dr
= (struct usb_ctrlrequest
*)((u8
*)reg_queue
+ sizeof(struct wb35_reg_queue
) + DataSize
);
51 dr
->bRequestType
= USB_TYPE_VENDOR
| USB_DIR_OUT
| USB_RECIP_DEVICE
;
52 dr
->bRequest
= 0x04; /* USB or vendor-defined request code, burst mode */
53 dr
->wValue
= cpu_to_le16(Flag
); /* 0: Register number auto-increment, 1: No auto increment */
54 dr
->wIndex
= cpu_to_le16(RegisterNo
);
55 dr
->wLength
= cpu_to_le16(DataSize
);
56 reg_queue
->Next
= NULL
;
57 reg_queue
->pUsbReq
= dr
;
60 spin_lock_irq(®
->EP0VM_spin_lock
);
61 if (reg
->reg_first
== NULL
)
62 reg
->reg_first
= reg_queue
;
64 reg
->reg_last
->Next
= reg_queue
;
65 reg
->reg_last
= reg_queue
;
67 spin_unlock_irq(®
->EP0VM_spin_lock
);
70 Wb35Reg_EP0VM_start(pHwData
);
75 void Wb35Reg_Update(struct hw_data
*pHwData
, u16 RegisterNo
, u32 RegisterValue
)
77 struct wb35_reg
*reg
= &pHwData
->reg
;
80 reg
->U1B0
= RegisterValue
;
83 reg
->U1BC_LEDConfigure
= RegisterValue
;
86 reg
->D00_DmaControl
= RegisterValue
;
89 reg
->M00_MacControl
= RegisterValue
;
92 reg
->M04_MulticastAddress1
= RegisterValue
;
95 reg
->M08_MulticastAddress2
= RegisterValue
;
98 reg
->M24_MacControl
= RegisterValue
;
101 reg
->M28_MacControl
= RegisterValue
;
104 reg
->M2C_MacControl
= RegisterValue
;
107 reg
->M38_MacControl
= RegisterValue
;
110 reg
->M40_MacControl
= RegisterValue
;
113 reg
->M44_MacControl
= RegisterValue
;
116 reg
->M48_MacControl
= RegisterValue
;
119 reg
->M4C_MacStatus
= RegisterValue
;
122 reg
->M60_MacControl
= RegisterValue
;
125 reg
->M68_MacControl
= RegisterValue
;
128 reg
->M70_MacControl
= RegisterValue
;
131 reg
->M74_MacControl
= RegisterValue
;
134 reg
->M78_ERPInformation
= RegisterValue
;
137 reg
->M7C_MacControl
= RegisterValue
;
140 reg
->M80_MacControl
= RegisterValue
;
143 reg
->M84_MacControl
= RegisterValue
;
146 reg
->M88_MacControl
= RegisterValue
;
149 reg
->M98_MacControl
= RegisterValue
;
152 reg
->BB0C
= RegisterValue
;
155 reg
->BB2C
= RegisterValue
;
158 reg
->BB30
= RegisterValue
;
161 reg
->BB3C
= RegisterValue
;
164 reg
->BB48
= RegisterValue
;
167 reg
->BB4C
= RegisterValue
;
170 reg
->BB50
= RegisterValue
;
173 reg
->BB54
= RegisterValue
;
176 reg
->BB58
= RegisterValue
;
179 reg
->BB5C
= RegisterValue
;
182 reg
->BB60
= RegisterValue
;
188 * true : read command process successfully
189 * false : register not support
191 unsigned char Wb35Reg_WriteSync(struct hw_data
*pHwData
, u16 RegisterNo
,
194 struct wb35_reg
*reg
= &pHwData
->reg
;
197 /* Module shutdown */
198 if (pHwData
->SurpriseRemove
)
201 RegisterValue
= cpu_to_le32(RegisterValue
);
203 /* update the register by send usb message */
204 reg
->SyncIoPause
= 1;
206 /* Wait until EP0VM stop */
207 while (reg
->EP0vm_state
!= VM_STOP
)
210 /* Sync IoCallDriver */
211 reg
->EP0vm_state
= VM_RUNNING
;
212 ret
= usb_control_msg(pHwData
->udev
,
213 usb_sndctrlpipe(pHwData
->udev
, 0),
215 USB_TYPE_VENDOR
| USB_RECIP_DEVICE
| USB_DIR_OUT
,
216 0x0, RegisterNo
, &RegisterValue
, 4, HZ
* 100);
217 reg
->EP0vm_state
= VM_STOP
;
218 reg
->SyncIoPause
= 0;
220 Wb35Reg_EP0VM_start(pHwData
);
223 pr_debug("EP0 Write register usb message sending error\n");
224 pHwData
->SurpriseRemove
= 1;
231 * true : read command process successfully
232 * false : register not support
234 unsigned char Wb35Reg_Write(struct hw_data
*pHwData
, u16 RegisterNo
,
237 struct wb35_reg
*reg
= &pHwData
->reg
;
238 struct usb_ctrlrequest
*dr
;
239 struct urb
*urb
= NULL
;
240 struct wb35_reg_queue
*reg_queue
= NULL
;
243 /* Module shutdown */
244 if (pHwData
->SurpriseRemove
)
247 /* update the register by send urb request */
248 UrbSize
= sizeof(struct wb35_reg_queue
) + sizeof(struct usb_ctrlrequest
);
249 reg_queue
= kzalloc(UrbSize
, GFP_ATOMIC
);
250 if (reg_queue
== NULL
)
253 urb
= usb_alloc_urb(0, GFP_ATOMIC
);
259 reg_queue
->DIRECT
= 1; /* burst write register */
260 reg_queue
->INDEX
= RegisterNo
;
261 reg_queue
->VALUE
= cpu_to_le32(RegisterValue
);
262 reg_queue
->RESERVED_VALID
= false;
263 dr
= (struct usb_ctrlrequest
*)((u8
*)reg_queue
+ sizeof(struct wb35_reg_queue
));
264 dr
->bRequestType
= USB_TYPE_VENDOR
| USB_DIR_OUT
| USB_RECIP_DEVICE
;
265 dr
->bRequest
= 0x03; /* USB or vendor-defined request code, burst mode */
266 dr
->wValue
= cpu_to_le16(0x0);
267 dr
->wIndex
= cpu_to_le16(RegisterNo
);
268 dr
->wLength
= cpu_to_le16(4);
270 /* Enter the sending queue */
271 reg_queue
->Next
= NULL
;
272 reg_queue
->pUsbReq
= dr
;
273 reg_queue
->urb
= urb
;
275 spin_lock_irq(®
->EP0VM_spin_lock
);
276 if (reg
->reg_first
== NULL
)
277 reg
->reg_first
= reg_queue
;
279 reg
->reg_last
->Next
= reg_queue
;
280 reg
->reg_last
= reg_queue
;
282 spin_unlock_irq(®
->EP0VM_spin_lock
);
285 Wb35Reg_EP0VM_start(pHwData
);
291 * This command will be executed with a user defined value. When it completes,
292 * this value is useful. For example, hal_set_current_channel will use it.
293 * true : read command process successfully
294 * false : register not supported
296 unsigned char Wb35Reg_WriteWithCallbackValue(struct hw_data
*pHwData
,
302 struct wb35_reg
*reg
= &pHwData
->reg
;
303 struct usb_ctrlrequest
*dr
;
304 struct urb
*urb
= NULL
;
305 struct wb35_reg_queue
*reg_queue
= NULL
;
308 /* Module shutdown */
309 if (pHwData
->SurpriseRemove
)
312 /* update the register by send urb request */
313 UrbSize
= sizeof(struct wb35_reg_queue
) + sizeof(struct usb_ctrlrequest
);
314 reg_queue
= kzalloc(UrbSize
, GFP_ATOMIC
);
315 if (reg_queue
== NULL
)
318 urb
= usb_alloc_urb(0, GFP_ATOMIC
);
324 reg_queue
->DIRECT
= 1; /* burst write register */
325 reg_queue
->INDEX
= RegisterNo
;
326 reg_queue
->VALUE
= cpu_to_le32(RegisterValue
);
327 /* NOTE : Users must guarantee the size of value will not exceed the buffer size. */
328 memcpy(reg_queue
->RESERVED
, pValue
, Len
);
329 reg_queue
->RESERVED_VALID
= true;
330 dr
= (struct usb_ctrlrequest
*)((u8
*)reg_queue
+ sizeof(struct wb35_reg_queue
));
331 dr
->bRequestType
= USB_TYPE_VENDOR
| USB_DIR_OUT
| USB_RECIP_DEVICE
;
332 dr
->bRequest
= 0x03; /* USB or vendor-defined request code, burst mode */
333 dr
->wValue
= cpu_to_le16(0x0);
334 dr
->wIndex
= cpu_to_le16(RegisterNo
);
335 dr
->wLength
= cpu_to_le16(4);
337 /* Enter the sending queue */
338 reg_queue
->Next
= NULL
;
339 reg_queue
->pUsbReq
= dr
;
340 reg_queue
->urb
= urb
;
341 spin_lock_irq(®
->EP0VM_spin_lock
);
342 if (reg
->reg_first
== NULL
)
343 reg
->reg_first
= reg_queue
;
345 reg
->reg_last
->Next
= reg_queue
;
346 reg
->reg_last
= reg_queue
;
348 spin_unlock_irq(®
->EP0VM_spin_lock
);
351 Wb35Reg_EP0VM_start(pHwData
);
357 * true : read command process successfully
358 * false : register not support
359 * pRegisterValue : It must be a resident buffer due to
360 * asynchronous read register.
362 unsigned char Wb35Reg_ReadSync(struct hw_data
*pHwData
, u16 RegisterNo
,
365 struct wb35_reg
*reg
= &pHwData
->reg
;
366 u32
*pltmp
= pRegisterValue
;
369 /* Module shutdown */
370 if (pHwData
->SurpriseRemove
)
373 /* Read the register by send usb message */
374 reg
->SyncIoPause
= 1;
376 /* Wait until EP0VM stop */
377 while (reg
->EP0vm_state
!= VM_STOP
)
380 reg
->EP0vm_state
= VM_RUNNING
;
381 ret
= usb_control_msg(pHwData
->udev
,
382 usb_rcvctrlpipe(pHwData
->udev
, 0),
384 USB_TYPE_VENDOR
| USB_RECIP_DEVICE
| USB_DIR_IN
,
385 0x0, RegisterNo
, pltmp
, 4, HZ
* 100);
387 *pRegisterValue
= cpu_to_le32(*pltmp
);
389 reg
->EP0vm_state
= VM_STOP
;
391 Wb35Reg_Update(pHwData
, RegisterNo
, *pRegisterValue
);
392 reg
->SyncIoPause
= 0;
394 Wb35Reg_EP0VM_start(pHwData
);
397 pr_debug("EP0 Read register usb message sending error\n");
398 pHwData
->SurpriseRemove
= 1;
405 * true : read command process successfully
406 * false : register not support
407 * pRegisterValue : It must be a resident buffer due to
408 * asynchronous read register.
410 unsigned char Wb35Reg_Read(struct hw_data
*pHwData
, u16 RegisterNo
,
413 struct wb35_reg
*reg
= &pHwData
->reg
;
414 struct usb_ctrlrequest
*dr
;
416 struct wb35_reg_queue
*reg_queue
;
419 /* Module shutdown */
420 if (pHwData
->SurpriseRemove
)
423 /* update the variable by send Urb to read register */
424 UrbSize
= sizeof(struct wb35_reg_queue
) + sizeof(struct usb_ctrlrequest
);
425 reg_queue
= kzalloc(UrbSize
, GFP_ATOMIC
);
426 if (reg_queue
== NULL
)
429 urb
= usb_alloc_urb(0, GFP_ATOMIC
);
434 reg_queue
->DIRECT
= 0; /* read register */
435 reg_queue
->INDEX
= RegisterNo
;
436 reg_queue
->pBuffer
= pRegisterValue
;
437 dr
= (struct usb_ctrlrequest
*)((u8
*)reg_queue
+ sizeof(struct wb35_reg_queue
));
438 dr
->bRequestType
= USB_TYPE_VENDOR
| USB_RECIP_DEVICE
| USB_DIR_IN
;
439 dr
->bRequest
= 0x01; /* USB or vendor-defined request code, burst mode */
440 dr
->wValue
= cpu_to_le16(0x0);
441 dr
->wIndex
= cpu_to_le16(RegisterNo
);
442 dr
->wLength
= cpu_to_le16(4);
444 /* Enter the sending queue */
445 reg_queue
->Next
= NULL
;
446 reg_queue
->pUsbReq
= dr
;
447 reg_queue
->urb
= urb
;
448 spin_lock_irq(®
->EP0VM_spin_lock
);
449 if (reg
->reg_first
== NULL
)
450 reg
->reg_first
= reg_queue
;
452 reg
->reg_last
->Next
= reg_queue
;
453 reg
->reg_last
= reg_queue
;
455 spin_unlock_irq(®
->EP0VM_spin_lock
);
458 Wb35Reg_EP0VM_start(pHwData
);
464 void Wb35Reg_EP0VM_start(struct hw_data
*pHwData
)
466 struct wb35_reg
*reg
= &pHwData
->reg
;
468 if (atomic_inc_return(®
->RegFireCount
) == 1) {
469 reg
->EP0vm_state
= VM_RUNNING
;
470 Wb35Reg_EP0VM(pHwData
);
472 atomic_dec(®
->RegFireCount
);
475 void Wb35Reg_EP0VM(struct hw_data
*pHwData
)
477 struct wb35_reg
*reg
= &pHwData
->reg
;
479 struct usb_ctrlrequest
*dr
;
482 struct wb35_reg_queue
*reg_queue
;
485 if (reg
->SyncIoPause
)
488 if (pHwData
->SurpriseRemove
)
491 /* Get the register data and send to USB through Irp */
492 spin_lock_irq(®
->EP0VM_spin_lock
);
493 reg_queue
= reg
->reg_first
;
494 spin_unlock_irq(®
->EP0VM_spin_lock
);
499 /* Get an Urb, send it */
500 urb
= (struct urb
*)reg_queue
->urb
;
502 dr
= reg_queue
->pUsbReq
;
503 urb
= reg_queue
->urb
;
504 pBuffer
= reg_queue
->pBuffer
;
505 if (reg_queue
->DIRECT
== 1) /* output */
506 pBuffer
= ®_queue
->VALUE
;
508 usb_fill_control_urb(urb
, pHwData
->udev
,
509 REG_DIRECTION(pHwData
->udev
, reg_queue
),
510 (u8
*)dr
, pBuffer
, cpu_to_le16(dr
->wLength
),
511 Wb35Reg_EP0VM_complete
, (void *)pHwData
);
513 reg
->EP0vm_state
= VM_RUNNING
;
515 ret
= usb_submit_urb(urb
, GFP_ATOMIC
);
518 pr_debug("EP0 Irp sending error\n");
524 reg
->EP0vm_state
= VM_STOP
;
525 atomic_dec(®
->RegFireCount
);
529 void Wb35Reg_EP0VM_complete(struct urb
*urb
)
531 struct hw_data
*pHwData
= (struct hw_data
*)urb
->context
;
532 struct wb35_reg
*reg
= &pHwData
->reg
;
533 struct wb35_reg_queue
*reg_queue
;
536 /* Variable setting */
537 reg
->EP0vm_state
= VM_COMPLETED
;
538 reg
->EP0VM_status
= urb
->status
;
540 if (pHwData
->SurpriseRemove
) { /* Let WbWlanHalt to handle surprise remove */
541 reg
->EP0vm_state
= VM_STOP
;
542 atomic_dec(®
->RegFireCount
);
544 /* Complete to send, remove the URB from the first */
545 spin_lock_irq(®
->EP0VM_spin_lock
);
546 reg_queue
= reg
->reg_first
;
547 if (reg_queue
== reg
->reg_last
)
548 reg
->reg_last
= NULL
;
549 reg
->reg_first
= reg
->reg_first
->Next
;
550 spin_unlock_irq(®
->EP0VM_spin_lock
);
552 if (reg
->EP0VM_status
) {
553 pr_debug("EP0 IoCompleteRoutine return error\n");
554 reg
->EP0vm_state
= VM_STOP
;
555 pHwData
->SurpriseRemove
= 1;
557 /* Success. Update the result */
559 /* Start the next send */
560 Wb35Reg_EP0VM(pHwData
);
570 void Wb35Reg_destroy(struct hw_data
*pHwData
)
572 struct wb35_reg
*reg
= &pHwData
->reg
;
574 struct wb35_reg_queue
*reg_queue
;
576 Uxx_power_off_procedure(pHwData
);
578 /* Wait for Reg operation completed */
580 msleep(10); /* Delay for waiting function enter */
581 } while (reg
->EP0vm_state
!= VM_STOP
);
582 msleep(10); /* Delay for waiting function enter */
584 /* Release all the data in RegQueue */
585 spin_lock_irq(®
->EP0VM_spin_lock
);
586 reg_queue
= reg
->reg_first
;
588 if (reg_queue
== reg
->reg_last
)
589 reg
->reg_last
= NULL
;
590 reg
->reg_first
= reg
->reg_first
->Next
;
592 urb
= reg_queue
->urb
;
593 spin_unlock_irq(®
->EP0VM_spin_lock
);
598 pr_debug("EP0 queue release error\n");
600 spin_lock_irq(®
->EP0VM_spin_lock
);
602 reg_queue
= reg
->reg_first
;
604 spin_unlock_irq(®
->EP0VM_spin_lock
);
608 * =======================================================================
609 * The function can be run in passive-level only.
610 * =========================================================================
612 unsigned char Wb35Reg_initial(struct hw_data
*pHwData
)
614 struct wb35_reg
*reg
= &pHwData
->reg
;
616 u32 SoftwareSet
, VCO_trim
, TxVga
, Region_ScanInterval
;
618 /* Spin lock is acquired for read and write IRP command */
619 spin_lock_init(®
->EP0VM_spin_lock
);
621 /* Getting RF module type from EEPROM */
622 Wb35Reg_WriteSync(pHwData
, 0x03b4, 0x080d0000); /* Start EEPROM access + Read + address(0x0d) */
623 Wb35Reg_ReadSync(pHwData
, 0x03b4, <mp
);
625 /* Update RF module type and determine the PHY type by inf or EEPROM */
626 reg
->EEPROMPhyType
= (u8
)(ltmp
& 0xff);
628 * 0 V MAX2825, 1 V MAX2827, 2 V MAX2828, 3 V MAX2829
629 * 16V AL2230, 17 - AL7230, 18 - AL2230S
631 * 33 - W89RF242(TxVGA 0~19), 34 - W89RF242(TxVGA 0~34)
633 if (reg
->EEPROMPhyType
!= RF_DECIDE_BY_INF
) {
634 if ((reg
->EEPROMPhyType
== RF_MAXIM_2825
) ||
635 (reg
->EEPROMPhyType
== RF_MAXIM_2827
) ||
636 (reg
->EEPROMPhyType
== RF_MAXIM_2828
) ||
637 (reg
->EEPROMPhyType
== RF_MAXIM_2829
) ||
638 (reg
->EEPROMPhyType
== RF_MAXIM_V1
) ||
639 (reg
->EEPROMPhyType
== RF_AIROHA_2230
) ||
640 (reg
->EEPROMPhyType
== RF_AIROHA_2230S
) ||
641 (reg
->EEPROMPhyType
== RF_AIROHA_7230
) ||
642 (reg
->EEPROMPhyType
== RF_WB_242
) ||
643 (reg
->EEPROMPhyType
== RF_WB_242_1
))
644 pHwData
->phy_type
= reg
->EEPROMPhyType
;
647 /* Power On procedure running. The relative parameter will be set according to phy_type */
648 Uxx_power_on_procedure(pHwData
);
650 /* Reading MAC address */
651 Uxx_ReadEthernetAddress(pHwData
);
653 /* Read VCO trim for RF parameter */
654 Wb35Reg_WriteSync(pHwData
, 0x03b4, 0x08200000);
655 Wb35Reg_ReadSync(pHwData
, 0x03b4, &VCO_trim
);
657 /* Read Antenna On/Off of software flag */
658 Wb35Reg_WriteSync(pHwData
, 0x03b4, 0x08210000);
659 Wb35Reg_ReadSync(pHwData
, 0x03b4, &SoftwareSet
);
662 Wb35Reg_WriteSync(pHwData
, 0x03b4, 0x08100000);
663 Wb35Reg_ReadSync(pHwData
, 0x03b4, &TxVga
);
665 /* Get Scan interval setting from EEPROM offset 0x1c */
666 Wb35Reg_WriteSync(pHwData
, 0x03b4, 0x081d0000);
667 Wb35Reg_ReadSync(pHwData
, 0x03b4, &Region_ScanInterval
);
669 /* Update Ethernet address */
670 memcpy(pHwData
->CurrentMacAddress
, pHwData
->PermanentMacAddress
, ETH_ALEN
);
672 /* Update software variable */
673 pHwData
->SoftwareSet
= (u16
)(SoftwareSet
& 0xffff);
675 pHwData
->PowerIndexFromEEPROM
= (u8
)TxVga
;
676 pHwData
->VCO_trim
= (u8
)VCO_trim
& 0xff;
677 if (pHwData
->VCO_trim
== 0xff)
678 pHwData
->VCO_trim
= 0x28;
680 reg
->EEPROMRegion
= (u8
)(Region_ScanInterval
>> 8);
681 if (reg
->EEPROMRegion
< 1 || reg
->EEPROMRegion
> 6)
682 reg
->EEPROMRegion
= REGION_AUTO
;
684 /* For Get Tx VGA from EEPROM */
685 GetTxVgaFromEEPROM(pHwData
);
687 /* Set Scan Interval */
688 pHwData
->Scan_Interval
= (u8
)(Region_ScanInterval
& 0xff) * 10;
689 if ((pHwData
->Scan_Interval
== 2550) || (pHwData
->Scan_Interval
< 10)) /* Is default setting 0xff * 10 */
690 pHwData
->Scan_Interval
= SCAN_MAX_CHNL_TIME
;
692 /* Initial register */
693 RFSynthesizer_initial(pHwData
);
695 BBProcessor_initial(pHwData
); /* Async write, must wait until complete */
697 Wb35Reg_phy_calibration(pHwData
);
699 Mxx_initial(pHwData
);
700 Dxx_initial(pHwData
);
702 if (pHwData
->SurpriseRemove
)
705 return true; /* Initial fail */
709 * ================================================================
713 * Runs the AUTODIN II CRC algorithm on the buffers Buffer length.
716 * Buffer - the input buffer
717 * Length - the length of Buffer
720 * The 32-bit CRC value.
721 * ===================================================================
723 u32
CardComputeCrc(u8
*Buffer
, u32 Length
)
731 for (i
= 0; i
< Length
; i
++) {
733 for (j
= 0; j
< 8; j
++) {
734 Carry
= ((Crc
& 0x80000000) ? 1 : 0) ^ (CurByte
& 0x01);
738 Crc
= (Crc
^ 0x04c11db6) | Carry
;
746 * ==================================================================
748 * Reverse the bits in the input argument, dwData, which is
749 * regarded as a string of bits with the length, DataLength.
756 * The converted value.
757 * ==================================================================
759 u32
BitReverse(u32 dwData
, u32 DataLength
)
761 u32 HalfLength
, i
, j
;
765 return 0; /* No conversion is done. */
766 dwData
= dwData
& (0xffffffff >> (32 - DataLength
));
768 HalfLength
= DataLength
/ 2;
769 for (i
= 0, j
= DataLength
- 1; i
< HalfLength
; i
++, j
--) {
770 BitA
= GetBit(dwData
, i
);
771 BitB
= GetBit(dwData
, j
);
773 dwData
= ClearBit(dwData
, i
);
774 dwData
= SetBit(dwData
, j
);
775 } else if (!BitA
&& BitB
) {
776 dwData
= SetBit(dwData
, i
);
777 dwData
= ClearBit(dwData
, j
);
779 /* Do nothing since these two bits are of the save values. */
785 void Wb35Reg_phy_calibration(struct hw_data
*pHwData
)
789 if ((pHwData
->phy_type
== RF_WB_242
) ||
790 (pHwData
->phy_type
== RF_WB_242_1
)) {
791 phy_calibration_winbond(pHwData
, 2412); /* Sync operation */
792 Wb35Reg_ReadSync(pHwData
, 0x103c, &BB3c
);
793 Wb35Reg_ReadSync(pHwData
, 0x1054, &BB54
);
795 pHwData
->BB3c_cal
= BB3c
;
796 pHwData
->BB54_cal
= BB54
;
798 RFSynthesizer_initial(pHwData
);
799 BBProcessor_initial(pHwData
); /* Async operation */
801 Wb35Reg_WriteSync(pHwData
, 0x103c, BB3c
);
802 Wb35Reg_WriteSync(pHwData
, 0x1054, BB54
);