1 * STMicroelectronics sdhci-st MMC/SD controller
3 This file documents the differences between the core properties in
4 Documentation/devicetree/bindings/mmc/mmc.txt and the properties
5 used by the sdhci-st driver.
8 - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407"
9 to set the internal glue logic used for configuring the MMC
10 subsystem (mmcss) inside the FlashSS (available in STiH407 SoC
13 - clock-names: Should be "mmc".
14 See: Documentation/devicetree/bindings/resource-names.txt
15 - clocks: Phandle to the clock.
16 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
18 - interrupts: One mmc interrupt should be described here.
19 - interrupt-names: Should be "mmcirq".
21 - pinctrl-names: A pinctrl state names "default" must be defined.
22 - pinctrl-0: Phandle referencing pin configuration of the sd/emmc controller.
23 See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt
25 - reg: This must provide the host controller base address and it can also
26 contain the FlashSS Top register for TX/RX delay used by the driver
27 to configure DLL inside the flashSS, if so reg-names must also be
31 - reg-names: Should be "mmc" and "top-mmc-delay". "top-mmc-delay" is optional
32 for eMMC on stih407 family silicon to configure DLL inside FlashSS.
34 - non-removable: Non-removable slot. Also used for configuring mmcss in STiH407 SoC
36 See: Documentation/devicetree/bindings/mmc/mmc.txt.
38 - bus-width: Number of data lines.
39 See: Documentation/devicetree/bindings/mmc/mmc.txt.
41 - max-frequency: Can be 200MHz, 100Mz or 50MHz (default) and used for
42 configuring the CCONFIG3 in the mmcss.
43 See: Documentation/devicetree/bindings/mmc/mmc.txt.
45 - resets: Phandle and reset specifier pair to softreset line of HC IP.
46 See: Documentation/devicetree/bindings/reset/reset.txt
48 - vqmmc-supply: Phandle to the regulator dt node, mentioned as the vcc/vdd
49 supply in eMMC/SD specs.
51 - sd-uhs--sdr50: To enable the SDR50 in the mmcss.
52 See: Documentation/devicetree/bindings/mmc/mmc.txt.
54 - sd-uhs-sdr104: To enable the SDR104 in the mmcss.
55 See: Documentation/devicetree/bindings/mmc/mmc.txt.
57 - sd-uhs-ddr50: To enable the DDR50 in the mmcss.
58 See: Documentation/devicetree/bindings/mmc/mmc.txt.
62 /* Example stih416e eMMC configuration */
64 mmc0: sdhci@fe81e000 {
65 compatible = "st,sdhci";
67 reg = <0xfe81e000 0x1000>;
68 interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>;
69 interrupt-names = "mmcirq";
70 pinctrl-names = "default";
71 pinctrl-0 = <&pinctrl_mmc0>;
73 clocks = <&clk_s_a1_ls 1>;
76 /* Example SD stih407 family configuration */
78 mmc1: sdhci@09080000 {
79 compatible = "st,sdhci-stih407", "st,sdhci";
81 reg = <0x09080000 0x7ff>;
83 interrupts = <GIC_SPI 90 IRQ_TYPE_NONE>;
84 interrupt-names = "mmcirq";
85 pinctrl-names = "default";
86 pinctrl-0 = <&pinctrl_sd1>;
88 clocks = <&clk_s_c0_flexgen CLK_MMC_1>;
89 resets = <&softreset STIH407_MMC1_SOFTRESET>;
93 /* Example eMMC stih407 family configuration */
95 mmc0: sdhci@09060000 {
96 compatible = "st,sdhci-stih407", "st,sdhci";
98 reg = <0x09060000 0x7ff>, <0x9061008 0x20>;
99 reg-names = "mmc", "top-mmc-delay";
100 interrupts = <GIC_SPI 92 IRQ_TYPE_NONE>;
101 interrupt-names = "mmcirq";
102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_mmc0>;
105 clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
106 vqmmc-supply = <&vmmc_reg>;
107 max-frequency = <200000000>;