2 * Just-In-Time compiler for BPF filters on 32bit ARM
4 * Copyright (c) 2011 Mircea Gherzan <mgherzan@gmail.com>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License.
11 #include <linux/bitops.h>
12 #include <linux/compiler.h>
13 #include <linux/errno.h>
14 #include <linux/filter.h>
15 #include <linux/netdevice.h>
16 #include <linux/string.h>
17 #include <linux/slab.h>
18 #include <linux/if_vlan.h>
20 #include <asm/cacheflush.h>
21 #include <asm/hwcap.h>
22 #include <asm/opcodes.h>
24 #include "bpf_jit_32.h"
32 * r6 pointer to the skb
37 #define r_scratch ARM_R0
38 /* r1-r3 are (also) used for the unaligned loads on the non-ARMv7 slowpath */
43 #define r_skb_data ARM_R7
44 #define r_skb_hl ARM_R8
46 #define SCRATCH_SP_OFFSET 0
47 #define SCRATCH_OFF(k) (SCRATCH_SP_OFFSET + 4 * (k))
49 #define SEEN_MEM ((1 << BPF_MEMWORDS) - 1)
50 #define SEEN_MEM_WORD(k) (1 << (k))
51 #define SEEN_X (1 << BPF_MEMWORDS)
52 #define SEEN_CALL (1 << (BPF_MEMWORDS + 1))
53 #define SEEN_SKB (1 << (BPF_MEMWORDS + 2))
54 #define SEEN_DATA (1 << (BPF_MEMWORDS + 3))
56 #define FLAG_NEED_X_RESET (1 << 0)
57 #define FLAG_IMM_OVERFLOW (1 << 1)
60 const struct bpf_prog
*skf
;
62 unsigned prologue_bytes
;
68 #if __LINUX_ARM_ARCH__ < 7
75 int bpf_jit_enable __read_mostly
;
77 static u64
jit_get_skb_b(struct sk_buff
*skb
, unsigned offset
)
82 err
= skb_copy_bits(skb
, offset
, &ret
, 1);
84 return (u64
)err
<< 32 | ret
;
87 static u64
jit_get_skb_h(struct sk_buff
*skb
, unsigned offset
)
92 err
= skb_copy_bits(skb
, offset
, &ret
, 2);
94 return (u64
)err
<< 32 | ntohs(ret
);
97 static u64
jit_get_skb_w(struct sk_buff
*skb
, unsigned offset
)
102 err
= skb_copy_bits(skb
, offset
, &ret
, 4);
104 return (u64
)err
<< 32 | ntohl(ret
);
108 * Wrapper that handles both OABI and EABI and assures Thumb2 interworking
109 * (where the assembly routines like __aeabi_uidiv could cause problems).
111 static u32
jit_udiv(u32 dividend
, u32 divisor
)
113 return dividend
/ divisor
;
116 static inline void _emit(int cond
, u32 inst
, struct jit_ctx
*ctx
)
118 inst
|= (cond
<< 28);
119 inst
= __opcode_to_mem_arm(inst
);
121 if (ctx
->target
!= NULL
)
122 ctx
->target
[ctx
->idx
] = inst
;
128 * Emit an instruction that will be executed unconditionally.
130 static inline void emit(u32 inst
, struct jit_ctx
*ctx
)
132 _emit(ARM_COND_AL
, inst
, ctx
);
135 static u16
saved_regs(struct jit_ctx
*ctx
)
139 if ((ctx
->skf
->len
> 1) ||
140 (ctx
->skf
->insns
[0].code
== (BPF_RET
| BPF_A
)))
143 #ifdef CONFIG_FRAME_POINTER
144 ret
|= (1 << ARM_FP
) | (1 << ARM_IP
) | (1 << ARM_LR
) | (1 << ARM_PC
);
146 if (ctx
->seen
& SEEN_CALL
)
149 if (ctx
->seen
& (SEEN_DATA
| SEEN_SKB
))
151 if (ctx
->seen
& SEEN_DATA
)
152 ret
|= (1 << r_skb_data
) | (1 << r_skb_hl
);
153 if (ctx
->seen
& SEEN_X
)
159 static inline int mem_words_used(struct jit_ctx
*ctx
)
161 /* yes, we do waste some stack space IF there are "holes" in the set" */
162 return fls(ctx
->seen
& SEEN_MEM
);
165 static void jit_fill_hole(void *area
, unsigned int size
)
168 /* We are guaranteed to have aligned memory. */
169 for (ptr
= area
; size
>= sizeof(u32
); size
-= sizeof(u32
))
170 *ptr
++ = __opcode_to_mem_arm(ARM_INST_UDF
);
173 static void build_prologue(struct jit_ctx
*ctx
)
175 u16 reg_set
= saved_regs(ctx
);
178 #ifdef CONFIG_FRAME_POINTER
179 emit(ARM_MOV_R(ARM_IP
, ARM_SP
), ctx
);
180 emit(ARM_PUSH(reg_set
), ctx
);
181 emit(ARM_SUB_I(ARM_FP
, ARM_IP
, 4), ctx
);
184 emit(ARM_PUSH(reg_set
), ctx
);
187 if (ctx
->seen
& (SEEN_DATA
| SEEN_SKB
))
188 emit(ARM_MOV_R(r_skb
, ARM_R0
), ctx
);
190 if (ctx
->seen
& SEEN_DATA
) {
191 off
= offsetof(struct sk_buff
, data
);
192 emit(ARM_LDR_I(r_skb_data
, r_skb
, off
), ctx
);
193 /* headlen = len - data_len */
194 off
= offsetof(struct sk_buff
, len
);
195 emit(ARM_LDR_I(r_skb_hl
, r_skb
, off
), ctx
);
196 off
= offsetof(struct sk_buff
, data_len
);
197 emit(ARM_LDR_I(r_scratch
, r_skb
, off
), ctx
);
198 emit(ARM_SUB_R(r_skb_hl
, r_skb_hl
, r_scratch
), ctx
);
201 if (ctx
->flags
& FLAG_NEED_X_RESET
)
202 emit(ARM_MOV_I(r_X
, 0), ctx
);
204 /* do not leak kernel data to userspace */
205 if (bpf_needs_clear_a(&ctx
->skf
->insns
[0]))
206 emit(ARM_MOV_I(r_A
, 0), ctx
);
208 /* stack space for the BPF_MEM words */
209 if (ctx
->seen
& SEEN_MEM
)
210 emit(ARM_SUB_I(ARM_SP
, ARM_SP
, mem_words_used(ctx
) * 4), ctx
);
213 static void build_epilogue(struct jit_ctx
*ctx
)
215 u16 reg_set
= saved_regs(ctx
);
217 if (ctx
->seen
& SEEN_MEM
)
218 emit(ARM_ADD_I(ARM_SP
, ARM_SP
, mem_words_used(ctx
) * 4), ctx
);
220 reg_set
&= ~(1 << ARM_LR
);
222 #ifdef CONFIG_FRAME_POINTER
223 /* the first instruction of the prologue was: mov ip, sp */
224 reg_set
&= ~(1 << ARM_IP
);
225 reg_set
|= (1 << ARM_SP
);
226 emit(ARM_LDM(ARM_SP
, reg_set
), ctx
);
229 if (ctx
->seen
& SEEN_CALL
)
230 reg_set
|= 1 << ARM_PC
;
231 emit(ARM_POP(reg_set
), ctx
);
234 if (!(ctx
->seen
& SEEN_CALL
))
235 emit(ARM_BX(ARM_LR
), ctx
);
239 static int16_t imm8m(u32 x
)
243 for (rot
= 0; rot
< 16; rot
++)
244 if ((x
& ~ror32(0xff, 2 * rot
)) == 0)
245 return rol32(x
, 2 * rot
) | (rot
<< 8);
250 #if __LINUX_ARM_ARCH__ < 7
252 static u16
imm_offset(u32 k
, struct jit_ctx
*ctx
)
254 unsigned i
= 0, offset
;
257 /* on the "fake" run we just count them (duplicates included) */
258 if (ctx
->target
== NULL
) {
263 while ((i
< ctx
->imm_count
) && ctx
->imms
[i
]) {
264 if (ctx
->imms
[i
] == k
)
269 if (ctx
->imms
[i
] == 0)
272 /* constants go just after the epilogue */
273 offset
= ctx
->offsets
[ctx
->skf
->len
];
274 offset
+= ctx
->prologue_bytes
;
275 offset
+= ctx
->epilogue_bytes
;
278 ctx
->target
[offset
/ 4] = k
;
280 /* PC in ARM mode == address of the instruction + 8 */
281 imm
= offset
- (8 + ctx
->idx
* 4);
285 * literal pool is too far, signal it into flags. we
286 * can only detect it on the second pass unfortunately.
288 ctx
->flags
|= FLAG_IMM_OVERFLOW
;
295 #endif /* __LINUX_ARM_ARCH__ */
298 * Move an immediate that's not an imm8m to a core register.
300 static inline void emit_mov_i_no8m(int rd
, u32 val
, struct jit_ctx
*ctx
)
302 #if __LINUX_ARM_ARCH__ < 7
303 emit(ARM_LDR_I(rd
, ARM_PC
, imm_offset(val
, ctx
)), ctx
);
305 emit(ARM_MOVW(rd
, val
& 0xffff), ctx
);
307 emit(ARM_MOVT(rd
, val
>> 16), ctx
);
311 static inline void emit_mov_i(int rd
, u32 val
, struct jit_ctx
*ctx
)
313 int imm12
= imm8m(val
);
316 emit(ARM_MOV_I(rd
, imm12
), ctx
);
318 emit_mov_i_no8m(rd
, val
, ctx
);
321 #if __LINUX_ARM_ARCH__ < 6
323 static void emit_load_be32(u8 cond
, u8 r_res
, u8 r_addr
, struct jit_ctx
*ctx
)
325 _emit(cond
, ARM_LDRB_I(ARM_R3
, r_addr
, 1), ctx
);
326 _emit(cond
, ARM_LDRB_I(ARM_R1
, r_addr
, 0), ctx
);
327 _emit(cond
, ARM_LDRB_I(ARM_R2
, r_addr
, 3), ctx
);
328 _emit(cond
, ARM_LSL_I(ARM_R3
, ARM_R3
, 16), ctx
);
329 _emit(cond
, ARM_LDRB_I(ARM_R0
, r_addr
, 2), ctx
);
330 _emit(cond
, ARM_ORR_S(ARM_R3
, ARM_R3
, ARM_R1
, SRTYPE_LSL
, 24), ctx
);
331 _emit(cond
, ARM_ORR_R(ARM_R3
, ARM_R3
, ARM_R2
), ctx
);
332 _emit(cond
, ARM_ORR_S(r_res
, ARM_R3
, ARM_R0
, SRTYPE_LSL
, 8), ctx
);
335 static void emit_load_be16(u8 cond
, u8 r_res
, u8 r_addr
, struct jit_ctx
*ctx
)
337 _emit(cond
, ARM_LDRB_I(ARM_R1
, r_addr
, 0), ctx
);
338 _emit(cond
, ARM_LDRB_I(ARM_R2
, r_addr
, 1), ctx
);
339 _emit(cond
, ARM_ORR_S(r_res
, ARM_R2
, ARM_R1
, SRTYPE_LSL
, 8), ctx
);
342 static inline void emit_swap16(u8 r_dst
, u8 r_src
, struct jit_ctx
*ctx
)
344 /* r_dst = (r_src << 8) | (r_src >> 8) */
345 emit(ARM_LSL_I(ARM_R1
, r_src
, 8), ctx
);
346 emit(ARM_ORR_S(r_dst
, ARM_R1
, r_src
, SRTYPE_LSR
, 8), ctx
);
349 * we need to mask out the bits set in r_dst[23:16] due to
350 * the first shift instruction.
352 * note that 0x8ff is the encoded immediate 0x00ff0000.
354 emit(ARM_BIC_I(r_dst
, r_dst
, 0x8ff), ctx
);
359 static void emit_load_be32(u8 cond
, u8 r_res
, u8 r_addr
, struct jit_ctx
*ctx
)
361 _emit(cond
, ARM_LDR_I(r_res
, r_addr
, 0), ctx
);
362 #ifdef __LITTLE_ENDIAN
363 _emit(cond
, ARM_REV(r_res
, r_res
), ctx
);
367 static void emit_load_be16(u8 cond
, u8 r_res
, u8 r_addr
, struct jit_ctx
*ctx
)
369 _emit(cond
, ARM_LDRH_I(r_res
, r_addr
, 0), ctx
);
370 #ifdef __LITTLE_ENDIAN
371 _emit(cond
, ARM_REV16(r_res
, r_res
), ctx
);
375 static inline void emit_swap16(u8 r_dst __maybe_unused
,
376 u8 r_src __maybe_unused
,
377 struct jit_ctx
*ctx __maybe_unused
)
379 #ifdef __LITTLE_ENDIAN
380 emit(ARM_REV16(r_dst
, r_src
), ctx
);
384 #endif /* __LINUX_ARM_ARCH__ < 6 */
387 /* Compute the immediate value for a PC-relative branch. */
388 static inline u32
b_imm(unsigned tgt
, struct jit_ctx
*ctx
)
392 if (ctx
->target
== NULL
)
395 * BPF allows only forward jumps and the offset of the target is
396 * still the one computed during the first pass.
398 imm
= ctx
->offsets
[tgt
] + ctx
->prologue_bytes
- (ctx
->idx
* 4 + 8);
403 #define OP_IMM3(op, r1, r2, imm_val, ctx) \
405 imm12 = imm8m(imm_val); \
407 emit_mov_i_no8m(r_scratch, imm_val, ctx); \
408 emit(op ## _R((r1), (r2), r_scratch), ctx); \
410 emit(op ## _I((r1), (r2), imm12), ctx); \
414 static inline void emit_err_ret(u8 cond
, struct jit_ctx
*ctx
)
416 if (ctx
->ret0_fp_idx
>= 0) {
417 _emit(cond
, ARM_B(b_imm(ctx
->ret0_fp_idx
, ctx
)), ctx
);
418 /* NOP to keep the size constant between passes */
419 emit(ARM_MOV_R(ARM_R0
, ARM_R0
), ctx
);
421 _emit(cond
, ARM_MOV_I(ARM_R0
, 0), ctx
);
422 _emit(cond
, ARM_B(b_imm(ctx
->skf
->len
, ctx
)), ctx
);
426 static inline void emit_blx_r(u8 tgt_reg
, struct jit_ctx
*ctx
)
428 #if __LINUX_ARM_ARCH__ < 5
429 emit(ARM_MOV_R(ARM_LR
, ARM_PC
), ctx
);
431 if (elf_hwcap
& HWCAP_THUMB
)
432 emit(ARM_BX(tgt_reg
), ctx
);
434 emit(ARM_MOV_R(ARM_PC
, tgt_reg
), ctx
);
436 emit(ARM_BLX_R(tgt_reg
), ctx
);
440 static inline void emit_udiv(u8 rd
, u8 rm
, u8 rn
, struct jit_ctx
*ctx
)
442 #if __LINUX_ARM_ARCH__ == 7
443 if (elf_hwcap
& HWCAP_IDIVA
) {
444 emit(ARM_UDIV(rd
, rm
, rn
), ctx
);
450 * For BPF_ALU | BPF_DIV | BPF_K instructions, rm is ARM_R4
451 * (r_A) and rn is ARM_R0 (r_scratch) so load rn first into
452 * ARM_R1 to avoid accidentally overwriting ARM_R0 with rm
453 * before using it as a source for ARM_R1.
455 * For BPF_ALU | BPF_DIV | BPF_X rm is ARM_R4 (r_A) and rn is
456 * ARM_R5 (r_X) so there is no particular register overlap
460 emit(ARM_MOV_R(ARM_R1
, rn
), ctx
);
462 emit(ARM_MOV_R(ARM_R0
, rm
), ctx
);
464 ctx
->seen
|= SEEN_CALL
;
465 emit_mov_i(ARM_R3
, (u32
)jit_udiv
, ctx
);
466 emit_blx_r(ARM_R3
, ctx
);
469 emit(ARM_MOV_R(rd
, ARM_R0
), ctx
);
472 static inline void update_on_xread(struct jit_ctx
*ctx
)
474 if (!(ctx
->seen
& SEEN_X
))
475 ctx
->flags
|= FLAG_NEED_X_RESET
;
480 static int build_body(struct jit_ctx
*ctx
)
482 void *load_func
[] = {jit_get_skb_b
, jit_get_skb_h
, jit_get_skb_w
};
483 const struct bpf_prog
*prog
= ctx
->skf
;
484 const struct sock_filter
*inst
;
485 unsigned i
, load_order
, off
, condt
;
489 for (i
= 0; i
< prog
->len
; i
++) {
492 inst
= &(prog
->insns
[i
]);
493 /* K as an immediate value operand */
495 code
= bpf_anc_helper(inst
);
497 /* compute offsets only in the fake pass */
498 if (ctx
->target
== NULL
)
499 ctx
->offsets
[i
] = ctx
->idx
* 4;
502 case BPF_LD
| BPF_IMM
:
503 emit_mov_i(r_A
, k
, ctx
);
505 case BPF_LD
| BPF_W
| BPF_LEN
:
506 ctx
->seen
|= SEEN_SKB
;
507 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff
, len
) != 4);
508 emit(ARM_LDR_I(r_A
, r_skb
,
509 offsetof(struct sk_buff
, len
)), ctx
);
511 case BPF_LD
| BPF_MEM
:
513 ctx
->seen
|= SEEN_MEM_WORD(k
);
514 emit(ARM_LDR_I(r_A
, ARM_SP
, SCRATCH_OFF(k
)), ctx
);
516 case BPF_LD
| BPF_W
| BPF_ABS
:
519 case BPF_LD
| BPF_H
| BPF_ABS
:
522 case BPF_LD
| BPF_B
| BPF_ABS
:
525 /* the interpreter will deal with the negative K */
528 emit_mov_i(r_off
, k
, ctx
);
530 ctx
->seen
|= SEEN_DATA
| SEEN_CALL
;
532 if (load_order
> 0) {
533 emit(ARM_SUB_I(r_scratch
, r_skb_hl
,
534 1 << load_order
), ctx
);
535 emit(ARM_CMP_R(r_scratch
, r_off
), ctx
);
538 emit(ARM_CMP_R(r_skb_hl
, r_off
), ctx
);
542 _emit(condt
, ARM_ADD_R(r_scratch
, r_off
, r_skb_data
),
546 _emit(condt
, ARM_LDRB_I(r_A
, r_scratch
, 0),
548 else if (load_order
== 1)
549 emit_load_be16(condt
, r_A
, r_scratch
, ctx
);
550 else if (load_order
== 2)
551 emit_load_be32(condt
, r_A
, r_scratch
, ctx
);
553 _emit(condt
, ARM_B(b_imm(i
+ 1, ctx
)), ctx
);
556 emit_mov_i(ARM_R3
, (u32
)load_func
[load_order
], ctx
);
557 emit(ARM_MOV_R(ARM_R0
, r_skb
), ctx
);
558 /* the offset is already in R1 */
559 emit_blx_r(ARM_R3
, ctx
);
560 /* check the result of skb_copy_bits */
561 emit(ARM_CMP_I(ARM_R1
, 0), ctx
);
562 emit_err_ret(ARM_COND_NE
, ctx
);
563 emit(ARM_MOV_R(r_A
, ARM_R0
), ctx
);
565 case BPF_LD
| BPF_W
| BPF_IND
:
568 case BPF_LD
| BPF_H
| BPF_IND
:
571 case BPF_LD
| BPF_B
| BPF_IND
:
574 OP_IMM3(ARM_ADD
, r_off
, r_X
, k
, ctx
);
576 case BPF_LDX
| BPF_IMM
:
578 emit_mov_i(r_X
, k
, ctx
);
580 case BPF_LDX
| BPF_W
| BPF_LEN
:
581 ctx
->seen
|= SEEN_X
| SEEN_SKB
;
582 emit(ARM_LDR_I(r_X
, r_skb
,
583 offsetof(struct sk_buff
, len
)), ctx
);
585 case BPF_LDX
| BPF_MEM
:
586 ctx
->seen
|= SEEN_X
| SEEN_MEM_WORD(k
);
587 emit(ARM_LDR_I(r_X
, ARM_SP
, SCRATCH_OFF(k
)), ctx
);
589 case BPF_LDX
| BPF_B
| BPF_MSH
:
590 /* x = ((*(frame + k)) & 0xf) << 2; */
591 ctx
->seen
|= SEEN_X
| SEEN_DATA
| SEEN_CALL
;
592 /* the interpreter should deal with the negative K */
595 /* offset in r1: we might have to take the slow path */
596 emit_mov_i(r_off
, k
, ctx
);
597 emit(ARM_CMP_R(r_skb_hl
, r_off
), ctx
);
599 /* load in r0: common with the slowpath */
600 _emit(ARM_COND_HI
, ARM_LDRB_R(ARM_R0
, r_skb_data
,
603 * emit_mov_i() might generate one or two instructions,
604 * the same holds for emit_blx_r()
606 _emit(ARM_COND_HI
, ARM_B(b_imm(i
+ 1, ctx
) - 2), ctx
);
608 emit(ARM_MOV_R(ARM_R0
, r_skb
), ctx
);
610 emit_mov_i(ARM_R3
, (u32
)jit_get_skb_b
, ctx
);
611 emit_blx_r(ARM_R3
, ctx
);
612 /* check the return value of skb_copy_bits */
613 emit(ARM_CMP_I(ARM_R1
, 0), ctx
);
614 emit_err_ret(ARM_COND_NE
, ctx
);
616 emit(ARM_AND_I(r_X
, ARM_R0
, 0x00f), ctx
);
617 emit(ARM_LSL_I(r_X
, r_X
, 2), ctx
);
620 ctx
->seen
|= SEEN_MEM_WORD(k
);
621 emit(ARM_STR_I(r_A
, ARM_SP
, SCRATCH_OFF(k
)), ctx
);
624 update_on_xread(ctx
);
625 ctx
->seen
|= SEEN_MEM_WORD(k
);
626 emit(ARM_STR_I(r_X
, ARM_SP
, SCRATCH_OFF(k
)), ctx
);
628 case BPF_ALU
| BPF_ADD
| BPF_K
:
630 OP_IMM3(ARM_ADD
, r_A
, r_A
, k
, ctx
);
632 case BPF_ALU
| BPF_ADD
| BPF_X
:
633 update_on_xread(ctx
);
634 emit(ARM_ADD_R(r_A
, r_A
, r_X
), ctx
);
636 case BPF_ALU
| BPF_SUB
| BPF_K
:
638 OP_IMM3(ARM_SUB
, r_A
, r_A
, k
, ctx
);
640 case BPF_ALU
| BPF_SUB
| BPF_X
:
641 update_on_xread(ctx
);
642 emit(ARM_SUB_R(r_A
, r_A
, r_X
), ctx
);
644 case BPF_ALU
| BPF_MUL
| BPF_K
:
646 emit_mov_i(r_scratch
, k
, ctx
);
647 emit(ARM_MUL(r_A
, r_A
, r_scratch
), ctx
);
649 case BPF_ALU
| BPF_MUL
| BPF_X
:
650 update_on_xread(ctx
);
651 emit(ARM_MUL(r_A
, r_A
, r_X
), ctx
);
653 case BPF_ALU
| BPF_DIV
| BPF_K
:
656 emit_mov_i(r_scratch
, k
, ctx
);
657 emit_udiv(r_A
, r_A
, r_scratch
, ctx
);
659 case BPF_ALU
| BPF_DIV
| BPF_X
:
660 update_on_xread(ctx
);
661 emit(ARM_CMP_I(r_X
, 0), ctx
);
662 emit_err_ret(ARM_COND_EQ
, ctx
);
663 emit_udiv(r_A
, r_A
, r_X
, ctx
);
665 case BPF_ALU
| BPF_OR
| BPF_K
:
667 OP_IMM3(ARM_ORR
, r_A
, r_A
, k
, ctx
);
669 case BPF_ALU
| BPF_OR
| BPF_X
:
670 update_on_xread(ctx
);
671 emit(ARM_ORR_R(r_A
, r_A
, r_X
), ctx
);
673 case BPF_ALU
| BPF_XOR
| BPF_K
:
675 OP_IMM3(ARM_EOR
, r_A
, r_A
, k
, ctx
);
677 case BPF_ANC
| SKF_AD_ALU_XOR_X
:
678 case BPF_ALU
| BPF_XOR
| BPF_X
:
680 update_on_xread(ctx
);
681 emit(ARM_EOR_R(r_A
, r_A
, r_X
), ctx
);
683 case BPF_ALU
| BPF_AND
| BPF_K
:
685 OP_IMM3(ARM_AND
, r_A
, r_A
, k
, ctx
);
687 case BPF_ALU
| BPF_AND
| BPF_X
:
688 update_on_xread(ctx
);
689 emit(ARM_AND_R(r_A
, r_A
, r_X
), ctx
);
691 case BPF_ALU
| BPF_LSH
| BPF_K
:
692 if (unlikely(k
> 31))
694 emit(ARM_LSL_I(r_A
, r_A
, k
), ctx
);
696 case BPF_ALU
| BPF_LSH
| BPF_X
:
697 update_on_xread(ctx
);
698 emit(ARM_LSL_R(r_A
, r_A
, r_X
), ctx
);
700 case BPF_ALU
| BPF_RSH
| BPF_K
:
701 if (unlikely(k
> 31))
703 emit(ARM_LSR_I(r_A
, r_A
, k
), ctx
);
705 case BPF_ALU
| BPF_RSH
| BPF_X
:
706 update_on_xread(ctx
);
707 emit(ARM_LSR_R(r_A
, r_A
, r_X
), ctx
);
709 case BPF_ALU
| BPF_NEG
:
711 emit(ARM_RSB_I(r_A
, r_A
, 0), ctx
);
713 case BPF_JMP
| BPF_JA
:
715 emit(ARM_B(b_imm(i
+ k
+ 1, ctx
)), ctx
);
717 case BPF_JMP
| BPF_JEQ
| BPF_K
:
718 /* pc += (A == K) ? pc->jt : pc->jf */
721 case BPF_JMP
| BPF_JGT
| BPF_K
:
722 /* pc += (A > K) ? pc->jt : pc->jf */
725 case BPF_JMP
| BPF_JGE
| BPF_K
:
726 /* pc += (A >= K) ? pc->jt : pc->jf */
731 emit_mov_i_no8m(r_scratch
, k
, ctx
);
732 emit(ARM_CMP_R(r_A
, r_scratch
), ctx
);
734 emit(ARM_CMP_I(r_A
, imm12
), ctx
);
738 _emit(condt
, ARM_B(b_imm(i
+ inst
->jt
+ 1,
741 _emit(condt
^ 1, ARM_B(b_imm(i
+ inst
->jf
+ 1,
744 case BPF_JMP
| BPF_JEQ
| BPF_X
:
745 /* pc += (A == X) ? pc->jt : pc->jf */
748 case BPF_JMP
| BPF_JGT
| BPF_X
:
749 /* pc += (A > X) ? pc->jt : pc->jf */
752 case BPF_JMP
| BPF_JGE
| BPF_X
:
753 /* pc += (A >= X) ? pc->jt : pc->jf */
756 update_on_xread(ctx
);
757 emit(ARM_CMP_R(r_A
, r_X
), ctx
);
759 case BPF_JMP
| BPF_JSET
| BPF_K
:
760 /* pc += (A & K) ? pc->jt : pc->jf */
762 /* not set iff all zeroes iff Z==1 iff EQ */
766 emit_mov_i_no8m(r_scratch
, k
, ctx
);
767 emit(ARM_TST_R(r_A
, r_scratch
), ctx
);
769 emit(ARM_TST_I(r_A
, imm12
), ctx
);
772 case BPF_JMP
| BPF_JSET
| BPF_X
:
773 /* pc += (A & X) ? pc->jt : pc->jf */
774 update_on_xread(ctx
);
776 emit(ARM_TST_R(r_A
, r_X
), ctx
);
778 case BPF_RET
| BPF_A
:
779 emit(ARM_MOV_R(ARM_R0
, r_A
), ctx
);
781 case BPF_RET
| BPF_K
:
782 if ((k
== 0) && (ctx
->ret0_fp_idx
< 0))
783 ctx
->ret0_fp_idx
= i
;
784 emit_mov_i(ARM_R0
, k
, ctx
);
786 if (i
!= ctx
->skf
->len
- 1)
787 emit(ARM_B(b_imm(prog
->len
, ctx
)), ctx
);
789 case BPF_MISC
| BPF_TAX
:
792 emit(ARM_MOV_R(r_X
, r_A
), ctx
);
794 case BPF_MISC
| BPF_TXA
:
796 update_on_xread(ctx
);
797 emit(ARM_MOV_R(r_A
, r_X
), ctx
);
799 case BPF_ANC
| SKF_AD_PROTOCOL
:
800 /* A = ntohs(skb->protocol) */
801 ctx
->seen
|= SEEN_SKB
;
802 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff
,
804 off
= offsetof(struct sk_buff
, protocol
);
805 emit(ARM_LDRH_I(r_scratch
, r_skb
, off
), ctx
);
806 emit_swap16(r_A
, r_scratch
, ctx
);
808 case BPF_ANC
| SKF_AD_CPU
:
809 /* r_scratch = current_thread_info() */
810 OP_IMM3(ARM_BIC
, r_scratch
, ARM_SP
, THREAD_SIZE
- 1, ctx
);
811 /* A = current_thread_info()->cpu */
812 BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info
, cpu
) != 4);
813 off
= offsetof(struct thread_info
, cpu
);
814 emit(ARM_LDR_I(r_A
, r_scratch
, off
), ctx
);
816 case BPF_ANC
| SKF_AD_IFINDEX
:
817 /* A = skb->dev->ifindex */
818 ctx
->seen
|= SEEN_SKB
;
819 off
= offsetof(struct sk_buff
, dev
);
820 emit(ARM_LDR_I(r_scratch
, r_skb
, off
), ctx
);
822 emit(ARM_CMP_I(r_scratch
, 0), ctx
);
823 emit_err_ret(ARM_COND_EQ
, ctx
);
825 BUILD_BUG_ON(FIELD_SIZEOF(struct net_device
,
827 off
= offsetof(struct net_device
, ifindex
);
828 emit(ARM_LDR_I(r_A
, r_scratch
, off
), ctx
);
830 case BPF_ANC
| SKF_AD_MARK
:
831 ctx
->seen
|= SEEN_SKB
;
832 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff
, mark
) != 4);
833 off
= offsetof(struct sk_buff
, mark
);
834 emit(ARM_LDR_I(r_A
, r_skb
, off
), ctx
);
836 case BPF_ANC
| SKF_AD_RXHASH
:
837 ctx
->seen
|= SEEN_SKB
;
838 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff
, hash
) != 4);
839 off
= offsetof(struct sk_buff
, hash
);
840 emit(ARM_LDR_I(r_A
, r_skb
, off
), ctx
);
842 case BPF_ANC
| SKF_AD_VLAN_TAG
:
843 case BPF_ANC
| SKF_AD_VLAN_TAG_PRESENT
:
844 ctx
->seen
|= SEEN_SKB
;
845 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff
, vlan_tci
) != 2);
846 off
= offsetof(struct sk_buff
, vlan_tci
);
847 emit(ARM_LDRH_I(r_A
, r_skb
, off
), ctx
);
848 if (code
== (BPF_ANC
| SKF_AD_VLAN_TAG
))
849 OP_IMM3(ARM_AND
, r_A
, r_A
, VLAN_VID_MASK
, ctx
);
851 OP_IMM3(ARM_AND
, r_A
, r_A
, VLAN_TAG_PRESENT
, ctx
);
853 case BPF_ANC
| SKF_AD_QUEUE
:
854 ctx
->seen
|= SEEN_SKB
;
855 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff
,
856 queue_mapping
) != 2);
857 BUILD_BUG_ON(offsetof(struct sk_buff
,
858 queue_mapping
) > 0xff);
859 off
= offsetof(struct sk_buff
, queue_mapping
);
860 emit(ARM_LDRH_I(r_A
, r_skb
, off
), ctx
);
866 if (ctx
->flags
& FLAG_IMM_OVERFLOW
)
868 * this instruction generated an overflow when
869 * trying to access the literal pool, so
870 * delegate this filter to the kernel interpreter.
875 /* compute offsets only during the first pass */
876 if (ctx
->target
== NULL
)
877 ctx
->offsets
[i
] = ctx
->idx
* 4;
883 void bpf_jit_compile(struct bpf_prog
*fp
)
885 struct bpf_binary_header
*header
;
894 memset(&ctx
, 0, sizeof(ctx
));
896 ctx
.ret0_fp_idx
= -1;
898 ctx
.offsets
= kzalloc(4 * (ctx
.skf
->len
+ 1), GFP_KERNEL
);
899 if (ctx
.offsets
== NULL
)
902 /* fake pass to fill in the ctx->seen */
903 if (unlikely(build_body(&ctx
)))
907 build_prologue(&ctx
);
908 ctx
.prologue_bytes
= (ctx
.idx
- tmp_idx
) * 4;
910 #if __LINUX_ARM_ARCH__ < 7
912 build_epilogue(&ctx
);
913 ctx
.epilogue_bytes
= (ctx
.idx
- tmp_idx
) * 4;
915 ctx
.idx
+= ctx
.imm_count
;
917 ctx
.imms
= kzalloc(4 * ctx
.imm_count
, GFP_KERNEL
);
918 if (ctx
.imms
== NULL
)
922 /* there's nothing after the epilogue on ARMv7 */
923 build_epilogue(&ctx
);
925 alloc_size
= 4 * ctx
.idx
;
926 header
= bpf_jit_binary_alloc(alloc_size
, &target_ptr
,
931 ctx
.target
= (u32
*) target_ptr
;
934 build_prologue(&ctx
);
935 if (build_body(&ctx
) < 0) {
936 #if __LINUX_ARM_ARCH__ < 7
940 bpf_jit_binary_free(header
);
943 build_epilogue(&ctx
);
945 flush_icache_range((u32
)ctx
.target
, (u32
)(ctx
.target
+ ctx
.idx
));
947 #if __LINUX_ARM_ARCH__ < 7
952 if (bpf_jit_enable
> 1)
953 /* there are 2 passes here */
954 bpf_jit_dump(fp
->len
, alloc_size
, 2, ctx
.target
);
956 set_memory_ro((unsigned long)header
, header
->pages
);
957 fp
->bpf_func
= (void *)ctx
.target
;
964 void bpf_jit_free(struct bpf_prog
*fp
)
966 unsigned long addr
= (unsigned long)fp
->bpf_func
& PAGE_MASK
;
967 struct bpf_binary_header
*header
= (void *)addr
;
972 set_memory_rw(addr
, header
->pages
);
973 bpf_jit_binary_free(header
);
976 bpf_prog_unlock_free(fp
);