drivers/clocksource/vt8500_timer.c

   1 /*
   2  *  arch/arm/mach-vt8500/timer.c
   3  *
   4  *  Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
   5  *  Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 /*
  23  * This file is copied and modified from the original timer.c provided by
  24  * Alexey Charkov. Minor changes have been made for Device Tree Support.
  25  */
  26
  27 #include <linux/io.h>
  28 #include <linux/irq.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/clocksource.h>
  31 #include <linux/clockchips.h>
  32 #include <linux/delay.h>
  33 #include <asm/mach/time.h>
  34
  35 #include <linux/of.h>
  36 #include <linux/of_address.h>
  37 #include <linux/of_irq.h>
  38
  39 #define VT8500_TIMER_OFFSET     0x0100
  40 #define VT8500_TIMER_HZ         3000000
  41 #define TIMER_MATCH_VAL         0x0000
  42 #define TIMER_COUNT_VAL         0x0010
  43 #define TIMER_STATUS_VAL        0x0014
  44 #define TIMER_IER_VAL           0x001c          /* interrupt enable */
  45 #define TIMER_CTRL_VAL          0x0020
  46 #define TIMER_AS_VAL            0x0024          /* access status */
  47 #define TIMER_COUNT_R_ACTIVE    (1 << 5)        /* not ready for read */
  48 #define TIMER_COUNT_W_ACTIVE    (1 << 4)        /* not ready for write */
  49 #define TIMER_MATCH_W_ACTIVE    (1 << 0)        /* not ready for write */
  50
  51 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  52
  53 #define MIN_OSCR_DELTA          16
  54
  55 static void __iomem *regbase;
  56
  57 static cycle_t vt8500_timer_read(struct clocksource *cs)
  58 {
  59         int loops = msecs_to_loops(10);
  60         writel(3, regbase + TIMER_CTRL_VAL);
  61         while ((readl((regbase + TIMER_AS_VAL)) & TIMER_COUNT_R_ACTIVE)
  62                                                 && --loops)
  63                 cpu_relax();
  64         return readl(regbase + TIMER_COUNT_VAL);
  65 }
  66
  67 static struct clocksource clocksource = {
  68         .name           = "vt8500_timer",
  69         .rating         = 200,
  70         .read           = vt8500_timer_read,
  71         .mask           = CLOCKSOURCE_MASK(32),
  72         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
  73 };
  74
  75 static int vt8500_timer_set_next_event(unsigned long cycles,
  76                                     struct clock_event_device *evt)
  77 {
  78         int loops = msecs_to_loops(10);
  79         cycle_t alarm = clocksource.read(&clocksource) + cycles;
  80         while ((readl(regbase + TIMER_AS_VAL) & TIMER_MATCH_W_ACTIVE)
  81                                                 && --loops)
  82                 cpu_relax();
  83         writel((unsigned long)alarm, regbase + TIMER_MATCH_VAL);
  84
  85         if ((signed)(alarm - clocksource.read(&clocksource)) <= MIN_OSCR_DELTA)
  86                 return -ETIME;
  87
  88         writel(1, regbase + TIMER_IER_VAL);
  89
  90         return 0;
  91 }
  92
  93 static void vt8500_timer_set_mode(enum clock_event_mode mode,
  94                               struct clock_event_device *evt)
  95 {
  96         switch (mode) {
  97         case CLOCK_EVT_MODE_RESUME:
  98         case CLOCK_EVT_MODE_PERIODIC:
  99                 break;
 100         case CLOCK_EVT_MODE_ONESHOT:
 101         case CLOCK_EVT_MODE_UNUSED:
 102         case CLOCK_EVT_MODE_SHUTDOWN:
 103                 writel(readl(regbase + TIMER_CTRL_VAL) | 1,
 104                         regbase + TIMER_CTRL_VAL);
 105                 writel(0, regbase + TIMER_IER_VAL);
 106                 break;
 107         }
 108 }
 109
 110 static struct clock_event_device clockevent = {
 111         .name           = "vt8500_timer",
 112         .features       = CLOCK_EVT_FEAT_ONESHOT,
 113         .rating         = 200,
 114         .set_next_event = vt8500_timer_set_next_event,
 115         .set_mode       = vt8500_timer_set_mode,
 116 };
 117
 118 static irqreturn_t vt8500_timer_interrupt(int irq, void *dev_id)
 119 {
 120         struct clock_event_device *evt = dev_id;
 121         writel(0xf, regbase + TIMER_STATUS_VAL);
 122         evt->event_handler(evt);
 123
 124         return IRQ_HANDLED;
 125 }
 126
 127 static struct irqaction irq = {
 128         .name    = "vt8500_timer",
 129         .flags   = IRQF_TIMER | IRQF_IRQPOLL,
 130         .handler = vt8500_timer_interrupt,
 131         .dev_id  = &clockevent,
 132 };
 133
 134 static void __init vt8500_timer_init(struct device_node *np)
 135 {
 136         int timer_irq;
 137
 138         regbase = of_iomap(np, 0);
 139         if (!regbase) {
 140                 pr_err("%s: Missing iobase description in Device Tree\n",
 141                                                                 __func__);
 142                 return;
 143         }
 144         timer_irq = irq_of_parse_and_map(np, 0);
 145         if (!timer_irq) {
 146                 pr_err("%s: Missing irq description in Device Tree\n",
 147                                                                 __func__);
 148                 return;
 149         }
 150
 151         writel(1, regbase + TIMER_CTRL_VAL);
 152         writel(0xf, regbase + TIMER_STATUS_VAL);
 153         writel(~0, regbase + TIMER_MATCH_VAL);
 154
 155         if (clocksource_register_hz(&clocksource, VT8500_TIMER_HZ))
 156                 pr_err("%s: vt8500_timer_init: clocksource_register failed for %s\n",
 157                                         __func__, clocksource.name);
 158
 159         clockevent.cpumask = cpumask_of(0);
 160
 161         if (setup_irq(timer_irq, &irq))
 162                 pr_err("%s: setup_irq failed for %s\n", __func__,
 163                                                         clockevent.name);
 164         clockevents_config_and_register(&clockevent, VT8500_TIMER_HZ,
 165                                         MIN_OSCR_DELTA * 2, 0xf0000000);
 166 }
 167
 168 CLOCKSOURCE_OF_DECLARE(vt8500, "via,vt8500-timer", vt8500_timer_init);