2 # DMA engine configuration
6 bool "DMA Engine support"
9 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
12 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
16 config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
23 config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
36 config INTEL_MIC_X100_DMA
37 tristate "Intel MIC X100 DMA Driver"
38 depends on 64BIT && X86 && INTEL_MIC_BUS
41 This enables DMA support for the Intel Many Integrated Core
42 (MIC) family of PCIe form factor coprocessor X100 devices that
43 run a 64 bit Linux OS. This driver will be used by both MIC
44 host and card drivers.
46 If you are building host kernel with a MIC device or a card
47 kernel for a MIC device, then say M (recommended) or Y, else
48 say N. If unsure say N.
50 More information about the Intel MIC family as well as the Linux
51 OS and tools for MIC to use with this driver are available from
52 <http://software.intel.com/en-us/mic-developer>.
54 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
58 bool "ARM PrimeCell PL080 or PL081 support"
61 select DMA_VIRTUAL_CHANNELS
63 Platform has a PL08x DMAC device
64 which can provide DMA engine support
67 tristate "Intel I/OAT DMA support"
70 select DMA_ENGINE_RAID
73 Enable support for the Intel(R) I/OAT DMA engine present
74 in recent Intel Xeon chipsets.
76 Say Y here if you have such a chipset.
81 tristate "Intel IOP ADMA support"
82 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
84 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
86 Enable support for the Intel(R) IOP Series RAID engines.
88 source "drivers/dma/dw/Kconfig"
91 tristate "Atmel AHB DMA support"
95 Support the Atmel AHB DMA controller.
98 tristate "Atmel XDMA support"
102 Support the Atmel XDMA controller.
105 tristate "Freescale Elo series DMA support"
108 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
110 Enable support for the Freescale Elo series DMA controllers.
111 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
112 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
113 some Txxx and Bxxx parts.
116 tristate "Freescale RAID engine Support"
117 depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
119 select DMA_ENGINE_RAID
121 Enable support for Freescale RAID Engine. RAID Engine is
122 available on some QorIQ SoCs (like P5020/P5040). It has
123 the capability to offload memcpy, xor and pq computation
126 source "drivers/dma/hsu/Kconfig"
129 tristate "Freescale MPC512x built-in DMA engine support"
130 depends on PPC_MPC512x || PPC_MPC831x
133 Enable support for the Freescale MPC512x built-in DMA engine.
135 source "drivers/dma/bestcomm/Kconfig"
138 bool "Marvell XOR engine support"
139 depends on PLAT_ORION
141 select DMA_ENGINE_RAID
142 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
144 Enable support for the Marvell XOR engine.
147 bool "MX3x Image Processing Unit support"
152 If you plan to use the Image Processing unit in the i.MX3x, say
153 Y here. If unsure, select Y.
156 int "Number of dynamically mapped interrupts for IPU"
161 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
162 To avoid bloating the irq_desc[] array we allocate a sufficient
163 number of IRQ slots and map them dynamically to specific sources.
166 tristate "Toshiba TXx9 SoC DMA support"
167 depends on MACH_TX49XX || MACH_TX39XX
170 Support the TXx9 SoC internal DMA controller. This can be
171 integrated in chips such as the Toshiba TX4927/38/39.
173 config TEGRA20_APB_DMA
174 bool "NVIDIA Tegra20 APB DMA support"
175 depends on ARCH_TEGRA
178 Support for the NVIDIA Tegra20 APB DMA controller driver. The
179 DMA controller is having multiple DMA channel which can be
180 configured for different peripherals like audio, UART, SPI,
181 I2C etc which is in APB bus.
182 This DMA controller transfers data from memory to peripheral fifo
183 or vice versa. It does not support memory to memory data transfer.
186 tristate "Samsung S3C24XX DMA support"
187 depends on ARCH_S3C24XX
189 select DMA_VIRTUAL_CHANNELS
191 Support for the Samsung S3C24XX DMA controller driver. The
192 DMA controller is having multiple DMA channels which can be
193 configured for different peripherals like audio, UART, SPI.
194 The DMA controller can transfer data from memory to peripheral,
195 periphal to memory, periphal to periphal and memory to memory.
197 source "drivers/dma/sh/Kconfig"
200 bool "ST-Ericsson COH901318 DMA support"
204 Enable support for ST-Ericsson COH 901 318 DMA.
207 bool "ST-Ericsson DMA40 support"
208 depends on ARCH_U8500
211 Support for ST-Ericsson DMA40 controller
213 config AMCC_PPC440SPE_ADMA
214 tristate "AMCC PPC440SPe ADMA support"
215 depends on 440SPe || 440SP
217 select DMA_ENGINE_RAID
218 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
219 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
221 Enable support for the AMCC PPC440SPe RAID engines.
224 tristate "Timberdale FPGA DMA support"
225 depends on MFD_TIMBERDALE
228 Enable support for the Timberdale FPGA DMA engine.
231 tristate "CSR SiRFprimaII/SiRFmarco DMA support"
235 Enable support for the CSR SiRFprimaII DMA engine.
238 bool "TI EDMA support"
239 depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE
241 select DMA_VIRTUAL_CHANNELS
245 Enable support for the TI EDMA controller. This DMA
246 engine is found on TI DaVinci and AM33xx parts.
248 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
252 tristate "DMA API Driver for PL330"
256 Select if your platform has one or more PL330 DMACs.
257 You need to provide platform specific settings via
258 platform_data for a dma-pl330 device.
261 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
262 depends on PCI && (X86_32 || COMPILE_TEST)
265 Enable support for Intel EG20T PCH DMA engine.
267 This driver also can be used for LAPIS Semiconductor IOH(Input/
268 Output Hub), ML7213, ML7223 and ML7831.
269 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
270 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
271 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
272 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
275 tristate "i.MX SDMA support"
279 Support the i.MX SDMA engine. This engine is integrated into
280 Freescale i.MX25/31/35/51/53/6 chips.
283 tristate "i.MX DMA support"
287 Support the i.MX DMA engine. This engine is integrated into
288 Freescale i.MX1/21/27 chips.
291 bool "MXS DMA support"
292 depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
296 Support the MXS DMA engine. This engine including APBH-DMA
297 and APBX-DMA is integrated into Freescale i.MX23/28/MX6Q/MX6DL chips.
300 bool "Cirrus Logic EP93xx DMA support"
301 depends on ARCH_EP93XX
304 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
307 tristate "SA-11x0 DMA support"
308 depends on ARCH_SA1100
310 select DMA_VIRTUAL_CHANNELS
312 Support the DMA engine found on Intel StrongARM SA-1100 and
313 SA-1110 SoCs. This DMA engine can only be used with on-chip
317 bool "MMP Two-Channel DMA support"
322 Support the MMP Two-Channel DMA engine.
323 This engine used for MMP Audio DMA and pxa910 SQU.
324 It needs sram driver under mach-mmp.
326 Say Y here if you enabled MMP ADMA, otherwise say N.
329 tristate "OMAP DMA support"
332 select DMA_VIRTUAL_CHANNELS
335 tristate "BCM2835 DMA engine support"
336 depends on ARCH_BCM2835
338 select DMA_VIRTUAL_CHANNELS
341 tristate "AM33xx CPPI41 DMA support"
345 The Communications Port Programming Interface (CPPI) 4.1 DMA engine
346 is currently used by the USB driver on AM335x platforms.
349 bool "MMP PDMA support"
350 depends on (ARCH_MMP || ARCH_PXA)
353 Support the MMP PDMA engine for PXA and MMP platform.
356 tristate "JZ4740 DMA support"
357 depends on MACH_JZ4740
359 select DMA_VIRTUAL_CHANNELS
362 tristate "JZ4780 DMA support"
363 depends on MACH_JZ4780
365 select DMA_VIRTUAL_CHANNELS
367 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
368 If you have a board based on such a SoC and wish to use DMA for
369 devices which can use the DMA controller, say Y or M here.
372 tristate "Hisilicon K3 DMA support"
373 depends on ARCH_HI3xxx
375 select DMA_VIRTUAL_CHANNELS
377 Support the DMA engine for Hisilicon K3 platform
381 tristate "MOXART DMA support"
382 depends on ARCH_MOXART
385 select DMA_VIRTUAL_CHANNELS
387 Enable support for the MOXA ART SoC DMA controller.
390 tristate "Freescale eDMA engine support"
393 select DMA_VIRTUAL_CHANNELS
395 Support the Freescale eDMA engine with programmable channel
396 multiplexing capability for DMA request sources(slot).
397 This module can be found on Freescale Vybrid and LS-1 SoCs.
400 tristate "Xilinx AXI VDMA Engine"
401 depends on (ARCH_ZYNQ || MICROBLAZE)
404 Enable support for Xilinx AXI VDMA Soft IP.
406 This engine provides high-bandwidth direct memory access
407 between memory and AXI4-Stream video type target
408 peripherals including peripherals which support AXI4-
409 Stream Video Protocol. It has two stream interfaces/
410 channels, Memory Mapped to Stream (MM2S) and Stream to
411 Memory Mapped (S2MM) for the data transfers.
414 tristate "Allwinner A31 SoCs DMA support"
415 depends on MACH_SUN6I || MACH_SUN8I || COMPILE_TEST
416 depends on RESET_CONTROLLER
418 select DMA_VIRTUAL_CHANNELS
420 Support for the DMA engine first found in Allwinner A31 SoCs.
423 tristate "Renesas Type-AXI NBPF DMA support"
425 depends on ARM || COMPILE_TEST
427 Support for "Type-AXI" NBPF DMA IPs from Renesas
430 tristate "IMG MDC support"
431 depends on MIPS || COMPILE_TEST
432 depends on MFD_SYSCON
434 select DMA_VIRTUAL_CHANNELS
436 Enable support for the IMG multi-threaded DMA controller (MDC).
439 tristate "APM X-Gene DMA support"
440 depends on ARCH_XGENE || COMPILE_TEST
442 select DMA_ENGINE_RAID
443 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
445 Enable support for the APM X-Gene SoC DMA engine.
450 config DMA_VIRTUAL_CHANNELS
462 comment "DMA Clients"
463 depends on DMA_ENGINE
466 bool "Async_tx: Offload support for the async_tx api"
467 depends on DMA_ENGINE
469 This allows the async_tx api to take advantage of offload engines for
470 memcpy, memset, xor, and raid6 p+q operations. If your platform has
471 a dma engine that can perform raid operations and you have enabled
477 tristate "DMA Test client"
478 depends on DMA_ENGINE
480 Simple DMA test client. Say N unless you're debugging a
483 config DMA_ENGINE_RAID
487 tristate "QCOM BAM DMA support"
488 depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM)
490 select DMA_VIRTUAL_CHANNELS
492 Enable support for the QCOM BAM DMA controller. This controller
493 provides DMA capabilities for a variety of on-chip devices.