2 * Intel I/OAT DMA Linux driver
3 * Copyright(c) 2007 - 2009 Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * The full GNU General Public License is included in this distribution in
15 * the file called "COPYING".
20 * This driver supports an Intel I/OAT DMA engine, which does asynchronous
24 #include <linux/init.h>
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/interrupt.h>
28 #include <linux/dca.h>
29 #include <linux/slab.h>
32 #include "registers.h"
35 MODULE_VERSION(IOAT_DMA_VERSION
);
36 MODULE_LICENSE("Dual BSD/GPL");
37 MODULE_AUTHOR("Intel Corporation");
39 static struct pci_device_id ioat_pci_tbl
[] = {
40 /* I/OAT v1 platforms */
41 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT
) },
42 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_CNB
) },
43 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_SCNB
) },
44 { PCI_VDEVICE(UNISYS
, PCI_DEVICE_ID_UNISYS_DMA_DIRECTOR
) },
46 /* I/OAT v2 platforms */
47 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_SNB
) },
49 /* I/OAT v3 platforms */
50 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_TBG0
) },
51 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_TBG1
) },
52 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_TBG2
) },
53 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_TBG3
) },
54 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_TBG4
) },
55 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_TBG5
) },
56 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_TBG6
) },
57 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_TBG7
) },
59 /* I/OAT v3.2 platforms */
60 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_JSF0
) },
61 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_JSF1
) },
62 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_JSF2
) },
63 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_JSF3
) },
64 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_JSF4
) },
65 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_JSF5
) },
66 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_JSF6
) },
67 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_JSF7
) },
68 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_JSF8
) },
69 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_JSF9
) },
71 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_SNB0
) },
72 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_SNB1
) },
73 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_SNB2
) },
74 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_SNB3
) },
75 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_SNB4
) },
76 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_SNB5
) },
77 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_SNB6
) },
78 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_SNB7
) },
79 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_SNB8
) },
80 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_SNB9
) },
82 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_IVB0
) },
83 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_IVB1
) },
84 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_IVB2
) },
85 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_IVB3
) },
86 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_IVB4
) },
87 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_IVB5
) },
88 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_IVB6
) },
89 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_IVB7
) },
90 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_IVB8
) },
91 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_IVB9
) },
93 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_HSW0
) },
94 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_HSW1
) },
95 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_HSW2
) },
96 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_HSW3
) },
97 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_HSW4
) },
98 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_HSW5
) },
99 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_HSW6
) },
100 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_HSW7
) },
101 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_HSW8
) },
102 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_HSW9
) },
104 /* I/OAT v3.3 platforms */
105 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_BWD0
) },
106 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_BWD1
) },
107 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_BWD2
) },
108 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_BWD3
) },
110 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_BDXDE0
) },
111 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_BDXDE1
) },
112 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_BDXDE2
) },
113 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_IOAT_BDXDE3
) },
117 MODULE_DEVICE_TABLE(pci
, ioat_pci_tbl
);
119 static int ioat_pci_probe(struct pci_dev
*pdev
, const struct pci_device_id
*id
);
120 static void ioat_remove(struct pci_dev
*pdev
);
122 static int ioat_dca_enabled
= 1;
123 module_param(ioat_dca_enabled
, int, 0644);
124 MODULE_PARM_DESC(ioat_dca_enabled
, "control support of dca service (default: 1)");
126 struct kmem_cache
*ioat2_cache
;
127 struct kmem_cache
*ioat3_sed_cache
;
129 #define DRV_NAME "ioatdma"
131 static struct pci_driver ioat_pci_driver
= {
133 .id_table
= ioat_pci_tbl
,
134 .probe
= ioat_pci_probe
,
135 .remove
= ioat_remove
,
138 static struct ioatdma_device
*
139 alloc_ioatdma(struct pci_dev
*pdev
, void __iomem
*iobase
)
141 struct device
*dev
= &pdev
->dev
;
142 struct ioatdma_device
*d
= devm_kzalloc(dev
, sizeof(*d
), GFP_KERNEL
);
147 d
->reg_base
= iobase
;
151 static int ioat_pci_probe(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
153 void __iomem
* const *iomap
;
154 struct device
*dev
= &pdev
->dev
;
155 struct ioatdma_device
*device
;
158 err
= pcim_enable_device(pdev
);
162 err
= pcim_iomap_regions(pdev
, 1 << IOAT_MMIO_BAR
, DRV_NAME
);
165 iomap
= pcim_iomap_table(pdev
);
169 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(64));
171 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
175 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(64));
177 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32));
181 device
= alloc_ioatdma(pdev
, iomap
[IOAT_MMIO_BAR
]);
184 pci_set_master(pdev
);
185 pci_set_drvdata(pdev
, device
);
187 device
->version
= readb(device
->reg_base
+ IOAT_VER_OFFSET
);
188 if (device
->version
== IOAT_VER_1_2
)
189 err
= ioat1_dma_probe(device
, ioat_dca_enabled
);
190 else if (device
->version
== IOAT_VER_2_0
)
191 err
= ioat2_dma_probe(device
, ioat_dca_enabled
);
192 else if (device
->version
>= IOAT_VER_3_0
)
193 err
= ioat3_dma_probe(device
, ioat_dca_enabled
);
198 dev_err(dev
, "Intel(R) I/OAT DMA Engine init failed\n");
205 static void ioat_remove(struct pci_dev
*pdev
)
207 struct ioatdma_device
*device
= pci_get_drvdata(pdev
);
212 dev_err(&pdev
->dev
, "Removing dma and dca services\n");
214 unregister_dca_provider(device
->dca
, &pdev
->dev
);
215 free_dca_provider(device
->dca
);
218 ioat_dma_remove(device
);
221 static int __init
ioat_init_module(void)
225 pr_info("%s: Intel(R) QuickData Technology Driver %s\n",
226 DRV_NAME
, IOAT_DMA_VERSION
);
228 ioat2_cache
= kmem_cache_create("ioat2", sizeof(struct ioat_ring_ent
),
229 0, SLAB_HWCACHE_ALIGN
, NULL
);
233 ioat3_sed_cache
= KMEM_CACHE(ioat_sed_ent
, 0);
234 if (!ioat3_sed_cache
)
235 goto err_ioat2_cache
;
237 err
= pci_register_driver(&ioat_pci_driver
);
239 goto err_ioat3_cache
;
244 kmem_cache_destroy(ioat3_sed_cache
);
247 kmem_cache_destroy(ioat2_cache
);
251 module_init(ioat_init_module
);
253 static void __exit
ioat_exit_module(void)
255 pci_unregister_driver(&ioat_pci_driver
);
256 kmem_cache_destroy(ioat2_cache
);
258 module_exit(ioat_exit_module
);