gro: Allow tunnel stacking in the case of FOU/GUE
[linux/fpc-iii.git] / drivers / dma / sh / shdma-base.c
blob10fcabad80f3c65c7dfee9ce5e49f28bbef36a48
1 /*
2 * Dmaengine driver base library for DMA controllers, found on SH-based SoCs
4 * extracted from shdma.c
6 * Copyright (C) 2011-2012 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
7 * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
8 * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
9 * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
11 * This is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
16 #include <linux/delay.h>
17 #include <linux/shdma-base.h>
18 #include <linux/dmaengine.h>
19 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/module.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/slab.h>
24 #include <linux/spinlock.h>
26 #include "../dmaengine.h"
28 /* DMA descriptor control */
29 enum shdma_desc_status {
30 DESC_IDLE,
31 DESC_PREPARED,
32 DESC_SUBMITTED,
33 DESC_COMPLETED, /* completed, have to call callback */
34 DESC_WAITING, /* callback called, waiting for ack / re-submit */
37 #define NR_DESCS_PER_CHANNEL 32
39 #define to_shdma_chan(c) container_of(c, struct shdma_chan, dma_chan)
40 #define to_shdma_dev(d) container_of(d, struct shdma_dev, dma_dev)
43 * For slave DMA we assume, that there is a finite number of DMA slaves in the
44 * system, and that each such slave can only use a finite number of channels.
45 * We use slave channel IDs to make sure, that no such slave channel ID is
46 * allocated more than once.
48 static unsigned int slave_num = 256;
49 module_param(slave_num, uint, 0444);
51 /* A bitmask with slave_num bits */
52 static unsigned long *shdma_slave_used;
54 /* Called under spin_lock_irq(&schan->chan_lock") */
55 static void shdma_chan_xfer_ld_queue(struct shdma_chan *schan)
57 struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
58 const struct shdma_ops *ops = sdev->ops;
59 struct shdma_desc *sdesc;
61 /* DMA work check */
62 if (ops->channel_busy(schan))
63 return;
65 /* Find the first not transferred descriptor */
66 list_for_each_entry(sdesc, &schan->ld_queue, node)
67 if (sdesc->mark == DESC_SUBMITTED) {
68 ops->start_xfer(schan, sdesc);
69 break;
73 static dma_cookie_t shdma_tx_submit(struct dma_async_tx_descriptor *tx)
75 struct shdma_desc *chunk, *c, *desc =
76 container_of(tx, struct shdma_desc, async_tx);
77 struct shdma_chan *schan = to_shdma_chan(tx->chan);
78 dma_async_tx_callback callback = tx->callback;
79 dma_cookie_t cookie;
80 bool power_up;
82 spin_lock_irq(&schan->chan_lock);
84 power_up = list_empty(&schan->ld_queue);
86 cookie = dma_cookie_assign(tx);
88 /* Mark all chunks of this descriptor as submitted, move to the queue */
89 list_for_each_entry_safe(chunk, c, desc->node.prev, node) {
91 * All chunks are on the global ld_free, so, we have to find
92 * the end of the chain ourselves
94 if (chunk != desc && (chunk->mark == DESC_IDLE ||
95 chunk->async_tx.cookie > 0 ||
96 chunk->async_tx.cookie == -EBUSY ||
97 &chunk->node == &schan->ld_free))
98 break;
99 chunk->mark = DESC_SUBMITTED;
100 if (chunk->chunks == 1) {
101 chunk->async_tx.callback = callback;
102 chunk->async_tx.callback_param = tx->callback_param;
103 } else {
104 /* Callback goes to the last chunk */
105 chunk->async_tx.callback = NULL;
107 chunk->cookie = cookie;
108 list_move_tail(&chunk->node, &schan->ld_queue);
110 dev_dbg(schan->dev, "submit #%d@%p on %d\n",
111 tx->cookie, &chunk->async_tx, schan->id);
114 if (power_up) {
115 int ret;
116 schan->pm_state = SHDMA_PM_BUSY;
118 ret = pm_runtime_get(schan->dev);
120 spin_unlock_irq(&schan->chan_lock);
121 if (ret < 0)
122 dev_err(schan->dev, "%s(): GET = %d\n", __func__, ret);
124 pm_runtime_barrier(schan->dev);
126 spin_lock_irq(&schan->chan_lock);
128 /* Have we been reset, while waiting? */
129 if (schan->pm_state != SHDMA_PM_ESTABLISHED) {
130 struct shdma_dev *sdev =
131 to_shdma_dev(schan->dma_chan.device);
132 const struct shdma_ops *ops = sdev->ops;
133 dev_dbg(schan->dev, "Bring up channel %d\n",
134 schan->id);
136 * TODO: .xfer_setup() might fail on some platforms.
137 * Make it int then, on error remove chunks from the
138 * queue again
140 ops->setup_xfer(schan, schan->slave_id);
142 if (schan->pm_state == SHDMA_PM_PENDING)
143 shdma_chan_xfer_ld_queue(schan);
144 schan->pm_state = SHDMA_PM_ESTABLISHED;
146 } else {
148 * Tell .device_issue_pending() not to run the queue, interrupts
149 * will do it anyway
151 schan->pm_state = SHDMA_PM_PENDING;
154 spin_unlock_irq(&schan->chan_lock);
156 return cookie;
159 /* Called with desc_lock held */
160 static struct shdma_desc *shdma_get_desc(struct shdma_chan *schan)
162 struct shdma_desc *sdesc;
164 list_for_each_entry(sdesc, &schan->ld_free, node)
165 if (sdesc->mark != DESC_PREPARED) {
166 BUG_ON(sdesc->mark != DESC_IDLE);
167 list_del(&sdesc->node);
168 return sdesc;
171 return NULL;
174 static int shdma_setup_slave(struct shdma_chan *schan, dma_addr_t slave_addr)
176 struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
177 const struct shdma_ops *ops = sdev->ops;
178 int ret, match;
180 if (schan->dev->of_node) {
181 match = schan->hw_req;
182 ret = ops->set_slave(schan, match, slave_addr, true);
183 if (ret < 0)
184 return ret;
185 } else {
186 match = schan->real_slave_id;
189 if (schan->real_slave_id < 0 || schan->real_slave_id >= slave_num)
190 return -EINVAL;
192 if (test_and_set_bit(schan->real_slave_id, shdma_slave_used))
193 return -EBUSY;
195 ret = ops->set_slave(schan, match, slave_addr, false);
196 if (ret < 0) {
197 clear_bit(schan->real_slave_id, shdma_slave_used);
198 return ret;
201 schan->slave_id = schan->real_slave_id;
203 return 0;
206 static int shdma_alloc_chan_resources(struct dma_chan *chan)
208 struct shdma_chan *schan = to_shdma_chan(chan);
209 struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
210 const struct shdma_ops *ops = sdev->ops;
211 struct shdma_desc *desc;
212 struct shdma_slave *slave = chan->private;
213 int ret, i;
216 * This relies on the guarantee from dmaengine that alloc_chan_resources
217 * never runs concurrently with itself or free_chan_resources.
219 if (slave) {
220 /* Legacy mode: .private is set in filter */
221 schan->real_slave_id = slave->slave_id;
222 ret = shdma_setup_slave(schan, 0);
223 if (ret < 0)
224 goto esetslave;
225 } else {
226 /* Normal mode: real_slave_id was set by filter */
227 schan->slave_id = -EINVAL;
230 schan->desc = kcalloc(NR_DESCS_PER_CHANNEL,
231 sdev->desc_size, GFP_KERNEL);
232 if (!schan->desc) {
233 ret = -ENOMEM;
234 goto edescalloc;
236 schan->desc_num = NR_DESCS_PER_CHANNEL;
238 for (i = 0; i < NR_DESCS_PER_CHANNEL; i++) {
239 desc = ops->embedded_desc(schan->desc, i);
240 dma_async_tx_descriptor_init(&desc->async_tx,
241 &schan->dma_chan);
242 desc->async_tx.tx_submit = shdma_tx_submit;
243 desc->mark = DESC_IDLE;
245 list_add(&desc->node, &schan->ld_free);
248 return NR_DESCS_PER_CHANNEL;
250 edescalloc:
251 if (slave)
252 esetslave:
253 clear_bit(slave->slave_id, shdma_slave_used);
254 chan->private = NULL;
255 return ret;
259 * This is the standard shdma filter function to be used as a replacement to the
260 * "old" method, using the .private pointer.
261 * You always have to pass a valid slave id as the argument, old drivers that
262 * pass ERR_PTR(-EINVAL) as a filter parameter and set it up in dma_slave_config
263 * need to be updated so we can remove the slave_id field from dma_slave_config.
264 * parameter. If this filter is used, the slave driver, after calling
265 * dma_request_channel(), will also have to call dmaengine_slave_config() with
266 * .direction, and either .src_addr or .dst_addr set.
268 * NOTE: this filter doesn't support multiple DMAC drivers with the DMA_SLAVE
269 * capability! If this becomes a requirement, hardware glue drivers, using this
270 * services would have to provide their own filters, which first would check
271 * the device driver, similar to how other DMAC drivers, e.g., sa11x0-dma.c, do
272 * this, and only then, in case of a match, call this common filter.
273 * NOTE 2: This filter function is also used in the DT case by shdma_of_xlate().
274 * In that case the MID-RID value is used for slave channel filtering and is
275 * passed to this function in the "arg" parameter.
277 bool shdma_chan_filter(struct dma_chan *chan, void *arg)
279 struct shdma_chan *schan;
280 struct shdma_dev *sdev;
281 int slave_id = (long)arg;
282 int ret;
284 /* Only support channels handled by this driver. */
285 if (chan->device->device_alloc_chan_resources !=
286 shdma_alloc_chan_resources)
287 return false;
289 schan = to_shdma_chan(chan);
290 sdev = to_shdma_dev(chan->device);
293 * For DT, the schan->slave_id field is generated by the
294 * set_slave function from the slave ID that is passed in
295 * from xlate. For the non-DT case, the slave ID is
296 * directly passed into the filter function by the driver
298 if (schan->dev->of_node) {
299 ret = sdev->ops->set_slave(schan, slave_id, 0, true);
300 if (ret < 0)
301 return false;
303 schan->real_slave_id = schan->slave_id;
304 return true;
307 if (slave_id < 0) {
308 /* No slave requested - arbitrary channel */
309 dev_warn(sdev->dma_dev.dev, "invalid slave ID passed to dma_request_slave\n");
310 return true;
313 if (slave_id >= slave_num)
314 return false;
316 ret = sdev->ops->set_slave(schan, slave_id, 0, true);
317 if (ret < 0)
318 return false;
320 schan->real_slave_id = slave_id;
322 return true;
324 EXPORT_SYMBOL(shdma_chan_filter);
326 static dma_async_tx_callback __ld_cleanup(struct shdma_chan *schan, bool all)
328 struct shdma_desc *desc, *_desc;
329 /* Is the "exposed" head of a chain acked? */
330 bool head_acked = false;
331 dma_cookie_t cookie = 0;
332 dma_async_tx_callback callback = NULL;
333 void *param = NULL;
334 unsigned long flags;
335 LIST_HEAD(cyclic_list);
337 spin_lock_irqsave(&schan->chan_lock, flags);
338 list_for_each_entry_safe(desc, _desc, &schan->ld_queue, node) {
339 struct dma_async_tx_descriptor *tx = &desc->async_tx;
341 BUG_ON(tx->cookie > 0 && tx->cookie != desc->cookie);
342 BUG_ON(desc->mark != DESC_SUBMITTED &&
343 desc->mark != DESC_COMPLETED &&
344 desc->mark != DESC_WAITING);
347 * queue is ordered, and we use this loop to (1) clean up all
348 * completed descriptors, and to (2) update descriptor flags of
349 * any chunks in a (partially) completed chain
351 if (!all && desc->mark == DESC_SUBMITTED &&
352 desc->cookie != cookie)
353 break;
355 if (tx->cookie > 0)
356 cookie = tx->cookie;
358 if (desc->mark == DESC_COMPLETED && desc->chunks == 1) {
359 if (schan->dma_chan.completed_cookie != desc->cookie - 1)
360 dev_dbg(schan->dev,
361 "Completing cookie %d, expected %d\n",
362 desc->cookie,
363 schan->dma_chan.completed_cookie + 1);
364 schan->dma_chan.completed_cookie = desc->cookie;
367 /* Call callback on the last chunk */
368 if (desc->mark == DESC_COMPLETED && tx->callback) {
369 desc->mark = DESC_WAITING;
370 callback = tx->callback;
371 param = tx->callback_param;
372 dev_dbg(schan->dev, "descriptor #%d@%p on %d callback\n",
373 tx->cookie, tx, schan->id);
374 BUG_ON(desc->chunks != 1);
375 break;
378 if (tx->cookie > 0 || tx->cookie == -EBUSY) {
379 if (desc->mark == DESC_COMPLETED) {
380 BUG_ON(tx->cookie < 0);
381 desc->mark = DESC_WAITING;
383 head_acked = async_tx_test_ack(tx);
384 } else {
385 switch (desc->mark) {
386 case DESC_COMPLETED:
387 desc->mark = DESC_WAITING;
388 /* Fall through */
389 case DESC_WAITING:
390 if (head_acked)
391 async_tx_ack(&desc->async_tx);
395 dev_dbg(schan->dev, "descriptor %p #%d completed.\n",
396 tx, tx->cookie);
398 if (((desc->mark == DESC_COMPLETED ||
399 desc->mark == DESC_WAITING) &&
400 async_tx_test_ack(&desc->async_tx)) || all) {
402 if (all || !desc->cyclic) {
403 /* Remove from ld_queue list */
404 desc->mark = DESC_IDLE;
405 list_move(&desc->node, &schan->ld_free);
406 } else {
407 /* reuse as cyclic */
408 desc->mark = DESC_SUBMITTED;
409 list_move_tail(&desc->node, &cyclic_list);
412 if (list_empty(&schan->ld_queue)) {
413 dev_dbg(schan->dev, "Bring down channel %d\n", schan->id);
414 pm_runtime_put(schan->dev);
415 schan->pm_state = SHDMA_PM_ESTABLISHED;
416 } else if (schan->pm_state == SHDMA_PM_PENDING) {
417 shdma_chan_xfer_ld_queue(schan);
422 if (all && !callback)
424 * Terminating and the loop completed normally: forgive
425 * uncompleted cookies
427 schan->dma_chan.completed_cookie = schan->dma_chan.cookie;
429 list_splice_tail(&cyclic_list, &schan->ld_queue);
431 spin_unlock_irqrestore(&schan->chan_lock, flags);
433 if (callback)
434 callback(param);
436 return callback;
440 * shdma_chan_ld_cleanup - Clean up link descriptors
442 * Clean up the ld_queue of DMA channel.
444 static void shdma_chan_ld_cleanup(struct shdma_chan *schan, bool all)
446 while (__ld_cleanup(schan, all))
451 * shdma_free_chan_resources - Free all resources of the channel.
453 static void shdma_free_chan_resources(struct dma_chan *chan)
455 struct shdma_chan *schan = to_shdma_chan(chan);
456 struct shdma_dev *sdev = to_shdma_dev(chan->device);
457 const struct shdma_ops *ops = sdev->ops;
458 LIST_HEAD(list);
460 /* Protect against ISR */
461 spin_lock_irq(&schan->chan_lock);
462 ops->halt_channel(schan);
463 spin_unlock_irq(&schan->chan_lock);
465 /* Now no new interrupts will occur */
467 /* Prepared and not submitted descriptors can still be on the queue */
468 if (!list_empty(&schan->ld_queue))
469 shdma_chan_ld_cleanup(schan, true);
471 if (schan->slave_id >= 0) {
472 /* The caller is holding dma_list_mutex */
473 clear_bit(schan->slave_id, shdma_slave_used);
474 chan->private = NULL;
477 schan->real_slave_id = 0;
479 spin_lock_irq(&schan->chan_lock);
481 list_splice_init(&schan->ld_free, &list);
482 schan->desc_num = 0;
484 spin_unlock_irq(&schan->chan_lock);
486 kfree(schan->desc);
490 * shdma_add_desc - get, set up and return one transfer descriptor
491 * @schan: DMA channel
492 * @flags: DMA transfer flags
493 * @dst: destination DMA address, incremented when direction equals
494 * DMA_DEV_TO_MEM or DMA_MEM_TO_MEM
495 * @src: source DMA address, incremented when direction equals
496 * DMA_MEM_TO_DEV or DMA_MEM_TO_MEM
497 * @len: DMA transfer length
498 * @first: if NULL, set to the current descriptor and cookie set to -EBUSY
499 * @direction: needed for slave DMA to decide which address to keep constant,
500 * equals DMA_MEM_TO_MEM for MEMCPY
501 * Returns 0 or an error
502 * Locks: called with desc_lock held
504 static struct shdma_desc *shdma_add_desc(struct shdma_chan *schan,
505 unsigned long flags, dma_addr_t *dst, dma_addr_t *src, size_t *len,
506 struct shdma_desc **first, enum dma_transfer_direction direction)
508 struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
509 const struct shdma_ops *ops = sdev->ops;
510 struct shdma_desc *new;
511 size_t copy_size = *len;
513 if (!copy_size)
514 return NULL;
516 /* Allocate the link descriptor from the free list */
517 new = shdma_get_desc(schan);
518 if (!new) {
519 dev_err(schan->dev, "No free link descriptor available\n");
520 return NULL;
523 ops->desc_setup(schan, new, *src, *dst, &copy_size);
525 if (!*first) {
526 /* First desc */
527 new->async_tx.cookie = -EBUSY;
528 *first = new;
529 } else {
530 /* Other desc - invisible to the user */
531 new->async_tx.cookie = -EINVAL;
534 dev_dbg(schan->dev,
535 "chaining (%zu/%zu)@%pad -> %pad with %p, cookie %d\n",
536 copy_size, *len, src, dst, &new->async_tx,
537 new->async_tx.cookie);
539 new->mark = DESC_PREPARED;
540 new->async_tx.flags = flags;
541 new->direction = direction;
542 new->partial = 0;
544 *len -= copy_size;
545 if (direction == DMA_MEM_TO_MEM || direction == DMA_MEM_TO_DEV)
546 *src += copy_size;
547 if (direction == DMA_MEM_TO_MEM || direction == DMA_DEV_TO_MEM)
548 *dst += copy_size;
550 return new;
554 * shdma_prep_sg - prepare transfer descriptors from an SG list
556 * Common routine for public (MEMCPY) and slave DMA. The MEMCPY case is also
557 * converted to scatter-gather to guarantee consistent locking and a correct
558 * list manipulation. For slave DMA direction carries the usual meaning, and,
559 * logically, the SG list is RAM and the addr variable contains slave address,
560 * e.g., the FIFO I/O register. For MEMCPY direction equals DMA_MEM_TO_MEM
561 * and the SG list contains only one element and points at the source buffer.
563 static struct dma_async_tx_descriptor *shdma_prep_sg(struct shdma_chan *schan,
564 struct scatterlist *sgl, unsigned int sg_len, dma_addr_t *addr,
565 enum dma_transfer_direction direction, unsigned long flags, bool cyclic)
567 struct scatterlist *sg;
568 struct shdma_desc *first = NULL, *new = NULL /* compiler... */;
569 LIST_HEAD(tx_list);
570 int chunks = 0;
571 unsigned long irq_flags;
572 int i;
574 for_each_sg(sgl, sg, sg_len, i)
575 chunks += DIV_ROUND_UP(sg_dma_len(sg), schan->max_xfer_len);
577 /* Have to lock the whole loop to protect against concurrent release */
578 spin_lock_irqsave(&schan->chan_lock, irq_flags);
581 * Chaining:
582 * first descriptor is what user is dealing with in all API calls, its
583 * cookie is at first set to -EBUSY, at tx-submit to a positive
584 * number
585 * if more than one chunk is needed further chunks have cookie = -EINVAL
586 * the last chunk, if not equal to the first, has cookie = -ENOSPC
587 * all chunks are linked onto the tx_list head with their .node heads
588 * only during this function, then they are immediately spliced
589 * back onto the free list in form of a chain
591 for_each_sg(sgl, sg, sg_len, i) {
592 dma_addr_t sg_addr = sg_dma_address(sg);
593 size_t len = sg_dma_len(sg);
595 if (!len)
596 goto err_get_desc;
598 do {
599 dev_dbg(schan->dev, "Add SG #%d@%p[%zu], dma %pad\n",
600 i, sg, len, &sg_addr);
602 if (direction == DMA_DEV_TO_MEM)
603 new = shdma_add_desc(schan, flags,
604 &sg_addr, addr, &len, &first,
605 direction);
606 else
607 new = shdma_add_desc(schan, flags,
608 addr, &sg_addr, &len, &first,
609 direction);
610 if (!new)
611 goto err_get_desc;
613 new->cyclic = cyclic;
614 if (cyclic)
615 new->chunks = 1;
616 else
617 new->chunks = chunks--;
618 list_add_tail(&new->node, &tx_list);
619 } while (len);
622 if (new != first)
623 new->async_tx.cookie = -ENOSPC;
625 /* Put them back on the free list, so, they don't get lost */
626 list_splice_tail(&tx_list, &schan->ld_free);
628 spin_unlock_irqrestore(&schan->chan_lock, irq_flags);
630 return &first->async_tx;
632 err_get_desc:
633 list_for_each_entry(new, &tx_list, node)
634 new->mark = DESC_IDLE;
635 list_splice(&tx_list, &schan->ld_free);
637 spin_unlock_irqrestore(&schan->chan_lock, irq_flags);
639 return NULL;
642 static struct dma_async_tx_descriptor *shdma_prep_memcpy(
643 struct dma_chan *chan, dma_addr_t dma_dest, dma_addr_t dma_src,
644 size_t len, unsigned long flags)
646 struct shdma_chan *schan = to_shdma_chan(chan);
647 struct scatterlist sg;
649 if (!chan || !len)
650 return NULL;
652 BUG_ON(!schan->desc_num);
654 sg_init_table(&sg, 1);
655 sg_set_page(&sg, pfn_to_page(PFN_DOWN(dma_src)), len,
656 offset_in_page(dma_src));
657 sg_dma_address(&sg) = dma_src;
658 sg_dma_len(&sg) = len;
660 return shdma_prep_sg(schan, &sg, 1, &dma_dest, DMA_MEM_TO_MEM,
661 flags, false);
664 static struct dma_async_tx_descriptor *shdma_prep_slave_sg(
665 struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len,
666 enum dma_transfer_direction direction, unsigned long flags, void *context)
668 struct shdma_chan *schan = to_shdma_chan(chan);
669 struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
670 const struct shdma_ops *ops = sdev->ops;
671 int slave_id = schan->slave_id;
672 dma_addr_t slave_addr;
674 if (!chan)
675 return NULL;
677 BUG_ON(!schan->desc_num);
679 /* Someone calling slave DMA on a generic channel? */
680 if (slave_id < 0 || !sg_len) {
681 dev_warn(schan->dev, "%s: bad parameter: len=%d, id=%d\n",
682 __func__, sg_len, slave_id);
683 return NULL;
686 slave_addr = ops->slave_addr(schan);
688 return shdma_prep_sg(schan, sgl, sg_len, &slave_addr,
689 direction, flags, false);
692 #define SHDMA_MAX_SG_LEN 32
694 static struct dma_async_tx_descriptor *shdma_prep_dma_cyclic(
695 struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
696 size_t period_len, enum dma_transfer_direction direction,
697 unsigned long flags)
699 struct shdma_chan *schan = to_shdma_chan(chan);
700 struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
701 struct dma_async_tx_descriptor *desc;
702 const struct shdma_ops *ops = sdev->ops;
703 unsigned int sg_len = buf_len / period_len;
704 int slave_id = schan->slave_id;
705 dma_addr_t slave_addr;
706 struct scatterlist *sgl;
707 int i;
709 if (!chan)
710 return NULL;
712 BUG_ON(!schan->desc_num);
714 if (sg_len > SHDMA_MAX_SG_LEN) {
715 dev_err(schan->dev, "sg length %d exceds limit %d",
716 sg_len, SHDMA_MAX_SG_LEN);
717 return NULL;
720 /* Someone calling slave DMA on a generic channel? */
721 if (slave_id < 0 || (buf_len < period_len)) {
722 dev_warn(schan->dev,
723 "%s: bad parameter: buf_len=%zu, period_len=%zu, id=%d\n",
724 __func__, buf_len, period_len, slave_id);
725 return NULL;
728 slave_addr = ops->slave_addr(schan);
731 * Allocate the sg list dynamically as it would consumer too much stack
732 * space.
734 sgl = kcalloc(sg_len, sizeof(*sgl), GFP_KERNEL);
735 if (!sgl)
736 return NULL;
738 sg_init_table(sgl, sg_len);
740 for (i = 0; i < sg_len; i++) {
741 dma_addr_t src = buf_addr + (period_len * i);
743 sg_set_page(&sgl[i], pfn_to_page(PFN_DOWN(src)), period_len,
744 offset_in_page(src));
745 sg_dma_address(&sgl[i]) = src;
746 sg_dma_len(&sgl[i]) = period_len;
749 desc = shdma_prep_sg(schan, sgl, sg_len, &slave_addr,
750 direction, flags, true);
752 kfree(sgl);
753 return desc;
756 static int shdma_terminate_all(struct dma_chan *chan)
758 struct shdma_chan *schan = to_shdma_chan(chan);
759 struct shdma_dev *sdev = to_shdma_dev(chan->device);
760 const struct shdma_ops *ops = sdev->ops;
761 unsigned long flags;
763 spin_lock_irqsave(&schan->chan_lock, flags);
764 ops->halt_channel(schan);
766 if (ops->get_partial && !list_empty(&schan->ld_queue)) {
767 /* Record partial transfer */
768 struct shdma_desc *desc = list_first_entry(&schan->ld_queue,
769 struct shdma_desc, node);
770 desc->partial = ops->get_partial(schan, desc);
773 spin_unlock_irqrestore(&schan->chan_lock, flags);
775 shdma_chan_ld_cleanup(schan, true);
777 return 0;
780 static int shdma_config(struct dma_chan *chan,
781 struct dma_slave_config *config)
783 struct shdma_chan *schan = to_shdma_chan(chan);
786 * So far only .slave_id is used, but the slave drivers are
787 * encouraged to also set a transfer direction and an address.
789 if (!config)
790 return -EINVAL;
793 * overriding the slave_id through dma_slave_config is deprecated,
794 * but possibly some out-of-tree drivers still do it.
796 if (WARN_ON_ONCE(config->slave_id &&
797 config->slave_id != schan->real_slave_id))
798 schan->real_slave_id = config->slave_id;
801 * We could lock this, but you shouldn't be configuring the
802 * channel, while using it...
804 return shdma_setup_slave(schan,
805 config->direction == DMA_DEV_TO_MEM ?
806 config->src_addr : config->dst_addr);
809 static void shdma_issue_pending(struct dma_chan *chan)
811 struct shdma_chan *schan = to_shdma_chan(chan);
813 spin_lock_irq(&schan->chan_lock);
814 if (schan->pm_state == SHDMA_PM_ESTABLISHED)
815 shdma_chan_xfer_ld_queue(schan);
816 else
817 schan->pm_state = SHDMA_PM_PENDING;
818 spin_unlock_irq(&schan->chan_lock);
821 static enum dma_status shdma_tx_status(struct dma_chan *chan,
822 dma_cookie_t cookie,
823 struct dma_tx_state *txstate)
825 struct shdma_chan *schan = to_shdma_chan(chan);
826 enum dma_status status;
827 unsigned long flags;
829 shdma_chan_ld_cleanup(schan, false);
831 spin_lock_irqsave(&schan->chan_lock, flags);
833 status = dma_cookie_status(chan, cookie, txstate);
836 * If we don't find cookie on the queue, it has been aborted and we have
837 * to report error
839 if (status != DMA_COMPLETE) {
840 struct shdma_desc *sdesc;
841 status = DMA_ERROR;
842 list_for_each_entry(sdesc, &schan->ld_queue, node)
843 if (sdesc->cookie == cookie) {
844 status = DMA_IN_PROGRESS;
845 break;
849 spin_unlock_irqrestore(&schan->chan_lock, flags);
851 return status;
854 /* Called from error IRQ or NMI */
855 bool shdma_reset(struct shdma_dev *sdev)
857 const struct shdma_ops *ops = sdev->ops;
858 struct shdma_chan *schan;
859 unsigned int handled = 0;
860 int i;
862 /* Reset all channels */
863 shdma_for_each_chan(schan, sdev, i) {
864 struct shdma_desc *sdesc;
865 LIST_HEAD(dl);
867 if (!schan)
868 continue;
870 spin_lock(&schan->chan_lock);
872 /* Stop the channel */
873 ops->halt_channel(schan);
875 list_splice_init(&schan->ld_queue, &dl);
877 if (!list_empty(&dl)) {
878 dev_dbg(schan->dev, "Bring down channel %d\n", schan->id);
879 pm_runtime_put(schan->dev);
881 schan->pm_state = SHDMA_PM_ESTABLISHED;
883 spin_unlock(&schan->chan_lock);
885 /* Complete all */
886 list_for_each_entry(sdesc, &dl, node) {
887 struct dma_async_tx_descriptor *tx = &sdesc->async_tx;
888 sdesc->mark = DESC_IDLE;
889 if (tx->callback)
890 tx->callback(tx->callback_param);
893 spin_lock(&schan->chan_lock);
894 list_splice(&dl, &schan->ld_free);
895 spin_unlock(&schan->chan_lock);
897 handled++;
900 return !!handled;
902 EXPORT_SYMBOL(shdma_reset);
904 static irqreturn_t chan_irq(int irq, void *dev)
906 struct shdma_chan *schan = dev;
907 const struct shdma_ops *ops =
908 to_shdma_dev(schan->dma_chan.device)->ops;
909 irqreturn_t ret;
911 spin_lock(&schan->chan_lock);
913 ret = ops->chan_irq(schan, irq) ? IRQ_WAKE_THREAD : IRQ_NONE;
915 spin_unlock(&schan->chan_lock);
917 return ret;
920 static irqreturn_t chan_irqt(int irq, void *dev)
922 struct shdma_chan *schan = dev;
923 const struct shdma_ops *ops =
924 to_shdma_dev(schan->dma_chan.device)->ops;
925 struct shdma_desc *sdesc;
927 spin_lock_irq(&schan->chan_lock);
928 list_for_each_entry(sdesc, &schan->ld_queue, node) {
929 if (sdesc->mark == DESC_SUBMITTED &&
930 ops->desc_completed(schan, sdesc)) {
931 dev_dbg(schan->dev, "done #%d@%p\n",
932 sdesc->async_tx.cookie, &sdesc->async_tx);
933 sdesc->mark = DESC_COMPLETED;
934 break;
937 /* Next desc */
938 shdma_chan_xfer_ld_queue(schan);
939 spin_unlock_irq(&schan->chan_lock);
941 shdma_chan_ld_cleanup(schan, false);
943 return IRQ_HANDLED;
946 int shdma_request_irq(struct shdma_chan *schan, int irq,
947 unsigned long flags, const char *name)
949 int ret = devm_request_threaded_irq(schan->dev, irq, chan_irq,
950 chan_irqt, flags, name, schan);
952 schan->irq = ret < 0 ? ret : irq;
954 return ret;
956 EXPORT_SYMBOL(shdma_request_irq);
958 void shdma_chan_probe(struct shdma_dev *sdev,
959 struct shdma_chan *schan, int id)
961 schan->pm_state = SHDMA_PM_ESTABLISHED;
963 /* reference struct dma_device */
964 schan->dma_chan.device = &sdev->dma_dev;
965 dma_cookie_init(&schan->dma_chan);
967 schan->dev = sdev->dma_dev.dev;
968 schan->id = id;
970 if (!schan->max_xfer_len)
971 schan->max_xfer_len = PAGE_SIZE;
973 spin_lock_init(&schan->chan_lock);
975 /* Init descripter manage list */
976 INIT_LIST_HEAD(&schan->ld_queue);
977 INIT_LIST_HEAD(&schan->ld_free);
979 /* Add the channel to DMA device channel list */
980 list_add_tail(&schan->dma_chan.device_node,
981 &sdev->dma_dev.channels);
982 sdev->schan[id] = schan;
984 EXPORT_SYMBOL(shdma_chan_probe);
986 void shdma_chan_remove(struct shdma_chan *schan)
988 list_del(&schan->dma_chan.device_node);
990 EXPORT_SYMBOL(shdma_chan_remove);
992 int shdma_init(struct device *dev, struct shdma_dev *sdev,
993 int chan_num)
995 struct dma_device *dma_dev = &sdev->dma_dev;
998 * Require all call-backs for now, they can trivially be made optional
999 * later as required
1001 if (!sdev->ops ||
1002 !sdev->desc_size ||
1003 !sdev->ops->embedded_desc ||
1004 !sdev->ops->start_xfer ||
1005 !sdev->ops->setup_xfer ||
1006 !sdev->ops->set_slave ||
1007 !sdev->ops->desc_setup ||
1008 !sdev->ops->slave_addr ||
1009 !sdev->ops->channel_busy ||
1010 !sdev->ops->halt_channel ||
1011 !sdev->ops->desc_completed)
1012 return -EINVAL;
1014 sdev->schan = kcalloc(chan_num, sizeof(*sdev->schan), GFP_KERNEL);
1015 if (!sdev->schan)
1016 return -ENOMEM;
1018 INIT_LIST_HEAD(&dma_dev->channels);
1020 /* Common and MEMCPY operations */
1021 dma_dev->device_alloc_chan_resources
1022 = shdma_alloc_chan_resources;
1023 dma_dev->device_free_chan_resources = shdma_free_chan_resources;
1024 dma_dev->device_prep_dma_memcpy = shdma_prep_memcpy;
1025 dma_dev->device_tx_status = shdma_tx_status;
1026 dma_dev->device_issue_pending = shdma_issue_pending;
1028 /* Compulsory for DMA_SLAVE fields */
1029 dma_dev->device_prep_slave_sg = shdma_prep_slave_sg;
1030 dma_dev->device_prep_dma_cyclic = shdma_prep_dma_cyclic;
1031 dma_dev->device_config = shdma_config;
1032 dma_dev->device_terminate_all = shdma_terminate_all;
1034 dma_dev->dev = dev;
1036 return 0;
1038 EXPORT_SYMBOL(shdma_init);
1040 void shdma_cleanup(struct shdma_dev *sdev)
1042 kfree(sdev->schan);
1044 EXPORT_SYMBOL(shdma_cleanup);
1046 static int __init shdma_enter(void)
1048 shdma_slave_used = kzalloc(DIV_ROUND_UP(slave_num, BITS_PER_LONG) *
1049 sizeof(long), GFP_KERNEL);
1050 if (!shdma_slave_used)
1051 return -ENOMEM;
1052 return 0;
1054 module_init(shdma_enter);
1056 static void __exit shdma_exit(void)
1058 kfree(shdma_slave_used);
1060 module_exit(shdma_exit);
1062 MODULE_LICENSE("GPL v2");
1063 MODULE_DESCRIPTION("SH-DMA driver base library");
1064 MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");