2 * edac_mc kernel module
3 * (C) 2005-2007 Linux Networx (http://lnxi.com)
5 * This file may be distributed under the terms of the
6 * GNU General Public License.
8 * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
10 * (c) 2012-2013 - Mauro Carvalho Chehab
11 * The entire API were re-written, and ported to use struct device
15 #include <linux/ctype.h>
16 #include <linux/slab.h>
17 #include <linux/edac.h>
18 #include <linux/bug.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/uaccess.h>
22 #include "edac_core.h"
23 #include "edac_module.h"
25 /* MC EDAC Controls, setable by module parameter, and sysfs */
26 static int edac_mc_log_ue
= 1;
27 static int edac_mc_log_ce
= 1;
28 static int edac_mc_panic_on_ue
;
29 static int edac_mc_poll_msec
= 1000;
31 /* Getter functions for above */
32 int edac_mc_get_log_ue(void)
34 return edac_mc_log_ue
;
37 int edac_mc_get_log_ce(void)
39 return edac_mc_log_ce
;
42 int edac_mc_get_panic_on_ue(void)
44 return edac_mc_panic_on_ue
;
47 /* this is temporary */
48 int edac_mc_get_poll_msec(void)
50 return edac_mc_poll_msec
;
53 static int edac_set_poll_msec(const char *val
, struct kernel_param
*kp
)
61 ret
= kstrtoul(val
, 0, &l
);
68 *((unsigned long *)kp
->arg
) = l
;
70 /* notify edac_mc engine to reset the poll period */
71 edac_mc_reset_delay_period(l
);
76 /* Parameter declarations for above */
77 module_param(edac_mc_panic_on_ue
, int, 0644);
78 MODULE_PARM_DESC(edac_mc_panic_on_ue
, "Panic on uncorrected error: 0=off 1=on");
79 module_param(edac_mc_log_ue
, int, 0644);
80 MODULE_PARM_DESC(edac_mc_log_ue
,
81 "Log uncorrectable error to console: 0=off 1=on");
82 module_param(edac_mc_log_ce
, int, 0644);
83 MODULE_PARM_DESC(edac_mc_log_ce
,
84 "Log correctable error to console: 0=off 1=on");
85 module_param_call(edac_mc_poll_msec
, edac_set_poll_msec
, param_get_int
,
86 &edac_mc_poll_msec
, 0644);
87 MODULE_PARM_DESC(edac_mc_poll_msec
, "Polling period in milliseconds");
89 static struct device
*mci_pdev
;
92 * various constants for Memory Controllers
94 static const char * const mem_types
[] = {
95 [MEM_EMPTY
] = "Empty",
96 [MEM_RESERVED
] = "Reserved",
97 [MEM_UNKNOWN
] = "Unknown",
101 [MEM_SDR
] = "Unbuffered-SDR",
102 [MEM_RDR
] = "Registered-SDR",
103 [MEM_DDR
] = "Unbuffered-DDR",
104 [MEM_RDDR
] = "Registered-DDR",
106 [MEM_DDR2
] = "Unbuffered-DDR2",
107 [MEM_FB_DDR2
] = "FullyBuffered-DDR2",
108 [MEM_RDDR2
] = "Registered-DDR2",
110 [MEM_DDR3
] = "Unbuffered-DDR3",
111 [MEM_RDDR3
] = "Registered-DDR3",
112 [MEM_DDR4
] = "Unbuffered-DDR4",
113 [MEM_RDDR4
] = "Registered-DDR4"
116 static const char * const dev_types
[] = {
117 [DEV_UNKNOWN
] = "Unknown",
127 static const char * const edac_caps
[] = {
128 [EDAC_UNKNOWN
] = "Unknown",
129 [EDAC_NONE
] = "None",
130 [EDAC_RESERVED
] = "Reserved",
131 [EDAC_PARITY
] = "PARITY",
133 [EDAC_SECDED
] = "SECDED",
134 [EDAC_S2ECD2ED
] = "S2ECD2ED",
135 [EDAC_S4ECD4ED
] = "S4ECD4ED",
136 [EDAC_S8ECD8ED
] = "S8ECD8ED",
137 [EDAC_S16ECD16ED
] = "S16ECD16ED"
140 #ifdef CONFIG_EDAC_LEGACY_SYSFS
142 * EDAC sysfs CSROW data structures and methods
145 #define to_csrow(k) container_of(k, struct csrow_info, dev)
148 * We need it to avoid namespace conflicts between the legacy API
149 * and the per-dimm/per-rank one
151 #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
152 static struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
154 struct dev_ch_attribute
{
155 struct device_attribute attr
;
159 #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
160 static struct dev_ch_attribute dev_attr_legacy_##_name = \
161 { __ATTR(_name, _mode, _show, _store), (_var) }
163 #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
165 /* Set of more default csrow<id> attribute show/store functions */
166 static ssize_t
csrow_ue_count_show(struct device
*dev
,
167 struct device_attribute
*mattr
, char *data
)
169 struct csrow_info
*csrow
= to_csrow(dev
);
171 return sprintf(data
, "%u\n", csrow
->ue_count
);
174 static ssize_t
csrow_ce_count_show(struct device
*dev
,
175 struct device_attribute
*mattr
, char *data
)
177 struct csrow_info
*csrow
= to_csrow(dev
);
179 return sprintf(data
, "%u\n", csrow
->ce_count
);
182 static ssize_t
csrow_size_show(struct device
*dev
,
183 struct device_attribute
*mattr
, char *data
)
185 struct csrow_info
*csrow
= to_csrow(dev
);
189 for (i
= 0; i
< csrow
->nr_channels
; i
++)
190 nr_pages
+= csrow
->channels
[i
]->dimm
->nr_pages
;
191 return sprintf(data
, "%u\n", PAGES_TO_MiB(nr_pages
));
194 static ssize_t
csrow_mem_type_show(struct device
*dev
,
195 struct device_attribute
*mattr
, char *data
)
197 struct csrow_info
*csrow
= to_csrow(dev
);
199 return sprintf(data
, "%s\n", mem_types
[csrow
->channels
[0]->dimm
->mtype
]);
202 static ssize_t
csrow_dev_type_show(struct device
*dev
,
203 struct device_attribute
*mattr
, char *data
)
205 struct csrow_info
*csrow
= to_csrow(dev
);
207 return sprintf(data
, "%s\n", dev_types
[csrow
->channels
[0]->dimm
->dtype
]);
210 static ssize_t
csrow_edac_mode_show(struct device
*dev
,
211 struct device_attribute
*mattr
,
214 struct csrow_info
*csrow
= to_csrow(dev
);
216 return sprintf(data
, "%s\n", edac_caps
[csrow
->channels
[0]->dimm
->edac_mode
]);
219 /* show/store functions for DIMM Label attributes */
220 static ssize_t
channel_dimm_label_show(struct device
*dev
,
221 struct device_attribute
*mattr
,
224 struct csrow_info
*csrow
= to_csrow(dev
);
225 unsigned chan
= to_channel(mattr
);
226 struct rank_info
*rank
= csrow
->channels
[chan
];
228 /* if field has not been initialized, there is nothing to send */
229 if (!rank
->dimm
->label
[0])
232 return snprintf(data
, EDAC_MC_LABEL_LEN
, "%s\n",
236 static ssize_t
channel_dimm_label_store(struct device
*dev
,
237 struct device_attribute
*mattr
,
238 const char *data
, size_t count
)
240 struct csrow_info
*csrow
= to_csrow(dev
);
241 unsigned chan
= to_channel(mattr
);
242 struct rank_info
*rank
= csrow
->channels
[chan
];
244 ssize_t max_size
= 0;
246 max_size
= min((ssize_t
) count
, (ssize_t
) EDAC_MC_LABEL_LEN
- 1);
247 strncpy(rank
->dimm
->label
, data
, max_size
);
248 rank
->dimm
->label
[max_size
] = '\0';
253 /* show function for dynamic chX_ce_count attribute */
254 static ssize_t
channel_ce_count_show(struct device
*dev
,
255 struct device_attribute
*mattr
, char *data
)
257 struct csrow_info
*csrow
= to_csrow(dev
);
258 unsigned chan
= to_channel(mattr
);
259 struct rank_info
*rank
= csrow
->channels
[chan
];
261 return sprintf(data
, "%u\n", rank
->ce_count
);
264 /* cwrow<id>/attribute files */
265 DEVICE_ATTR_LEGACY(size_mb
, S_IRUGO
, csrow_size_show
, NULL
);
266 DEVICE_ATTR_LEGACY(dev_type
, S_IRUGO
, csrow_dev_type_show
, NULL
);
267 DEVICE_ATTR_LEGACY(mem_type
, S_IRUGO
, csrow_mem_type_show
, NULL
);
268 DEVICE_ATTR_LEGACY(edac_mode
, S_IRUGO
, csrow_edac_mode_show
, NULL
);
269 DEVICE_ATTR_LEGACY(ue_count
, S_IRUGO
, csrow_ue_count_show
, NULL
);
270 DEVICE_ATTR_LEGACY(ce_count
, S_IRUGO
, csrow_ce_count_show
, NULL
);
272 /* default attributes of the CSROW<id> object */
273 static struct attribute
*csrow_attrs
[] = {
274 &dev_attr_legacy_dev_type
.attr
,
275 &dev_attr_legacy_mem_type
.attr
,
276 &dev_attr_legacy_edac_mode
.attr
,
277 &dev_attr_legacy_size_mb
.attr
,
278 &dev_attr_legacy_ue_count
.attr
,
279 &dev_attr_legacy_ce_count
.attr
,
283 static struct attribute_group csrow_attr_grp
= {
284 .attrs
= csrow_attrs
,
287 static const struct attribute_group
*csrow_attr_groups
[] = {
292 static void csrow_attr_release(struct device
*dev
)
294 struct csrow_info
*csrow
= container_of(dev
, struct csrow_info
, dev
);
296 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev
));
300 static struct device_type csrow_attr_type
= {
301 .groups
= csrow_attr_groups
,
302 .release
= csrow_attr_release
,
306 * possible dynamic channel DIMM Label attribute files
310 #define EDAC_NR_CHANNELS 6
312 DEVICE_CHANNEL(ch0_dimm_label
, S_IRUGO
| S_IWUSR
,
313 channel_dimm_label_show
, channel_dimm_label_store
, 0);
314 DEVICE_CHANNEL(ch1_dimm_label
, S_IRUGO
| S_IWUSR
,
315 channel_dimm_label_show
, channel_dimm_label_store
, 1);
316 DEVICE_CHANNEL(ch2_dimm_label
, S_IRUGO
| S_IWUSR
,
317 channel_dimm_label_show
, channel_dimm_label_store
, 2);
318 DEVICE_CHANNEL(ch3_dimm_label
, S_IRUGO
| S_IWUSR
,
319 channel_dimm_label_show
, channel_dimm_label_store
, 3);
320 DEVICE_CHANNEL(ch4_dimm_label
, S_IRUGO
| S_IWUSR
,
321 channel_dimm_label_show
, channel_dimm_label_store
, 4);
322 DEVICE_CHANNEL(ch5_dimm_label
, S_IRUGO
| S_IWUSR
,
323 channel_dimm_label_show
, channel_dimm_label_store
, 5);
325 /* Total possible dynamic DIMM Label attribute file table */
326 static struct attribute
*dynamic_csrow_dimm_attr
[] = {
327 &dev_attr_legacy_ch0_dimm_label
.attr
.attr
,
328 &dev_attr_legacy_ch1_dimm_label
.attr
.attr
,
329 &dev_attr_legacy_ch2_dimm_label
.attr
.attr
,
330 &dev_attr_legacy_ch3_dimm_label
.attr
.attr
,
331 &dev_attr_legacy_ch4_dimm_label
.attr
.attr
,
332 &dev_attr_legacy_ch5_dimm_label
.attr
.attr
,
336 /* possible dynamic channel ce_count attribute files */
337 DEVICE_CHANNEL(ch0_ce_count
, S_IRUGO
,
338 channel_ce_count_show
, NULL
, 0);
339 DEVICE_CHANNEL(ch1_ce_count
, S_IRUGO
,
340 channel_ce_count_show
, NULL
, 1);
341 DEVICE_CHANNEL(ch2_ce_count
, S_IRUGO
,
342 channel_ce_count_show
, NULL
, 2);
343 DEVICE_CHANNEL(ch3_ce_count
, S_IRUGO
,
344 channel_ce_count_show
, NULL
, 3);
345 DEVICE_CHANNEL(ch4_ce_count
, S_IRUGO
,
346 channel_ce_count_show
, NULL
, 4);
347 DEVICE_CHANNEL(ch5_ce_count
, S_IRUGO
,
348 channel_ce_count_show
, NULL
, 5);
350 /* Total possible dynamic ce_count attribute file table */
351 static struct attribute
*dynamic_csrow_ce_count_attr
[] = {
352 &dev_attr_legacy_ch0_ce_count
.attr
.attr
,
353 &dev_attr_legacy_ch1_ce_count
.attr
.attr
,
354 &dev_attr_legacy_ch2_ce_count
.attr
.attr
,
355 &dev_attr_legacy_ch3_ce_count
.attr
.attr
,
356 &dev_attr_legacy_ch4_ce_count
.attr
.attr
,
357 &dev_attr_legacy_ch5_ce_count
.attr
.attr
,
361 static umode_t
csrow_dev_is_visible(struct kobject
*kobj
,
362 struct attribute
*attr
, int idx
)
364 struct device
*dev
= kobj_to_dev(kobj
);
365 struct csrow_info
*csrow
= container_of(dev
, struct csrow_info
, dev
);
367 if (idx
>= csrow
->nr_channels
)
369 /* Only expose populated DIMMs */
370 if (!csrow
->channels
[idx
]->dimm
->nr_pages
)
376 static const struct attribute_group csrow_dev_dimm_group
= {
377 .attrs
= dynamic_csrow_dimm_attr
,
378 .is_visible
= csrow_dev_is_visible
,
381 static const struct attribute_group csrow_dev_ce_count_group
= {
382 .attrs
= dynamic_csrow_ce_count_attr
,
383 .is_visible
= csrow_dev_is_visible
,
386 static const struct attribute_group
*csrow_dev_groups
[] = {
387 &csrow_dev_dimm_group
,
388 &csrow_dev_ce_count_group
,
392 static inline int nr_pages_per_csrow(struct csrow_info
*csrow
)
394 int chan
, nr_pages
= 0;
396 for (chan
= 0; chan
< csrow
->nr_channels
; chan
++)
397 nr_pages
+= csrow
->channels
[chan
]->dimm
->nr_pages
;
402 /* Create a CSROW object under specifed edac_mc_device */
403 static int edac_create_csrow_object(struct mem_ctl_info
*mci
,
404 struct csrow_info
*csrow
, int index
)
406 if (csrow
->nr_channels
> EDAC_NR_CHANNELS
)
409 csrow
->dev
.type
= &csrow_attr_type
;
410 csrow
->dev
.bus
= mci
->bus
;
411 csrow
->dev
.groups
= csrow_dev_groups
;
412 device_initialize(&csrow
->dev
);
413 csrow
->dev
.parent
= &mci
->dev
;
415 dev_set_name(&csrow
->dev
, "csrow%d", index
);
416 dev_set_drvdata(&csrow
->dev
, csrow
);
418 edac_dbg(0, "creating (virtual) csrow node %s\n",
419 dev_name(&csrow
->dev
));
421 return device_add(&csrow
->dev
);
424 /* Create a CSROW object under specifed edac_mc_device */
425 static int edac_create_csrow_objects(struct mem_ctl_info
*mci
)
428 struct csrow_info
*csrow
;
430 for (i
= 0; i
< mci
->nr_csrows
; i
++) {
431 csrow
= mci
->csrows
[i
];
432 if (!nr_pages_per_csrow(csrow
))
434 err
= edac_create_csrow_object(mci
, mci
->csrows
[i
], i
);
437 "failure: create csrow objects for csrow %d\n",
445 for (--i
; i
>= 0; i
--) {
446 csrow
= mci
->csrows
[i
];
447 if (!nr_pages_per_csrow(csrow
))
449 put_device(&mci
->csrows
[i
]->dev
);
455 static void edac_delete_csrow_objects(struct mem_ctl_info
*mci
)
458 struct csrow_info
*csrow
;
460 for (i
= mci
->nr_csrows
- 1; i
>= 0; i
--) {
461 csrow
= mci
->csrows
[i
];
462 if (!nr_pages_per_csrow(csrow
))
464 device_unregister(&mci
->csrows
[i
]->dev
);
470 * Per-dimm (or per-rank) devices
473 #define to_dimm(k) container_of(k, struct dimm_info, dev)
475 /* show/store functions for DIMM Label attributes */
476 static ssize_t
dimmdev_location_show(struct device
*dev
,
477 struct device_attribute
*mattr
, char *data
)
479 struct dimm_info
*dimm
= to_dimm(dev
);
481 return edac_dimm_info_location(dimm
, data
, PAGE_SIZE
);
484 static ssize_t
dimmdev_label_show(struct device
*dev
,
485 struct device_attribute
*mattr
, char *data
)
487 struct dimm_info
*dimm
= to_dimm(dev
);
489 /* if field has not been initialized, there is nothing to send */
493 return snprintf(data
, EDAC_MC_LABEL_LEN
, "%s\n", dimm
->label
);
496 static ssize_t
dimmdev_label_store(struct device
*dev
,
497 struct device_attribute
*mattr
,
501 struct dimm_info
*dimm
= to_dimm(dev
);
503 ssize_t max_size
= 0;
505 max_size
= min((ssize_t
) count
, (ssize_t
) EDAC_MC_LABEL_LEN
- 1);
506 strncpy(dimm
->label
, data
, max_size
);
507 dimm
->label
[max_size
] = '\0';
512 static ssize_t
dimmdev_size_show(struct device
*dev
,
513 struct device_attribute
*mattr
, char *data
)
515 struct dimm_info
*dimm
= to_dimm(dev
);
517 return sprintf(data
, "%u\n", PAGES_TO_MiB(dimm
->nr_pages
));
520 static ssize_t
dimmdev_mem_type_show(struct device
*dev
,
521 struct device_attribute
*mattr
, char *data
)
523 struct dimm_info
*dimm
= to_dimm(dev
);
525 return sprintf(data
, "%s\n", mem_types
[dimm
->mtype
]);
528 static ssize_t
dimmdev_dev_type_show(struct device
*dev
,
529 struct device_attribute
*mattr
, char *data
)
531 struct dimm_info
*dimm
= to_dimm(dev
);
533 return sprintf(data
, "%s\n", dev_types
[dimm
->dtype
]);
536 static ssize_t
dimmdev_edac_mode_show(struct device
*dev
,
537 struct device_attribute
*mattr
,
540 struct dimm_info
*dimm
= to_dimm(dev
);
542 return sprintf(data
, "%s\n", edac_caps
[dimm
->edac_mode
]);
545 /* dimm/rank attribute files */
546 static DEVICE_ATTR(dimm_label
, S_IRUGO
| S_IWUSR
,
547 dimmdev_label_show
, dimmdev_label_store
);
548 static DEVICE_ATTR(dimm_location
, S_IRUGO
, dimmdev_location_show
, NULL
);
549 static DEVICE_ATTR(size
, S_IRUGO
, dimmdev_size_show
, NULL
);
550 static DEVICE_ATTR(dimm_mem_type
, S_IRUGO
, dimmdev_mem_type_show
, NULL
);
551 static DEVICE_ATTR(dimm_dev_type
, S_IRUGO
, dimmdev_dev_type_show
, NULL
);
552 static DEVICE_ATTR(dimm_edac_mode
, S_IRUGO
, dimmdev_edac_mode_show
, NULL
);
554 /* attributes of the dimm<id>/rank<id> object */
555 static struct attribute
*dimm_attrs
[] = {
556 &dev_attr_dimm_label
.attr
,
557 &dev_attr_dimm_location
.attr
,
559 &dev_attr_dimm_mem_type
.attr
,
560 &dev_attr_dimm_dev_type
.attr
,
561 &dev_attr_dimm_edac_mode
.attr
,
565 static struct attribute_group dimm_attr_grp
= {
569 static const struct attribute_group
*dimm_attr_groups
[] = {
574 static void dimm_attr_release(struct device
*dev
)
576 struct dimm_info
*dimm
= container_of(dev
, struct dimm_info
, dev
);
578 edac_dbg(1, "Releasing dimm device %s\n", dev_name(dev
));
582 static struct device_type dimm_attr_type
= {
583 .groups
= dimm_attr_groups
,
584 .release
= dimm_attr_release
,
587 /* Create a DIMM object under specifed memory controller device */
588 static int edac_create_dimm_object(struct mem_ctl_info
*mci
,
589 struct dimm_info
*dimm
,
595 dimm
->dev
.type
= &dimm_attr_type
;
596 dimm
->dev
.bus
= mci
->bus
;
597 device_initialize(&dimm
->dev
);
599 dimm
->dev
.parent
= &mci
->dev
;
601 dev_set_name(&dimm
->dev
, "rank%d", index
);
603 dev_set_name(&dimm
->dev
, "dimm%d", index
);
604 dev_set_drvdata(&dimm
->dev
, dimm
);
605 pm_runtime_forbid(&mci
->dev
);
607 err
= device_add(&dimm
->dev
);
609 edac_dbg(0, "creating rank/dimm device %s\n", dev_name(&dimm
->dev
));
615 * Memory controller device
618 #define to_mci(k) container_of(k, struct mem_ctl_info, dev)
620 static ssize_t
mci_reset_counters_store(struct device
*dev
,
621 struct device_attribute
*mattr
,
622 const char *data
, size_t count
)
624 struct mem_ctl_info
*mci
= to_mci(dev
);
625 int cnt
, row
, chan
, i
;
628 mci
->ue_noinfo_count
= 0;
629 mci
->ce_noinfo_count
= 0;
631 for (row
= 0; row
< mci
->nr_csrows
; row
++) {
632 struct csrow_info
*ri
= mci
->csrows
[row
];
637 for (chan
= 0; chan
< ri
->nr_channels
; chan
++)
638 ri
->channels
[chan
]->ce_count
= 0;
642 for (i
= 0; i
< mci
->n_layers
; i
++) {
643 cnt
*= mci
->layers
[i
].size
;
644 memset(mci
->ce_per_layer
[i
], 0, cnt
* sizeof(u32
));
645 memset(mci
->ue_per_layer
[i
], 0, cnt
* sizeof(u32
));
648 mci
->start_time
= jiffies
;
652 /* Memory scrubbing interface:
654 * A MC driver can limit the scrubbing bandwidth based on the CPU type.
655 * Therefore, ->set_sdram_scrub_rate should be made to return the actual
656 * bandwidth that is accepted or 0 when scrubbing is to be disabled.
658 * Negative value still means that an error has occurred while setting
661 static ssize_t
mci_sdram_scrub_rate_store(struct device
*dev
,
662 struct device_attribute
*mattr
,
663 const char *data
, size_t count
)
665 struct mem_ctl_info
*mci
= to_mci(dev
);
666 unsigned long bandwidth
= 0;
669 if (kstrtoul(data
, 10, &bandwidth
) < 0)
672 new_bw
= mci
->set_sdram_scrub_rate(mci
, bandwidth
);
674 edac_printk(KERN_WARNING
, EDAC_MC
,
675 "Error setting scrub rate to: %lu\n", bandwidth
);
683 * ->get_sdram_scrub_rate() return value semantics same as above.
685 static ssize_t
mci_sdram_scrub_rate_show(struct device
*dev
,
686 struct device_attribute
*mattr
,
689 struct mem_ctl_info
*mci
= to_mci(dev
);
692 bandwidth
= mci
->get_sdram_scrub_rate(mci
);
694 edac_printk(KERN_DEBUG
, EDAC_MC
, "Error reading scrub rate\n");
698 return sprintf(data
, "%d\n", bandwidth
);
701 /* default attribute files for the MCI object */
702 static ssize_t
mci_ue_count_show(struct device
*dev
,
703 struct device_attribute
*mattr
,
706 struct mem_ctl_info
*mci
= to_mci(dev
);
708 return sprintf(data
, "%d\n", mci
->ue_mc
);
711 static ssize_t
mci_ce_count_show(struct device
*dev
,
712 struct device_attribute
*mattr
,
715 struct mem_ctl_info
*mci
= to_mci(dev
);
717 return sprintf(data
, "%d\n", mci
->ce_mc
);
720 static ssize_t
mci_ce_noinfo_show(struct device
*dev
,
721 struct device_attribute
*mattr
,
724 struct mem_ctl_info
*mci
= to_mci(dev
);
726 return sprintf(data
, "%d\n", mci
->ce_noinfo_count
);
729 static ssize_t
mci_ue_noinfo_show(struct device
*dev
,
730 struct device_attribute
*mattr
,
733 struct mem_ctl_info
*mci
= to_mci(dev
);
735 return sprintf(data
, "%d\n", mci
->ue_noinfo_count
);
738 static ssize_t
mci_seconds_show(struct device
*dev
,
739 struct device_attribute
*mattr
,
742 struct mem_ctl_info
*mci
= to_mci(dev
);
744 return sprintf(data
, "%ld\n", (jiffies
- mci
->start_time
) / HZ
);
747 static ssize_t
mci_ctl_name_show(struct device
*dev
,
748 struct device_attribute
*mattr
,
751 struct mem_ctl_info
*mci
= to_mci(dev
);
753 return sprintf(data
, "%s\n", mci
->ctl_name
);
756 static ssize_t
mci_size_mb_show(struct device
*dev
,
757 struct device_attribute
*mattr
,
760 struct mem_ctl_info
*mci
= to_mci(dev
);
761 int total_pages
= 0, csrow_idx
, j
;
763 for (csrow_idx
= 0; csrow_idx
< mci
->nr_csrows
; csrow_idx
++) {
764 struct csrow_info
*csrow
= mci
->csrows
[csrow_idx
];
766 for (j
= 0; j
< csrow
->nr_channels
; j
++) {
767 struct dimm_info
*dimm
= csrow
->channels
[j
]->dimm
;
769 total_pages
+= dimm
->nr_pages
;
773 return sprintf(data
, "%u\n", PAGES_TO_MiB(total_pages
));
776 static ssize_t
mci_max_location_show(struct device
*dev
,
777 struct device_attribute
*mattr
,
780 struct mem_ctl_info
*mci
= to_mci(dev
);
784 for (i
= 0; i
< mci
->n_layers
; i
++) {
785 p
+= sprintf(p
, "%s %d ",
786 edac_layer_name
[mci
->layers
[i
].type
],
787 mci
->layers
[i
].size
- 1);
793 #ifdef CONFIG_EDAC_DEBUG
794 static ssize_t
edac_fake_inject_write(struct file
*file
,
795 const char __user
*data
,
796 size_t count
, loff_t
*ppos
)
798 struct device
*dev
= file
->private_data
;
799 struct mem_ctl_info
*mci
= to_mci(dev
);
800 static enum hw_event_mc_err_type type
;
801 u16 errcount
= mci
->fake_inject_count
;
806 type
= mci
->fake_inject_ue
? HW_EVENT_ERR_UNCORRECTED
807 : HW_EVENT_ERR_CORRECTED
;
810 "Generating %d %s fake error%s to %d.%d.%d to test core handling. NOTE: this won't test the driver-specific decoding logic.\n",
812 (type
== HW_EVENT_ERR_UNCORRECTED
) ? "UE" : "CE",
813 errcount
> 1 ? "s" : "",
814 mci
->fake_inject_layer
[0],
815 mci
->fake_inject_layer
[1],
816 mci
->fake_inject_layer
[2]
818 edac_mc_handle_error(type
, mci
, errcount
, 0, 0, 0,
819 mci
->fake_inject_layer
[0],
820 mci
->fake_inject_layer
[1],
821 mci
->fake_inject_layer
[2],
822 "FAKE ERROR", "for EDAC testing only");
827 static const struct file_operations debug_fake_inject_fops
= {
829 .write
= edac_fake_inject_write
,
830 .llseek
= generic_file_llseek
,
834 /* default Control file */
835 static DEVICE_ATTR(reset_counters
, S_IWUSR
, NULL
, mci_reset_counters_store
);
837 /* default Attribute files */
838 static DEVICE_ATTR(mc_name
, S_IRUGO
, mci_ctl_name_show
, NULL
);
839 static DEVICE_ATTR(size_mb
, S_IRUGO
, mci_size_mb_show
, NULL
);
840 static DEVICE_ATTR(seconds_since_reset
, S_IRUGO
, mci_seconds_show
, NULL
);
841 static DEVICE_ATTR(ue_noinfo_count
, S_IRUGO
, mci_ue_noinfo_show
, NULL
);
842 static DEVICE_ATTR(ce_noinfo_count
, S_IRUGO
, mci_ce_noinfo_show
, NULL
);
843 static DEVICE_ATTR(ue_count
, S_IRUGO
, mci_ue_count_show
, NULL
);
844 static DEVICE_ATTR(ce_count
, S_IRUGO
, mci_ce_count_show
, NULL
);
845 static DEVICE_ATTR(max_location
, S_IRUGO
, mci_max_location_show
, NULL
);
847 /* memory scrubber attribute file */
848 DEVICE_ATTR(sdram_scrub_rate
, 0, mci_sdram_scrub_rate_show
,
849 mci_sdram_scrub_rate_store
); /* umode set later in is_visible */
851 static struct attribute
*mci_attrs
[] = {
852 &dev_attr_reset_counters
.attr
,
853 &dev_attr_mc_name
.attr
,
854 &dev_attr_size_mb
.attr
,
855 &dev_attr_seconds_since_reset
.attr
,
856 &dev_attr_ue_noinfo_count
.attr
,
857 &dev_attr_ce_noinfo_count
.attr
,
858 &dev_attr_ue_count
.attr
,
859 &dev_attr_ce_count
.attr
,
860 &dev_attr_max_location
.attr
,
861 &dev_attr_sdram_scrub_rate
.attr
,
865 static umode_t
mci_attr_is_visible(struct kobject
*kobj
,
866 struct attribute
*attr
, int idx
)
868 struct device
*dev
= kobj_to_dev(kobj
);
869 struct mem_ctl_info
*mci
= to_mci(dev
);
872 if (attr
!= &dev_attr_sdram_scrub_rate
.attr
)
874 if (mci
->get_sdram_scrub_rate
)
876 if (mci
->set_sdram_scrub_rate
)
881 static struct attribute_group mci_attr_grp
= {
883 .is_visible
= mci_attr_is_visible
,
886 static const struct attribute_group
*mci_attr_groups
[] = {
891 static void mci_attr_release(struct device
*dev
)
893 struct mem_ctl_info
*mci
= container_of(dev
, struct mem_ctl_info
, dev
);
895 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev
));
899 static struct device_type mci_attr_type
= {
900 .groups
= mci_attr_groups
,
901 .release
= mci_attr_release
,
904 #ifdef CONFIG_EDAC_DEBUG
905 static struct dentry
*edac_debugfs
;
907 int __init
edac_debugfs_init(void)
909 edac_debugfs
= debugfs_create_dir("edac", NULL
);
910 if (IS_ERR(edac_debugfs
)) {
917 void edac_debugfs_exit(void)
919 debugfs_remove(edac_debugfs
);
922 static int edac_create_debug_nodes(struct mem_ctl_info
*mci
)
924 struct dentry
*d
, *parent
;
931 d
= debugfs_create_dir(mci
->dev
.kobj
.name
, edac_debugfs
);
936 for (i
= 0; i
< mci
->n_layers
; i
++) {
937 sprintf(name
, "fake_inject_%s",
938 edac_layer_name
[mci
->layers
[i
].type
]);
939 d
= debugfs_create_u8(name
, S_IRUGO
| S_IWUSR
, parent
,
940 &mci
->fake_inject_layer
[i
]);
945 d
= debugfs_create_bool("fake_inject_ue", S_IRUGO
| S_IWUSR
, parent
,
946 &mci
->fake_inject_ue
);
950 d
= debugfs_create_u16("fake_inject_count", S_IRUGO
| S_IWUSR
, parent
,
951 &mci
->fake_inject_count
);
955 d
= debugfs_create_file("fake_inject", S_IWUSR
, parent
,
957 &debug_fake_inject_fops
);
961 mci
->debugfs
= parent
;
964 debugfs_remove(mci
->debugfs
);
970 * Create a new Memory Controller kobject instance,
971 * mc<id> under the 'mc' directory
977 int edac_create_sysfs_mci_device(struct mem_ctl_info
*mci
,
978 const struct attribute_group
**groups
)
984 * The memory controller needs its own bus, in order to avoid
985 * namespace conflicts at /sys/bus/edac.
987 name
= kasprintf(GFP_KERNEL
, "mc%d", mci
->mc_idx
);
991 mci
->bus
->name
= name
;
993 edac_dbg(0, "creating bus %s\n", mci
->bus
->name
);
995 err
= bus_register(mci
->bus
);
1001 /* get the /sys/devices/system/edac subsys reference */
1002 mci
->dev
.type
= &mci_attr_type
;
1003 device_initialize(&mci
->dev
);
1005 mci
->dev
.parent
= mci_pdev
;
1006 mci
->dev
.bus
= mci
->bus
;
1007 mci
->dev
.groups
= groups
;
1008 dev_set_name(&mci
->dev
, "mc%d", mci
->mc_idx
);
1009 dev_set_drvdata(&mci
->dev
, mci
);
1010 pm_runtime_forbid(&mci
->dev
);
1012 edac_dbg(0, "creating device %s\n", dev_name(&mci
->dev
));
1013 err
= device_add(&mci
->dev
);
1015 edac_dbg(1, "failure: create device %s\n", dev_name(&mci
->dev
));
1016 goto fail_unregister_bus
;
1020 * Create the dimm/rank devices
1022 for (i
= 0; i
< mci
->tot_dimms
; i
++) {
1023 struct dimm_info
*dimm
= mci
->dimms
[i
];
1024 /* Only expose populated DIMMs */
1025 if (!dimm
->nr_pages
)
1028 #ifdef CONFIG_EDAC_DEBUG
1029 edac_dbg(1, "creating dimm%d, located at ", i
);
1030 if (edac_debug_level
>= 1) {
1032 for (lay
= 0; lay
< mci
->n_layers
; lay
++)
1033 printk(KERN_CONT
"%s %d ",
1034 edac_layer_name
[mci
->layers
[lay
].type
],
1035 dimm
->location
[lay
]);
1036 printk(KERN_CONT
"\n");
1039 err
= edac_create_dimm_object(mci
, dimm
, i
);
1041 edac_dbg(1, "failure: create dimm %d obj\n", i
);
1042 goto fail_unregister_dimm
;
1046 #ifdef CONFIG_EDAC_LEGACY_SYSFS
1047 err
= edac_create_csrow_objects(mci
);
1049 goto fail_unregister_dimm
;
1052 #ifdef CONFIG_EDAC_DEBUG
1053 edac_create_debug_nodes(mci
);
1057 fail_unregister_dimm
:
1058 for (i
--; i
>= 0; i
--) {
1059 struct dimm_info
*dimm
= mci
->dimms
[i
];
1060 if (!dimm
->nr_pages
)
1063 device_unregister(&dimm
->dev
);
1065 device_unregister(&mci
->dev
);
1066 fail_unregister_bus
:
1067 bus_unregister(mci
->bus
);
1074 * remove a Memory Controller instance
1076 void edac_remove_sysfs_mci_device(struct mem_ctl_info
*mci
)
1082 #ifdef CONFIG_EDAC_DEBUG
1083 debugfs_remove(mci
->debugfs
);
1085 #ifdef CONFIG_EDAC_LEGACY_SYSFS
1086 edac_delete_csrow_objects(mci
);
1089 for (i
= 0; i
< mci
->tot_dimms
; i
++) {
1090 struct dimm_info
*dimm
= mci
->dimms
[i
];
1091 if (dimm
->nr_pages
== 0)
1093 edac_dbg(0, "removing device %s\n", dev_name(&dimm
->dev
));
1094 device_unregister(&dimm
->dev
);
1098 void edac_unregister_sysfs(struct mem_ctl_info
*mci
)
1100 const char *name
= mci
->bus
->name
;
1102 edac_dbg(1, "Unregistering device %s\n", dev_name(&mci
->dev
));
1103 device_unregister(&mci
->dev
);
1104 bus_unregister(mci
->bus
);
1108 static void mc_attr_release(struct device
*dev
)
1111 * There's no container structure here, as this is just the mci
1112 * parent device, used to create the /sys/devices/mc sysfs node.
1113 * So, there are no attributes on it.
1115 edac_dbg(1, "Releasing device %s\n", dev_name(dev
));
1119 static struct device_type mc_attr_type
= {
1120 .release
= mc_attr_release
,
1123 * Init/exit code for the module. Basically, creates/removes /sys/class/rc
1125 int __init
edac_mc_sysfs_init(void)
1127 struct bus_type
*edac_subsys
;
1130 /* get the /sys/devices/system/edac subsys reference */
1131 edac_subsys
= edac_get_sysfs_subsys();
1132 if (edac_subsys
== NULL
) {
1133 edac_dbg(1, "no edac_subsys\n");
1138 mci_pdev
= kzalloc(sizeof(*mci_pdev
), GFP_KERNEL
);
1144 mci_pdev
->bus
= edac_subsys
;
1145 mci_pdev
->type
= &mc_attr_type
;
1146 device_initialize(mci_pdev
);
1147 dev_set_name(mci_pdev
, "mc");
1149 err
= device_add(mci_pdev
);
1153 edac_dbg(0, "device %s created\n", dev_name(mci_pdev
));
1160 edac_put_sysfs_subsys();
1165 void edac_mc_sysfs_exit(void)
1167 device_unregister(mci_pdev
);
1168 edac_put_sysfs_subsys();