1 #ifndef TARGET_CORE_UA_H
2 #define TARGET_CORE_UA_H
5 * From spc4r17, Table D.1: ASC and ASCQ Assignement
7 #define ASCQ_29H_POWER_ON_RESET_OR_BUS_DEVICE_RESET_OCCURED 0x00
8 #define ASCQ_29H_POWER_ON_OCCURRED 0x01
9 #define ASCQ_29H_SCSI_BUS_RESET_OCCURED 0x02
10 #define ASCQ_29H_BUS_DEVICE_RESET_FUNCTION_OCCURRED 0x03
11 #define ASCQ_29H_DEVICE_INTERNAL_RESET 0x04
12 #define ASCQ_29H_TRANSCEIVER_MODE_CHANGED_TO_SINGLE_ENDED 0x05
13 #define ASCQ_29H_TRANSCEIVER_MODE_CHANGED_TO_LVD 0x06
14 #define ASCQ_29H_NEXUS_LOSS_OCCURRED 0x07
16 #define ASCQ_2AH_PARAMETERS_CHANGED 0x00
17 #define ASCQ_2AH_MODE_PARAMETERS_CHANGED 0x01
18 #define ASCQ_2AH_LOG_PARAMETERS_CHANGED 0x02
19 #define ASCQ_2AH_RESERVATIONS_PREEMPTED 0x03
20 #define ASCQ_2AH_RESERVATIONS_RELEASED 0x04
21 #define ASCQ_2AH_REGISTRATIONS_PREEMPTED 0x05
22 #define ASCQ_2AH_ASYMMETRIC_ACCESS_STATE_CHANGED 0x06
23 #define ASCQ_2AH_IMPLICIT_ASYMMETRIC_ACCESS_STATE_TRANSITION_FAILED 0x07
24 #define ASCQ_2AH_PRIORITY_CHANGED 0x08
26 #define ASCQ_2CH_PREVIOUS_RESERVATION_CONFLICT_STATUS 0x09
28 extern struct kmem_cache
*se_ua_cache
;
30 extern sense_reason_t
target_scsi3_ua_check(struct se_cmd
*);
31 extern int core_scsi3_ua_allocate(struct se_node_acl
*, u32
, u8
, u8
);
32 extern void core_scsi3_ua_release_all(struct se_dev_entry
*);
33 extern void core_scsi3_ua_for_check_condition(struct se_cmd
*, u8
*, u8
*);
34 extern int core_scsi3_ua_clear_for_request_sense(struct se_cmd
*,
37 #endif /* TARGET_CORE_UA_H */