arch/blackfin/kernel/cplb-nompu/cacheinit.c

   1 /*
   2  *               Copyright 2004-2007 Analog Devices Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, see the file COPYING, or write
  16  * to the Free Software Foundation, Inc.,
  17  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  18  */
  19
  20 #include <linux/cpu.h>
  21
  22 #include <asm/cacheflush.h>
  23 #include <asm/blackfin.h>
  24 #include <asm/cplb.h>
  25 #include <asm/cplbinit.h>
  26
  27 #if defined(CONFIG_BFIN_ICACHE)
  28 void bfin_icache_init(void)
  29 {
  30         unsigned long *table = icplb_table;
  31         unsigned long ctrl;
  32         int i;
  33
  34         for (i = 0; i < MAX_CPLBS; i++) {
  35                 unsigned long addr = *table++;
  36                 unsigned long data = *table++;
  37                 if (addr == (unsigned long)-1)
  38                         break;
  39                 bfin_write32(ICPLB_ADDR0 + i * 4, addr);
  40                 bfin_write32(ICPLB_DATA0 + i * 4, data);
  41         }
  42         ctrl = bfin_read_IMEM_CONTROL();
  43         ctrl |= IMC | ENICPLB;
  44         bfin_write_IMEM_CONTROL(ctrl);
  45         SSYNC();
  46 }
  47 #endif
  48
  49 #if defined(CONFIG_BFIN_DCACHE)
  50 void bfin_dcache_init(void)
  51 {
  52         unsigned long *table = dcplb_table;
  53         unsigned long ctrl;
  54         int i;
  55
  56         for (i = 0; i < MAX_CPLBS; i++) {
  57                 unsigned long addr = *table++;
  58                 unsigned long data = *table++;
  59                 if (addr == (unsigned long)-1)
  60                         break;
  61                 bfin_write32(DCPLB_ADDR0 + i * 4, addr);
  62                 bfin_write32(DCPLB_DATA0 + i * 4, data);
  63         }
  64         ctrl = bfin_read_DMEM_CONTROL();
  65         ctrl |= DMEM_CNTR;
  66         bfin_write_DMEM_CONTROL(ctrl);
  67         SSYNC();
  68 }
  69 #endif