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[linux/fpc-iii.git] / arch / blackfin / mach-bf533 / boards / cm_bf533.c
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1 /*
2 * File: arch/blackfin/mach-bf533/boards/cm_bf533.c
3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
6 * Created: 2005
7 * Description: Board description file
9 * Modified:
10 * Copyright 2004-2006 Analog Devices Inc.
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
30 #include <linux/device.h>
31 #include <linux/platform_device.h>
32 #include <linux/mtd/mtd.h>
33 #include <linux/mtd/partitions.h>
34 #include <linux/spi/spi.h>
35 #include <linux/spi/flash.h>
36 #include <linux/usb/isp1362.h>
37 #include <linux/ata_platform.h>
38 #include <linux/irq.h>
39 #include <asm/dma.h>
40 #include <asm/bfin5xx_spi.h>
41 #include <asm/portmux.h>
44 * Name the Board for the /proc/cpuinfo
46 const char bfin_board_name[] = "Bluetechnix CM BF533";
48 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
49 /* all SPI peripherals info goes here */
50 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
51 static struct mtd_partition bfin_spi_flash_partitions[] = {
53 .name = "bootloader",
54 .size = 0x00020000,
55 .offset = 0,
56 .mask_flags = MTD_CAP_ROM
57 }, {
58 .name = "kernel",
59 .size = 0xe0000,
60 .offset = 0x20000
61 }, {
62 .name = "file system",
63 .size = 0x700000,
64 .offset = 0x00100000,
68 static struct flash_platform_data bfin_spi_flash_data = {
69 .name = "m25p80",
70 .parts = bfin_spi_flash_partitions,
71 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
72 .type = "m25p64",
75 /* SPI flash chip (m25p64) */
76 static struct bfin5xx_spi_chip spi_flash_chip_info = {
77 .enable_dma = 0, /* use dma transfer with this chip*/
78 .bits_per_word = 8,
80 #endif
82 /* SPI ADC chip */
83 #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
84 static struct bfin5xx_spi_chip spi_adc_chip_info = {
85 .enable_dma = 1, /* use dma transfer with this chip*/
86 .bits_per_word = 16,
88 #endif
90 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
91 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
92 .enable_dma = 0,
93 .bits_per_word = 16,
95 #endif
97 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
98 static struct bfin5xx_spi_chip spi_mmc_chip_info = {
99 .enable_dma = 1,
100 .bits_per_word = 8,
102 #endif
104 static struct spi_board_info bfin_spi_board_info[] __initdata = {
105 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
107 /* the modalias must be the same as spi device driver name */
108 .modalias = "m25p80", /* Name of spi_driver for this device */
109 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
110 .bus_num = 0, /* Framework bus number */
111 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
112 .platform_data = &bfin_spi_flash_data,
113 .controller_data = &spi_flash_chip_info,
114 .mode = SPI_MODE_3,
116 #endif
118 #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
120 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
121 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
122 .bus_num = 0, /* Framework bus number */
123 .chip_select = 2, /* Framework chip select. */
124 .platform_data = NULL, /* No spi_driver specific config */
125 .controller_data = &spi_adc_chip_info,
127 #endif
129 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
131 .modalias = "ad1836-spi",
132 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
133 .bus_num = 0,
134 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
135 .controller_data = &ad1836_spi_chip_info,
137 #endif
139 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
141 .modalias = "spi_mmc_dummy",
142 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
143 .bus_num = 0,
144 .chip_select = 0,
145 .platform_data = NULL,
146 .controller_data = &spi_mmc_chip_info,
147 .mode = SPI_MODE_3,
150 .modalias = "spi_mmc",
151 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
152 .bus_num = 0,
153 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
154 .platform_data = NULL,
155 .controller_data = &spi_mmc_chip_info,
156 .mode = SPI_MODE_3,
158 #endif
161 /* SPI (0) */
162 static struct resource bfin_spi0_resource[] = {
163 [0] = {
164 .start = SPI0_REGBASE,
165 .end = SPI0_REGBASE + 0xFF,
166 .flags = IORESOURCE_MEM,
168 [1] = {
169 .start = CH_SPI,
170 .end = CH_SPI,
171 .flags = IORESOURCE_IRQ,
175 /* SPI controller data */
176 static struct bfin5xx_spi_master bfin_spi0_info = {
177 .num_chipselect = 8,
178 .enable_dma = 1, /* master has the ability to do dma transfer */
179 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
182 static struct platform_device bfin_spi0_device = {
183 .name = "bfin-spi",
184 .id = 0, /* Bus number */
185 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
186 .resource = bfin_spi0_resource,
187 .dev = {
188 .platform_data = &bfin_spi0_info, /* Passed to driver */
191 #endif /* spi master and devices */
193 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
194 static struct platform_device rtc_device = {
195 .name = "rtc-bfin",
196 .id = -1,
198 #endif
200 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
201 static struct resource smc91x_resources[] = {
203 .start = 0x20200300,
204 .end = 0x20200300 + 16,
205 .flags = IORESOURCE_MEM,
206 }, {
207 .start = IRQ_PF0,
208 .end = IRQ_PF0,
209 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
212 static struct platform_device smc91x_device = {
213 .name = "smc91x",
214 .id = 0,
215 .num_resources = ARRAY_SIZE(smc91x_resources),
216 .resource = smc91x_resources,
218 #endif
220 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
221 static struct resource bfin_uart_resources[] = {
223 .start = 0xFFC00400,
224 .end = 0xFFC004FF,
225 .flags = IORESOURCE_MEM,
229 static struct platform_device bfin_uart_device = {
230 .name = "bfin-uart",
231 .id = 1,
232 .num_resources = ARRAY_SIZE(bfin_uart_resources),
233 .resource = bfin_uart_resources,
235 #endif
237 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
238 static struct platform_device bfin_sport0_uart_device = {
239 .name = "bfin-sport-uart",
240 .id = 0,
243 static struct platform_device bfin_sport1_uart_device = {
244 .name = "bfin-sport-uart",
245 .id = 1,
247 #endif
249 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
250 static struct resource isp1362_hcd_resources[] = {
252 .start = 0x20308000,
253 .end = 0x20308000,
254 .flags = IORESOURCE_MEM,
255 }, {
256 .start = 0x20308004,
257 .end = 0x20308004,
258 .flags = IORESOURCE_MEM,
259 }, {
260 .start = IRQ_PF4,
261 .end = IRQ_PF4,
262 .flags = IORESOURCE_IRQ,
266 static struct isp1362_platform_data isp1362_priv = {
267 .sel15Kres = 1,
268 .clknotstop = 0,
269 .oc_enable = 0,
270 .int_act_high = 0,
271 .int_edge_triggered = 0,
272 .remote_wakeup_connected = 0,
273 .no_power_switching = 1,
274 .power_switching_mode = 0,
277 static struct platform_device isp1362_hcd_device = {
278 .name = "isp1362-hcd",
279 .id = 0,
280 .dev = {
281 .platform_data = &isp1362_priv,
283 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
284 .resource = isp1362_hcd_resources,
286 #endif
288 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
289 #define PATA_INT 38
291 static struct pata_platform_info bfin_pata_platform_data = {
292 .ioport_shift = 2,
293 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
296 static struct resource bfin_pata_resources[] = {
298 .start = 0x2030C000,
299 .end = 0x2030C01F,
300 .flags = IORESOURCE_MEM,
303 .start = 0x2030D018,
304 .end = 0x2030D01B,
305 .flags = IORESOURCE_MEM,
308 .start = PATA_INT,
309 .end = PATA_INT,
310 .flags = IORESOURCE_IRQ,
314 static struct platform_device bfin_pata_device = {
315 .name = "pata_platform",
316 .id = -1,
317 .num_resources = ARRAY_SIZE(bfin_pata_resources),
318 .resource = bfin_pata_resources,
319 .dev = {
320 .platform_data = &bfin_pata_platform_data,
323 #endif
325 static struct platform_device *cm_bf533_devices[] __initdata = {
326 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
327 &bfin_uart_device,
328 #endif
330 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
331 &bfin_sport0_uart_device,
332 &bfin_sport1_uart_device,
333 #endif
335 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
336 &rtc_device,
337 #endif
339 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
340 &isp1362_hcd_device,
341 #endif
343 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
344 &smc91x_device,
345 #endif
347 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
348 &bfin_spi0_device,
349 #endif
351 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
352 &bfin_pata_device,
353 #endif
356 static int __init cm_bf533_init(void)
358 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
359 platform_add_devices(cm_bf533_devices, ARRAY_SIZE(cm_bf533_devices));
360 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
361 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
362 #endif
364 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
365 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
366 #endif
367 return 0;
370 arch_initcall(cm_bf533_init);