arch/powerpc/platforms/83xx/usb.c

   1 /*
   2  * Freescale 83xx USB SOC setup code
   3  *
   4  * Copyright (C) 2007 Freescale Semiconductor, Inc.
   5  * Author: Li Yang
   6  *
   7  * This program is free software; you can redistribute  it and/or modify it
   8  * under  the terms of  the GNU General  Public License as published by the
   9  * Free Software Foundation;  either version 2 of the  License, or (at your
  10  * option) any later version.
  11  */
  12
  13
  14 #include <linux/stddef.h>
  15 #include <linux/kernel.h>
  16 #include <linux/errno.h>
  17
  18 #include <asm/io.h>
  19 #include <asm/prom.h>
  20 #include <sysdev/fsl_soc.h>
  21
  22 #include "mpc83xx.h"
  23
  24
  25 #ifdef CONFIG_PPC_MPC834x
  26 int mpc834x_usb_cfg(void)
  27 {
  28         unsigned long sccr, sicrl, sicrh;
  29         void __iomem *immap;
  30         struct device_node *np = NULL;
  31         int port0_is_dr = 0, port1_is_dr = 0;
  32         const void *prop, *dr_mode;
  33
  34         immap = ioremap(get_immrbase(), 0x1000);
  35         if (!immap)
  36                 return -ENOMEM;
  37
  38         /* Read registers */
  39         /* Note: DR and MPH must use the same clock setting in SCCR */
  40         sccr = in_be32(immap + MPC83XX_SCCR_OFFS) & ~MPC83XX_SCCR_USB_MASK;
  41         sicrl = in_be32(immap + MPC83XX_SICRL_OFFS) & ~MPC834X_SICRL_USB_MASK;
  42         sicrh = in_be32(immap + MPC83XX_SICRH_OFFS) & ~MPC834X_SICRH_USB_UTMI;
  43
  44         np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");
  45         if (np) {
  46                 sccr |= MPC83XX_SCCR_USB_DRCM_11;  /* 1:3 */
  47
  48                 prop = of_get_property(np, "phy_type", NULL);
  49                 if (prop && (!strcmp(prop, "utmi") ||
  50                                         !strcmp(prop, "utmi_wide"))) {
  51                         sicrl |= MPC834X_SICRL_USB0 | MPC834X_SICRL_USB1;
  52                         sicrh |= MPC834X_SICRH_USB_UTMI;
  53                         port1_is_dr = 1;
  54                 } else if (prop && !strcmp(prop, "serial")) {
  55                         dr_mode = of_get_property(np, "dr_mode", NULL);
  56                         if (dr_mode && !strcmp(dr_mode, "otg")) {
  57                                 sicrl |= MPC834X_SICRL_USB0 | MPC834X_SICRL_USB1;
  58                                 port1_is_dr = 1;
  59                         } else {
  60                                 sicrl |= MPC834X_SICRL_USB0;
  61                         }
  62                 } else if (prop && !strcmp(prop, "ulpi")) {
  63                         sicrl |= MPC834X_SICRL_USB0;
  64                 } else {
  65                         printk(KERN_WARNING "834x USB PHY type not supported\n");
  66                 }
  67                 port0_is_dr = 1;
  68                 of_node_put(np);
  69         }
  70         np = of_find_compatible_node(NULL, NULL, "fsl-usb2-mph");
  71         if (np) {
  72                 sccr |= MPC83XX_SCCR_USB_MPHCM_11; /* 1:3 */
  73
  74                 prop = of_get_property(np, "port0", NULL);
  75                 if (prop) {
  76                         if (port0_is_dr)
  77                                 printk(KERN_WARNING
  78                                         "834x USB port0 can't be used by both DR and MPH!\n");
  79                         sicrl &= ~MPC834X_SICRL_USB0;
  80                 }
  81                 prop = of_get_property(np, "port1", NULL);
  82                 if (prop) {
  83                         if (port1_is_dr)
  84                                 printk(KERN_WARNING
  85                                         "834x USB port1 can't be used by both DR and MPH!\n");
  86                         sicrl &= ~MPC834X_SICRL_USB1;
  87                 }
  88                 of_node_put(np);
  89         }
  90
  91         /* Write back */
  92         out_be32(immap + MPC83XX_SCCR_OFFS, sccr);
  93         out_be32(immap + MPC83XX_SICRL_OFFS, sicrl);
  94         out_be32(immap + MPC83XX_SICRH_OFFS, sicrh);
  95
  96         iounmap(immap);
  97         return 0;
  98 }
  99 #endif /* CONFIG_PPC_MPC834x */
 100
 101 #ifdef CONFIG_PPC_MPC831x
 102 int mpc831x_usb_cfg(void)
 103 {
 104         u32 temp;
 105         void __iomem *immap, *usb_regs;
 106         struct device_node *np = NULL;
 107         struct device_node *immr_node = NULL;
 108         const void *prop;
 109         struct resource res;
 110         int ret = 0;
 111 #ifdef CONFIG_USB_OTG
 112         const void *dr_mode;
 113 #endif
 114
 115         np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");
 116         if (!np)
 117                 return -ENODEV;
 118         prop = of_get_property(np, "phy_type", NULL);
 119
 120         /* Map IMMR space for pin and clock settings */
 121         immap = ioremap(get_immrbase(), 0x1000);
 122         if (!immap) {
 123                 of_node_put(np);
 124                 return -ENOMEM;
 125         }
 126
 127         /* Configure clock */
 128         immr_node = of_get_parent(np);
 129         if (immr_node && of_device_is_compatible(immr_node, "fsl,mpc8315-immr"))
 130                 clrsetbits_be32(immap + MPC83XX_SCCR_OFFS,
 131                                 MPC8315_SCCR_USB_MASK,
 132                                 MPC8315_SCCR_USB_DRCM_11);
 133         else
 134                 clrsetbits_be32(immap + MPC83XX_SCCR_OFFS,
 135                                 MPC83XX_SCCR_USB_MASK,
 136                                 MPC83XX_SCCR_USB_DRCM_11);
 137
 138         /* Configure pin mux for ULPI.  There is no pin mux for UTMI */
 139         if (prop && !strcmp(prop, "ulpi")) {
 140                 temp = in_be32(immap + MPC83XX_SICRL_OFFS);
 141                 temp &= ~MPC831X_SICRL_USB_MASK;
 142                 temp |= MPC831X_SICRL_USB_ULPI;
 143                 out_be32(immap + MPC83XX_SICRL_OFFS, temp);
 144
 145                 temp = in_be32(immap + MPC83XX_SICRH_OFFS);
 146                 temp &= ~MPC831X_SICRH_USB_MASK;
 147                 temp |= MPC831X_SICRH_USB_ULPI;
 148                 out_be32(immap + MPC83XX_SICRH_OFFS, temp);
 149         }
 150
 151         iounmap(immap);
 152
 153         if (immr_node)
 154                 of_node_put(immr_node);
 155
 156         /* Map USB SOC space */
 157         ret = of_address_to_resource(np, 0, &res);
 158         if (ret) {
 159                 of_node_put(np);
 160                 return ret;
 161         }
 162         usb_regs = ioremap(res.start, res.end - res.start + 1);
 163
 164         /* Using on-chip PHY */
 165         if (prop && (!strcmp(prop, "utmi_wide") ||
 166                      !strcmp(prop, "utmi"))) {
 167                 /* Set UTMI_PHY_EN, REFSEL to 48MHZ */
 168                 out_be32(usb_regs + FSL_USB2_CONTROL_OFFS,
 169                                 CONTROL_UTMI_PHY_EN | CONTROL_REFSEL_48MHZ);
 170         /* Using external UPLI PHY */
 171         } else if (prop && !strcmp(prop, "ulpi")) {
 172                 /* Set PHY_CLK_SEL to ULPI */
 173                 temp = CONTROL_PHY_CLK_SEL_ULPI;
 174 #ifdef CONFIG_USB_OTG
 175                 /* Set OTG_PORT */
 176                 dr_mode = of_get_property(np, "dr_mode", NULL);
 177                 if (dr_mode && !strcmp(dr_mode, "otg"))
 178                         temp |= CONTROL_OTG_PORT;
 179 #endif /* CONFIG_USB_OTG */
 180                 out_be32(usb_regs + FSL_USB2_CONTROL_OFFS, temp);
 181         } else {
 182                 printk(KERN_WARNING "831x USB PHY type not supported\n");
 183                 ret = -EINVAL;
 184         }
 185
 186         iounmap(usb_regs);
 187         of_node_put(np);
 188         return ret;
 189 }
 190 #endif /* CONFIG_PPC_MPC831x */
 191
 192 #ifdef CONFIG_PPC_MPC837x
 193 int mpc837x_usb_cfg(void)
 194 {
 195         void __iomem *immap;
 196         struct device_node *np = NULL;
 197         const void *prop;
 198         int ret = 0;
 199
 200         np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");
 201         if (!np)
 202                 return -ENODEV;
 203         prop = of_get_property(np, "phy_type", NULL);
 204
 205         if (!prop || (strcmp(prop, "ulpi") && strcmp(prop, "serial"))) {
 206                 printk(KERN_WARNING "837x USB PHY type not supported\n");
 207                 of_node_put(np);
 208                 return -EINVAL;
 209         }
 210
 211         /* Map IMMR space for pin and clock settings */
 212         immap = ioremap(get_immrbase(), 0x1000);
 213         if (!immap) {
 214                 of_node_put(np);
 215                 return -ENOMEM;
 216         }
 217
 218         /* Configure clock */
 219         clrsetbits_be32(immap + MPC83XX_SCCR_OFFS, MPC837X_SCCR_USB_DRCM_11,
 220                         MPC837X_SCCR_USB_DRCM_11);
 221
 222         /* Configure pin mux for ULPI/serial */
 223         clrsetbits_be32(immap + MPC83XX_SICRL_OFFS, MPC837X_SICRL_USB_MASK,
 224                         MPC837X_SICRL_USB_ULPI);
 225
 226         iounmap(immap);
 227         of_node_put(np);
 228         return ret;
 229 }
 230 #endif /* CONFIG_PPC_MPC837x */