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[linux/fpc-iii.git] / arch / um / include / sysdep-x86_64 / ptrace.h
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1 /*
2 * Copyright 2003 PathScale, Inc.
3 * Copyright (C) 2003 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
5 * Licensed under the GPL
6 */
8 #ifndef __SYSDEP_X86_64_PTRACE_H
9 #define __SYSDEP_X86_64_PTRACE_H
11 #include "uml-config.h"
12 #include "user_constants.h"
13 #include "sysdep/faultinfo.h"
15 #define MAX_REG_OFFSET (UM_FRAME_SIZE)
16 #define MAX_REG_NR ((MAX_REG_OFFSET) / sizeof(unsigned long))
18 #include "skas_ptregs.h"
20 #define REGS_IP(r) ((r)[HOST_IP])
21 #define REGS_SP(r) ((r)[HOST_SP])
23 #define REGS_RBX(r) ((r)[HOST_RBX])
24 #define REGS_RCX(r) ((r)[HOST_RCX])
25 #define REGS_RDX(r) ((r)[HOST_RDX])
26 #define REGS_RSI(r) ((r)[HOST_RSI])
27 #define REGS_RDI(r) ((r)[HOST_RDI])
28 #define REGS_RBP(r) ((r)[HOST_RBP])
29 #define REGS_RAX(r) ((r)[HOST_RAX])
30 #define REGS_R8(r) ((r)[HOST_R8])
31 #define REGS_R9(r) ((r)[HOST_R9])
32 #define REGS_R10(r) ((r)[HOST_R10])
33 #define REGS_R11(r) ((r)[HOST_R11])
34 #define REGS_R12(r) ((r)[HOST_R12])
35 #define REGS_R13(r) ((r)[HOST_R13])
36 #define REGS_R14(r) ((r)[HOST_R14])
37 #define REGS_R15(r) ((r)[HOST_R15])
38 #define REGS_CS(r) ((r)[HOST_CS])
39 #define REGS_EFLAGS(r) ((r)[HOST_EFLAGS])
40 #define REGS_SS(r) ((r)[HOST_SS])
42 #define HOST_FS_BASE 21
43 #define HOST_GS_BASE 22
44 #define HOST_DS 23
45 #define HOST_ES 24
46 #define HOST_FS 25
47 #define HOST_GS 26
49 /* Also defined in asm/ptrace-x86_64.h, but not in libc headers. So, these
50 * are already defined for kernel code, but not for userspace code.
52 #ifndef FS_BASE
53 /* These aren't defined in ptrace.h, but exist in struct user_regs_struct,
54 * which is what x86_64 ptrace actually uses.
56 #define FS_BASE (HOST_FS_BASE * sizeof(long))
57 #define GS_BASE (HOST_GS_BASE * sizeof(long))
58 #define DS (HOST_DS * sizeof(long))
59 #define ES (HOST_ES * sizeof(long))
60 #define FS (HOST_FS * sizeof(long))
61 #define GS (HOST_GS * sizeof(long))
62 #endif
64 #define REGS_FS_BASE(r) ((r)[HOST_FS_BASE])
65 #define REGS_GS_BASE(r) ((r)[HOST_GS_BASE])
66 #define REGS_DS(r) ((r)[HOST_DS])
67 #define REGS_ES(r) ((r)[HOST_ES])
68 #define REGS_FS(r) ((r)[HOST_FS])
69 #define REGS_GS(r) ((r)[HOST_GS])
71 #define REGS_ORIG_RAX(r) ((r)[HOST_ORIG_RAX])
73 #define REGS_SET_SYSCALL_RETURN(r, res) REGS_RAX(r) = (res)
75 #define REGS_RESTART_SYSCALL(r) IP_RESTART_SYSCALL(REGS_IP(r))
77 #define REGS_SEGV_IS_FIXABLE(r) SEGV_IS_FIXABLE((r)->trap_type)
79 #define REGS_FAULT_ADDR(r) ((r)->fault_addr)
81 #define REGS_FAULT_WRITE(r) FAULT_WRITE((r)->fault_type)
83 #define REGS_TRAP(r) ((r)->trap_type)
85 #define REGS_ERR(r) ((r)->fault_type)
87 struct uml_pt_regs {
88 unsigned long gp[MAX_REG_NR];
89 struct faultinfo faultinfo;
90 long syscall;
91 int is_user;
94 #define EMPTY_UML_PT_REGS { }
96 #define UPT_RBX(r) REGS_RBX((r)->gp)
97 #define UPT_RCX(r) REGS_RCX((r)->gp)
98 #define UPT_RDX(r) REGS_RDX((r)->gp)
99 #define UPT_RSI(r) REGS_RSI((r)->gp)
100 #define UPT_RDI(r) REGS_RDI((r)->gp)
101 #define UPT_RBP(r) REGS_RBP((r)->gp)
102 #define UPT_RAX(r) REGS_RAX((r)->gp)
103 #define UPT_R8(r) REGS_R8((r)->gp)
104 #define UPT_R9(r) REGS_R9((r)->gp)
105 #define UPT_R10(r) REGS_R10((r)->gp)
106 #define UPT_R11(r) REGS_R11((r)->gp)
107 #define UPT_R12(r) REGS_R12((r)->gp)
108 #define UPT_R13(r) REGS_R13((r)->gp)
109 #define UPT_R14(r) REGS_R14((r)->gp)
110 #define UPT_R15(r) REGS_R15((r)->gp)
111 #define UPT_CS(r) REGS_CS((r)->gp)
112 #define UPT_FS_BASE(r) REGS_FS_BASE((r)->gp)
113 #define UPT_FS(r) REGS_FS((r)->gp)
114 #define UPT_GS_BASE(r) REGS_GS_BASE((r)->gp)
115 #define UPT_GS(r) REGS_GS((r)->gp)
116 #define UPT_DS(r) REGS_DS((r)->gp)
117 #define UPT_ES(r) REGS_ES((r)->gp)
118 #define UPT_CS(r) REGS_CS((r)->gp)
119 #define UPT_SS(r) REGS_SS((r)->gp)
120 #define UPT_ORIG_RAX(r) REGS_ORIG_RAX((r)->gp)
122 #define UPT_IP(r) REGS_IP((r)->gp)
123 #define UPT_SP(r) REGS_SP((r)->gp)
125 #define UPT_EFLAGS(r) REGS_EFLAGS((r)->gp)
126 #define UPT_SYSCALL_NR(r) ((r)->syscall)
127 #define UPT_SYSCALL_RET(r) UPT_RAX(r)
129 extern int user_context(unsigned long sp);
131 #define UPT_IS_USER(r) ((r)->is_user)
133 #define UPT_SYSCALL_ARG1(r) UPT_RDI(r)
134 #define UPT_SYSCALL_ARG2(r) UPT_RSI(r)
135 #define UPT_SYSCALL_ARG3(r) UPT_RDX(r)
136 #define UPT_SYSCALL_ARG4(r) UPT_R10(r)
137 #define UPT_SYSCALL_ARG5(r) UPT_R8(r)
138 #define UPT_SYSCALL_ARG6(r) UPT_R9(r)
140 struct syscall_args {
141 unsigned long args[6];
144 #define SYSCALL_ARGS(r) ((struct syscall_args) \
145 { .args = { UPT_SYSCALL_ARG1(r), \
146 UPT_SYSCALL_ARG2(r), \
147 UPT_SYSCALL_ARG3(r), \
148 UPT_SYSCALL_ARG4(r), \
149 UPT_SYSCALL_ARG5(r), \
150 UPT_SYSCALL_ARG6(r) } } )
152 #define UPT_REG(regs, reg) \
153 ({ unsigned long val; \
154 switch(reg){ \
155 case R8: val = UPT_R8(regs); break; \
156 case R9: val = UPT_R9(regs); break; \
157 case R10: val = UPT_R10(regs); break; \
158 case R11: val = UPT_R11(regs); break; \
159 case R12: val = UPT_R12(regs); break; \
160 case R13: val = UPT_R13(regs); break; \
161 case R14: val = UPT_R14(regs); break; \
162 case R15: val = UPT_R15(regs); break; \
163 case RIP: val = UPT_IP(regs); break; \
164 case RSP: val = UPT_SP(regs); break; \
165 case RAX: val = UPT_RAX(regs); break; \
166 case RBX: val = UPT_RBX(regs); break; \
167 case RCX: val = UPT_RCX(regs); break; \
168 case RDX: val = UPT_RDX(regs); break; \
169 case RSI: val = UPT_RSI(regs); break; \
170 case RDI: val = UPT_RDI(regs); break; \
171 case RBP: val = UPT_RBP(regs); break; \
172 case ORIG_RAX: val = UPT_ORIG_RAX(regs); break; \
173 case CS: val = UPT_CS(regs); break; \
174 case SS: val = UPT_SS(regs); break; \
175 case FS_BASE: val = UPT_FS_BASE(regs); break; \
176 case GS_BASE: val = UPT_GS_BASE(regs); break; \
177 case DS: val = UPT_DS(regs); break; \
178 case ES: val = UPT_ES(regs); break; \
179 case FS : val = UPT_FS (regs); break; \
180 case GS: val = UPT_GS(regs); break; \
181 case EFLAGS: val = UPT_EFLAGS(regs); break; \
182 default : \
183 panic("Bad register in UPT_REG : %d\n", reg); \
184 val = -1; \
186 val; \
190 #define UPT_SET(regs, reg, val) \
191 ({ unsigned long __upt_val = val; \
192 switch(reg){ \
193 case R8: UPT_R8(regs) = __upt_val; break; \
194 case R9: UPT_R9(regs) = __upt_val; break; \
195 case R10: UPT_R10(regs) = __upt_val; break; \
196 case R11: UPT_R11(regs) = __upt_val; break; \
197 case R12: UPT_R12(regs) = __upt_val; break; \
198 case R13: UPT_R13(regs) = __upt_val; break; \
199 case R14: UPT_R14(regs) = __upt_val; break; \
200 case R15: UPT_R15(regs) = __upt_val; break; \
201 case RIP: UPT_IP(regs) = __upt_val; break; \
202 case RSP: UPT_SP(regs) = __upt_val; break; \
203 case RAX: UPT_RAX(regs) = __upt_val; break; \
204 case RBX: UPT_RBX(regs) = __upt_val; break; \
205 case RCX: UPT_RCX(regs) = __upt_val; break; \
206 case RDX: UPT_RDX(regs) = __upt_val; break; \
207 case RSI: UPT_RSI(regs) = __upt_val; break; \
208 case RDI: UPT_RDI(regs) = __upt_val; break; \
209 case RBP: UPT_RBP(regs) = __upt_val; break; \
210 case ORIG_RAX: UPT_ORIG_RAX(regs) = __upt_val; break; \
211 case CS: UPT_CS(regs) = __upt_val; break; \
212 case SS: UPT_SS(regs) = __upt_val; break; \
213 case FS_BASE: UPT_FS_BASE(regs) = __upt_val; break; \
214 case GS_BASE: UPT_GS_BASE(regs) = __upt_val; break; \
215 case DS: UPT_DS(regs) = __upt_val; break; \
216 case ES: UPT_ES(regs) = __upt_val; break; \
217 case FS: UPT_FS(regs) = __upt_val; break; \
218 case GS: UPT_GS(regs) = __upt_val; break; \
219 case EFLAGS: UPT_EFLAGS(regs) = __upt_val; break; \
220 default : \
221 panic("Bad register in UPT_SET : %d\n", reg); \
222 break; \
224 __upt_val; \
227 #define UPT_SET_SYSCALL_RETURN(r, res) \
228 REGS_SET_SYSCALL_RETURN((r)->regs, (res))
230 #define UPT_RESTART_SYSCALL(r) REGS_RESTART_SYSCALL((r)->gp)
232 #define UPT_SEGV_IS_FIXABLE(r) REGS_SEGV_IS_FIXABLE(&r->skas)
234 #define UPT_FAULTINFO(r) (&(r)->faultinfo)
236 static inline void arch_init_registers(int pid)
240 #endif