include/asm-arm/arch-msm/msm_iomap.h

   1 /* linux/include/asm-arm/arch-msm/msm_iomap.h
   2  *
   3  * Copyright (C) 2007 Google, Inc.
   4  * Author: Brian Swetland <swetland@google.com>
   5  *
   6  * This software is licensed under the terms of the GNU General Public
   7  * License version 2, as published by the Free Software Foundation, and
   8  * may be copied, distributed, and modified under those terms.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  *
  16  * The MSM peripherals are spread all over across 768MB of physical
  17  * space, which makes just having a simple IO_ADDRESS macro to slide
  18  * them into the right virtual location rough.  Instead, we will
  19  * provide a master phys->virt mapping for peripherals here.
  20  *
  21  */
  22
  23 #ifndef __ASM_ARCH_MSM_IOMAP_H
  24 #define __ASM_ARCH_MSM_IOMAP_H
  25
  26 #include <asm/sizes.h>
  27
  28 /* Physical base address and size of peripherals.
  29  * Ordered by the virtual base addresses they will be mapped at.
  30  *
  31  * MSM_VIC_BASE must be an value that can be loaded via a "mov"
  32  * instruction, otherwise entry-macro.S will not compile.
  33  *
  34  * If you add or remove entries here, you'll want to edit the
  35  * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
  36  * changes.
  37  *
  38  */
  39
  40 #define MSM_VIC_BASE          0xE0000000
  41 #define MSM_VIC_PHYS          0xC0000000
  42 #define MSM_VIC_SIZE          SZ_4K
  43
  44 #define MSM_CSR_BASE          0xE0001000
  45 #define MSM_CSR_PHYS          0xC0100000
  46 #define MSM_CSR_SIZE          SZ_4K
  47
  48 #define MSM_GPT_PHYS          MSM_CSR_PHYS
  49 #define MSM_GPT_BASE          MSM_CSR_BASE
  50 #define MSM_GPT_SIZE          SZ_4K
  51
  52 #define MSM_DMOV_BASE         0xE0002000
  53 #define MSM_DMOV_PHYS         0xA9700000
  54 #define MSM_DMOV_SIZE         SZ_4K
  55
  56 #define MSM_UART1_BASE        0xE0003000
  57 #define MSM_UART1_PHYS        0xA9A00000
  58 #define MSM_UART1_SIZE        SZ_4K
  59
  60 #define MSM_UART2_BASE        0xE0004000
  61 #define MSM_UART2_PHYS        0xA9B00000
  62 #define MSM_UART2_SIZE        SZ_4K
  63
  64 #define MSM_UART3_BASE        0xE0005000
  65 #define MSM_UART3_PHYS        0xA9C00000
  66 #define MSM_UART3_SIZE        SZ_4K
  67
  68 #define MSM_I2C_BASE          0xE0006000
  69 #define MSM_I2C_PHYS          0xA9900000
  70 #define MSM_I2C_SIZE          SZ_4K
  71
  72 #define MSM_GPIO1_BASE        0xE0007000
  73 #define MSM_GPIO1_PHYS        0xA9200000
  74 #define MSM_GPIO1_SIZE        SZ_4K
  75
  76 #define MSM_GPIO2_BASE        0xE0008000
  77 #define MSM_GPIO2_PHYS        0xA9300000
  78 #define MSM_GPIO2_SIZE        SZ_4K
  79
  80 #define MSM_HSUSB_BASE        0xE0009000
  81 #define MSM_HSUSB_PHYS        0xA0800000
  82 #define MSM_HSUSB_SIZE        SZ_4K
  83
  84 #define MSM_CLK_CTL_BASE      0xE000A000
  85 #define MSM_CLK_CTL_PHYS      0xA8600000
  86 #define MSM_CLK_CTL_SIZE      SZ_4K
  87
  88 #define MSM_PMDH_BASE         0xE000B000
  89 #define MSM_PMDH_PHYS         0xAA600000
  90 #define MSM_PMDH_SIZE         SZ_4K
  91
  92 #define MSM_EMDH_BASE         0xE000C000
  93 #define MSM_EMDH_PHYS         0xAA700000
  94 #define MSM_EMDH_SIZE         SZ_4K
  95
  96 #define MSM_MDP_BASE          0xE0010000
  97 #define MSM_MDP_PHYS          0xAA200000
  98 #define MSM_MDP_SIZE          0x000F0000
  99
 100 #define MSM_SHARED_RAM_BASE   0xE0100000
 101 #define MSM_SHARED_RAM_PHYS   0x01F00000
 102 #define MSM_SHARED_RAM_SIZE   SZ_1M
 103
 104 #endif