Linux 2.6.25.3
[linux/fpc-iii.git] / sound / isa / cs423x / cs4231_lib.c
blob0aa8649e5c7f897b1c5fb283b69dcd5df5f56cfc
1 /*
2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3 * Routines for control of CS4231(A)/CS4232/InterWave & compatible chips
5 * Bugs:
6 * - sometimes record brokes playback with WSS portion of
7 * Yamaha OPL3-SA3 chip
8 * - CS4231 (GUS MAX) - still trouble with occasional noises
9 * - broken initialization?
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 #include <linux/delay.h>
28 #include <linux/pm.h>
29 #include <linux/init.h>
30 #include <linux/interrupt.h>
31 #include <linux/slab.h>
32 #include <linux/ioport.h>
33 #include <sound/core.h>
34 #include <sound/cs4231.h>
35 #include <sound/pcm_params.h>
37 #include <asm/io.h>
38 #include <asm/dma.h>
39 #include <asm/irq.h>
41 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
42 MODULE_DESCRIPTION("Routines for control of CS4231(A)/CS4232/InterWave & compatible chips");
43 MODULE_LICENSE("GPL");
45 #if 0
46 #define SNDRV_DEBUG_MCE
47 #endif
50 * Some variables
53 static unsigned char freq_bits[14] = {
54 /* 5510 */ 0x00 | CS4231_XTAL2,
55 /* 6620 */ 0x0E | CS4231_XTAL2,
56 /* 8000 */ 0x00 | CS4231_XTAL1,
57 /* 9600 */ 0x0E | CS4231_XTAL1,
58 /* 11025 */ 0x02 | CS4231_XTAL2,
59 /* 16000 */ 0x02 | CS4231_XTAL1,
60 /* 18900 */ 0x04 | CS4231_XTAL2,
61 /* 22050 */ 0x06 | CS4231_XTAL2,
62 /* 27042 */ 0x04 | CS4231_XTAL1,
63 /* 32000 */ 0x06 | CS4231_XTAL1,
64 /* 33075 */ 0x0C | CS4231_XTAL2,
65 /* 37800 */ 0x08 | CS4231_XTAL2,
66 /* 44100 */ 0x0A | CS4231_XTAL2,
67 /* 48000 */ 0x0C | CS4231_XTAL1
70 static unsigned int rates[14] = {
71 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
72 27042, 32000, 33075, 37800, 44100, 48000
75 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
76 .count = ARRAY_SIZE(rates),
77 .list = rates,
78 .mask = 0,
81 static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
83 return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
86 static unsigned char snd_cs4231_original_image[32] =
88 0x00, /* 00/00 - lic */
89 0x00, /* 01/01 - ric */
90 0x9f, /* 02/02 - la1ic */
91 0x9f, /* 03/03 - ra1ic */
92 0x9f, /* 04/04 - la2ic */
93 0x9f, /* 05/05 - ra2ic */
94 0xbf, /* 06/06 - loc */
95 0xbf, /* 07/07 - roc */
96 0x20, /* 08/08 - pdfr */
97 CS4231_AUTOCALIB, /* 09/09 - ic */
98 0x00, /* 0a/10 - pc */
99 0x00, /* 0b/11 - ti */
100 CS4231_MODE2, /* 0c/12 - mi */
101 0xfc, /* 0d/13 - lbc */
102 0x00, /* 0e/14 - pbru */
103 0x00, /* 0f/15 - pbrl */
104 0x80, /* 10/16 - afei */
105 0x01, /* 11/17 - afeii */
106 0x9f, /* 12/18 - llic */
107 0x9f, /* 13/19 - rlic */
108 0x00, /* 14/20 - tlb */
109 0x00, /* 15/21 - thb */
110 0x00, /* 16/22 - la3mic/reserved */
111 0x00, /* 17/23 - ra3mic/reserved */
112 0x00, /* 18/24 - afs */
113 0x00, /* 19/25 - lamoc/version */
114 0xcf, /* 1a/26 - mioc */
115 0x00, /* 1b/27 - ramoc/reserved */
116 0x20, /* 1c/28 - cdfr */
117 0x00, /* 1d/29 - res4 */
118 0x00, /* 1e/30 - cbru */
119 0x00, /* 1f/31 - cbrl */
123 * Basic I/O functions
126 static inline void cs4231_outb(struct snd_cs4231 *chip, u8 offset, u8 val)
128 outb(val, chip->port + offset);
131 static inline u8 cs4231_inb(struct snd_cs4231 *chip, u8 offset)
133 return inb(chip->port + offset);
136 static void snd_cs4231_wait(struct snd_cs4231 *chip)
138 int timeout;
140 for (timeout = 250;
141 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
142 timeout--)
143 udelay(100);
146 static void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
147 unsigned char mask, unsigned char value)
149 unsigned char tmp = (chip->image[reg] & mask) | value;
151 snd_cs4231_wait(chip);
152 #ifdef CONFIG_SND_DEBUG
153 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
154 snd_printk("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
155 #endif
156 chip->image[reg] = tmp;
157 if (!chip->calibrate_mute) {
158 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
159 wmb();
160 cs4231_outb(chip, CS4231P(REG), tmp);
161 mb();
165 static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg, unsigned char value)
167 int timeout;
169 for (timeout = 250;
170 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
171 timeout--)
172 udelay(10);
173 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
174 cs4231_outb(chip, CS4231P(REG), value);
175 mb();
178 void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, unsigned char value)
180 snd_cs4231_wait(chip);
181 #ifdef CONFIG_SND_DEBUG
182 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
183 snd_printk("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
184 #endif
185 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
186 cs4231_outb(chip, CS4231P(REG), value);
187 chip->image[reg] = value;
188 mb();
189 snd_printdd("codec out - reg 0x%x = 0x%x\n",
190 chip->mce_bit | reg, value);
193 unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
195 snd_cs4231_wait(chip);
196 #ifdef CONFIG_SND_DEBUG
197 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
198 snd_printk("in: auto calibration time out - reg = 0x%x\n", reg);
199 #endif
200 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
201 mb();
202 return cs4231_inb(chip, CS4231P(REG));
205 void snd_cs4236_ext_out(struct snd_cs4231 *chip, unsigned char reg, unsigned char val)
207 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
208 cs4231_outb(chip, CS4231P(REG), reg | (chip->image[CS4236_EXT_REG] & 0x01));
209 cs4231_outb(chip, CS4231P(REG), val);
210 chip->eimage[CS4236_REG(reg)] = val;
211 #if 0
212 printk("ext out : reg = 0x%x, val = 0x%x\n", reg, val);
213 #endif
216 unsigned char snd_cs4236_ext_in(struct snd_cs4231 *chip, unsigned char reg)
218 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
219 cs4231_outb(chip, CS4231P(REG), reg | (chip->image[CS4236_EXT_REG] & 0x01));
220 #if 1
221 return cs4231_inb(chip, CS4231P(REG));
222 #else
224 unsigned char res;
225 res = cs4231_inb(chip, CS4231P(REG));
226 printk("ext in : reg = 0x%x, val = 0x%x\n", reg, res);
227 return res;
229 #endif
232 #if 0
234 static void snd_cs4231_debug(struct snd_cs4231 *chip)
236 printk("CS4231 REGS: INDEX = 0x%02x ", cs4231_inb(chip, CS4231P(REGSEL)));
237 printk(" STATUS = 0x%02x\n", cs4231_inb(chip, CS4231P(STATUS)));
238 printk(" 0x00: left input = 0x%02x ", snd_cs4231_in(chip, 0x00));
239 printk(" 0x10: alt 1 (CFIG 2) = 0x%02x\n", snd_cs4231_in(chip, 0x10));
240 printk(" 0x01: right input = 0x%02x ", snd_cs4231_in(chip, 0x01));
241 printk(" 0x11: alt 2 (CFIG 3) = 0x%02x\n", snd_cs4231_in(chip, 0x11));
242 printk(" 0x02: GF1 left input = 0x%02x ", snd_cs4231_in(chip, 0x02));
243 printk(" 0x12: left line in = 0x%02x\n", snd_cs4231_in(chip, 0x12));
244 printk(" 0x03: GF1 right input = 0x%02x ", snd_cs4231_in(chip, 0x03));
245 printk(" 0x13: right line in = 0x%02x\n", snd_cs4231_in(chip, 0x13));
246 printk(" 0x04: CD left input = 0x%02x ", snd_cs4231_in(chip, 0x04));
247 printk(" 0x14: timer low = 0x%02x\n", snd_cs4231_in(chip, 0x14));
248 printk(" 0x05: CD right input = 0x%02x ", snd_cs4231_in(chip, 0x05));
249 printk(" 0x15: timer high = 0x%02x\n", snd_cs4231_in(chip, 0x15));
250 printk(" 0x06: left output = 0x%02x ", snd_cs4231_in(chip, 0x06));
251 printk(" 0x16: left MIC (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x16));
252 printk(" 0x07: right output = 0x%02x ", snd_cs4231_in(chip, 0x07));
253 printk(" 0x17: right MIC (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x17));
254 printk(" 0x08: playback format = 0x%02x ", snd_cs4231_in(chip, 0x08));
255 printk(" 0x18: IRQ status = 0x%02x\n", snd_cs4231_in(chip, 0x18));
256 printk(" 0x09: iface (CFIG 1) = 0x%02x ", snd_cs4231_in(chip, 0x09));
257 printk(" 0x19: left line out = 0x%02x\n", snd_cs4231_in(chip, 0x19));
258 printk(" 0x0a: pin control = 0x%02x ", snd_cs4231_in(chip, 0x0a));
259 printk(" 0x1a: mono control = 0x%02x\n", snd_cs4231_in(chip, 0x1a));
260 printk(" 0x0b: init & status = 0x%02x ", snd_cs4231_in(chip, 0x0b));
261 printk(" 0x1b: right line out = 0x%02x\n", snd_cs4231_in(chip, 0x1b));
262 printk(" 0x0c: revision & mode = 0x%02x ", snd_cs4231_in(chip, 0x0c));
263 printk(" 0x1c: record format = 0x%02x\n", snd_cs4231_in(chip, 0x1c));
264 printk(" 0x0d: loopback = 0x%02x ", snd_cs4231_in(chip, 0x0d));
265 printk(" 0x1d: var freq (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x1d));
266 printk(" 0x0e: ply upr count = 0x%02x ", snd_cs4231_in(chip, 0x0e));
267 printk(" 0x1e: ply lwr count = 0x%02x\n", snd_cs4231_in(chip, 0x1e));
268 printk(" 0x0f: rec upr count = 0x%02x ", snd_cs4231_in(chip, 0x0f));
269 printk(" 0x1f: rec lwr count = 0x%02x\n", snd_cs4231_in(chip, 0x1f));
272 #endif
275 * CS4231 detection / MCE routines
278 static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
280 int timeout;
282 /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
283 for (timeout = 5; timeout > 0; timeout--)
284 cs4231_inb(chip, CS4231P(REGSEL));
285 /* end of cleanup sequence */
286 for (timeout = 250;
287 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
288 timeout--)
289 udelay(10);
292 void snd_cs4231_mce_up(struct snd_cs4231 *chip)
294 unsigned long flags;
295 int timeout;
297 snd_cs4231_wait(chip);
298 #ifdef CONFIG_SND_DEBUG
299 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
300 snd_printk("mce_up - auto calibration time out (0)\n");
301 #endif
302 spin_lock_irqsave(&chip->reg_lock, flags);
303 chip->mce_bit |= CS4231_MCE;
304 timeout = cs4231_inb(chip, CS4231P(REGSEL));
305 if (timeout == 0x80)
306 snd_printk("mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
307 if (!(timeout & CS4231_MCE))
308 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
309 spin_unlock_irqrestore(&chip->reg_lock, flags);
312 void snd_cs4231_mce_down(struct snd_cs4231 *chip)
314 unsigned long flags;
315 unsigned long end_time;
316 int timeout;
318 snd_cs4231_busy_wait(chip);
320 #ifdef CONFIG_SND_DEBUG
321 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
322 snd_printk("mce_down [0x%lx] - auto calibration time out (0)\n", (long)CS4231P(REGSEL));
323 #endif
324 spin_lock_irqsave(&chip->reg_lock, flags);
325 chip->mce_bit &= ~CS4231_MCE;
326 timeout = cs4231_inb(chip, CS4231P(REGSEL));
327 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
328 spin_unlock_irqrestore(&chip->reg_lock, flags);
329 if (timeout == 0x80)
330 snd_printk("mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
331 if ((timeout & CS4231_MCE) == 0 ||
332 !(chip->hardware & (CS4231_HW_CS4231_MASK | CS4231_HW_CS4232_MASK))) {
333 return;
337 * Wait for (possible -- during init auto-calibration may not be set)
338 * calibration process to start. Needs upto 5 sample periods on AD1848
339 * which at the slowest possible rate of 5.5125 kHz means 907 us.
341 msleep(1);
343 snd_printdd("(1) jiffies = %lu\n", jiffies);
345 /* check condition up to 250 ms */
346 end_time = jiffies + msecs_to_jiffies(250);
347 while (snd_cs4231_in(chip, CS4231_TEST_INIT) &
348 CS4231_CALIB_IN_PROGRESS) {
350 if (time_after(jiffies, end_time)) {
351 snd_printk(KERN_ERR "mce_down - "
352 "auto calibration time out (2)\n");
353 return;
355 msleep(1);
358 snd_printdd("(2) jiffies = %lu\n", jiffies);
360 /* check condition up to 100 ms */
361 end_time = jiffies + msecs_to_jiffies(100);
362 while (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {
363 if (time_after(jiffies, end_time)) {
364 snd_printk(KERN_ERR "mce_down - auto calibration time out (3)\n");
365 return;
367 msleep(1);
370 snd_printdd("(3) jiffies = %lu\n", jiffies);
371 snd_printd("mce_down - exit = 0x%x\n", cs4231_inb(chip, CS4231P(REGSEL)));
374 static unsigned int snd_cs4231_get_count(unsigned char format, unsigned int size)
376 switch (format & 0xe0) {
377 case CS4231_LINEAR_16:
378 case CS4231_LINEAR_16_BIG:
379 size >>= 1;
380 break;
381 case CS4231_ADPCM_16:
382 return size >> 2;
384 if (format & CS4231_STEREO)
385 size >>= 1;
386 return size;
389 static int snd_cs4231_trigger(struct snd_pcm_substream *substream,
390 int cmd)
392 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
393 int result = 0;
394 unsigned int what;
395 struct snd_pcm_substream *s;
396 int do_start;
398 #if 0
399 printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, cs4231_inb(chip, CS4231P(STATUS)));
400 #endif
402 switch (cmd) {
403 case SNDRV_PCM_TRIGGER_START:
404 case SNDRV_PCM_TRIGGER_RESUME:
405 do_start = 1; break;
406 case SNDRV_PCM_TRIGGER_STOP:
407 case SNDRV_PCM_TRIGGER_SUSPEND:
408 do_start = 0; break;
409 default:
410 return -EINVAL;
413 what = 0;
414 snd_pcm_group_for_each_entry(s, substream) {
415 if (s == chip->playback_substream) {
416 what |= CS4231_PLAYBACK_ENABLE;
417 snd_pcm_trigger_done(s, substream);
418 } else if (s == chip->capture_substream) {
419 what |= CS4231_RECORD_ENABLE;
420 snd_pcm_trigger_done(s, substream);
423 spin_lock(&chip->reg_lock);
424 if (do_start) {
425 chip->image[CS4231_IFACE_CTRL] |= what;
426 if (chip->trigger)
427 chip->trigger(chip, what, 1);
428 } else {
429 chip->image[CS4231_IFACE_CTRL] &= ~what;
430 if (chip->trigger)
431 chip->trigger(chip, what, 0);
433 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
434 spin_unlock(&chip->reg_lock);
435 #if 0
436 snd_cs4231_debug(chip);
437 #endif
438 return result;
442 * CODEC I/O
445 static unsigned char snd_cs4231_get_rate(unsigned int rate)
447 int i;
449 for (i = 0; i < ARRAY_SIZE(rates); i++)
450 if (rate == rates[i])
451 return freq_bits[i];
452 // snd_BUG();
453 return freq_bits[ARRAY_SIZE(rates) - 1];
456 static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip,
457 int format,
458 int channels)
460 unsigned char rformat;
462 rformat = CS4231_LINEAR_8;
463 switch (format) {
464 case SNDRV_PCM_FORMAT_MU_LAW: rformat = CS4231_ULAW_8; break;
465 case SNDRV_PCM_FORMAT_A_LAW: rformat = CS4231_ALAW_8; break;
466 case SNDRV_PCM_FORMAT_S16_LE: rformat = CS4231_LINEAR_16; break;
467 case SNDRV_PCM_FORMAT_S16_BE: rformat = CS4231_LINEAR_16_BIG; break;
468 case SNDRV_PCM_FORMAT_IMA_ADPCM: rformat = CS4231_ADPCM_16; break;
470 if (channels > 1)
471 rformat |= CS4231_STEREO;
472 #if 0
473 snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
474 #endif
475 return rformat;
478 static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
480 unsigned long flags;
482 mute = mute ? 1 : 0;
483 spin_lock_irqsave(&chip->reg_lock, flags);
484 if (chip->calibrate_mute == mute) {
485 spin_unlock_irqrestore(&chip->reg_lock, flags);
486 return;
488 if (!mute) {
489 snd_cs4231_dout(chip, CS4231_LEFT_INPUT, chip->image[CS4231_LEFT_INPUT]);
490 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT, chip->image[CS4231_RIGHT_INPUT]);
491 snd_cs4231_dout(chip, CS4231_LOOPBACK, chip->image[CS4231_LOOPBACK]);
493 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
494 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
495 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
496 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
497 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
498 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT, mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
499 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN, mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
500 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN, mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
501 snd_cs4231_dout(chip, CS4231_MONO_CTRL, mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
502 if (chip->hardware == CS4231_HW_INTERWAVE) {
503 snd_cs4231_dout(chip, CS4231_LEFT_MIC_INPUT, mute ? 0x80 : chip->image[CS4231_LEFT_MIC_INPUT]);
504 snd_cs4231_dout(chip, CS4231_RIGHT_MIC_INPUT, mute ? 0x80 : chip->image[CS4231_RIGHT_MIC_INPUT]);
505 snd_cs4231_dout(chip, CS4231_LINE_LEFT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LINE_LEFT_OUTPUT]);
506 snd_cs4231_dout(chip, CS4231_LINE_RIGHT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LINE_RIGHT_OUTPUT]);
508 chip->calibrate_mute = mute;
509 spin_unlock_irqrestore(&chip->reg_lock, flags);
512 static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
513 struct snd_pcm_hw_params *params,
514 unsigned char pdfr)
516 unsigned long flags;
517 int full_calib = 1;
519 mutex_lock(&chip->mce_mutex);
520 snd_cs4231_calibrate_mute(chip, 1);
521 if (chip->hardware == CS4231_HW_CS4231A ||
522 (chip->hardware & CS4231_HW_CS4232_MASK)) {
523 spin_lock_irqsave(&chip->reg_lock, flags);
524 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (pdfr & 0x0f)) { /* rate is same? */
525 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | 0x10);
526 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT] = pdfr);
527 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~0x10);
528 udelay(100); /* Fixes audible clicks at least on GUS MAX */
529 full_calib = 0;
531 spin_unlock_irqrestore(&chip->reg_lock, flags);
533 if (full_calib) {
534 snd_cs4231_mce_up(chip);
535 spin_lock_irqsave(&chip->reg_lock, flags);
536 if (chip->hardware != CS4231_HW_INTERWAVE && !chip->single_dma) {
537 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
538 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
539 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
540 pdfr);
541 } else {
542 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT] = pdfr);
544 spin_unlock_irqrestore(&chip->reg_lock, flags);
545 if (chip->hardware == CS4231_HW_OPL3SA2)
546 udelay(100); /* this seems to help */
547 snd_cs4231_mce_down(chip);
549 snd_cs4231_calibrate_mute(chip, 0);
550 mutex_unlock(&chip->mce_mutex);
553 static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
554 struct snd_pcm_hw_params *params,
555 unsigned char cdfr)
557 unsigned long flags;
558 int full_calib = 1;
560 mutex_lock(&chip->mce_mutex);
561 snd_cs4231_calibrate_mute(chip, 1);
562 if (chip->hardware == CS4231_HW_CS4231A ||
563 (chip->hardware & CS4231_HW_CS4232_MASK)) {
564 spin_lock_irqsave(&chip->reg_lock, flags);
565 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (cdfr & 0x0f) || /* rate is same? */
566 (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
567 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | 0x20);
568 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT] = cdfr);
569 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~0x20);
570 full_calib = 0;
572 spin_unlock_irqrestore(&chip->reg_lock, flags);
574 if (full_calib) {
575 snd_cs4231_mce_up(chip);
576 spin_lock_irqsave(&chip->reg_lock, flags);
577 if (chip->hardware != CS4231_HW_INTERWAVE) {
578 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
579 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
580 ((chip->single_dma ? cdfr : chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
581 (cdfr & 0x0f));
582 spin_unlock_irqrestore(&chip->reg_lock, flags);
583 snd_cs4231_mce_down(chip);
584 snd_cs4231_mce_up(chip);
585 spin_lock_irqsave(&chip->reg_lock, flags);
588 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
589 spin_unlock_irqrestore(&chip->reg_lock, flags);
590 snd_cs4231_mce_down(chip);
592 snd_cs4231_calibrate_mute(chip, 0);
593 mutex_unlock(&chip->mce_mutex);
597 * Timer interface
600 static unsigned long snd_cs4231_timer_resolution(struct snd_timer * timer)
602 struct snd_cs4231 *chip = snd_timer_chip(timer);
603 if (chip->hardware & CS4231_HW_CS4236B_MASK)
604 return 14467;
605 else
606 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
609 static int snd_cs4231_timer_start(struct snd_timer * timer)
611 unsigned long flags;
612 unsigned int ticks;
613 struct snd_cs4231 *chip = snd_timer_chip(timer);
614 spin_lock_irqsave(&chip->reg_lock, flags);
615 ticks = timer->sticks;
616 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
617 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
618 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
619 snd_cs4231_out(chip, CS4231_TIMER_HIGH, chip->image[CS4231_TIMER_HIGH] = (unsigned char) (ticks >> 8));
620 snd_cs4231_out(chip, CS4231_TIMER_LOW, chip->image[CS4231_TIMER_LOW] = (unsigned char) ticks);
621 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | CS4231_TIMER_ENABLE);
623 spin_unlock_irqrestore(&chip->reg_lock, flags);
624 return 0;
627 static int snd_cs4231_timer_stop(struct snd_timer * timer)
629 unsigned long flags;
630 struct snd_cs4231 *chip = snd_timer_chip(timer);
631 spin_lock_irqsave(&chip->reg_lock, flags);
632 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE);
633 spin_unlock_irqrestore(&chip->reg_lock, flags);
634 return 0;
637 static void snd_cs4231_init(struct snd_cs4231 *chip)
639 unsigned long flags;
641 snd_cs4231_mce_down(chip);
643 #ifdef SNDRV_DEBUG_MCE
644 snd_printk("init: (1)\n");
645 #endif
646 snd_cs4231_mce_up(chip);
647 spin_lock_irqsave(&chip->reg_lock, flags);
648 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
649 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO |
650 CS4231_CALIB_MODE);
651 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
652 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
653 spin_unlock_irqrestore(&chip->reg_lock, flags);
654 snd_cs4231_mce_down(chip);
656 #ifdef SNDRV_DEBUG_MCE
657 snd_printk("init: (2)\n");
658 #endif
660 snd_cs4231_mce_up(chip);
661 spin_lock_irqsave(&chip->reg_lock, flags);
662 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
663 spin_unlock_irqrestore(&chip->reg_lock, flags);
664 snd_cs4231_mce_down(chip);
666 #ifdef SNDRV_DEBUG_MCE
667 snd_printk("init: (3) - afei = 0x%x\n", chip->image[CS4231_ALT_FEATURE_1]);
668 #endif
670 spin_lock_irqsave(&chip->reg_lock, flags);
671 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, chip->image[CS4231_ALT_FEATURE_2]);
672 spin_unlock_irqrestore(&chip->reg_lock, flags);
674 snd_cs4231_mce_up(chip);
675 spin_lock_irqsave(&chip->reg_lock, flags);
676 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT]);
677 spin_unlock_irqrestore(&chip->reg_lock, flags);
678 snd_cs4231_mce_down(chip);
680 #ifdef SNDRV_DEBUG_MCE
681 snd_printk("init: (4)\n");
682 #endif
684 snd_cs4231_mce_up(chip);
685 spin_lock_irqsave(&chip->reg_lock, flags);
686 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
687 spin_unlock_irqrestore(&chip->reg_lock, flags);
688 snd_cs4231_mce_down(chip);
690 #ifdef SNDRV_DEBUG_MCE
691 snd_printk("init: (5)\n");
692 #endif
695 static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
697 unsigned long flags;
699 mutex_lock(&chip->open_mutex);
700 if ((chip->mode & mode) ||
701 ((chip->mode & CS4231_MODE_OPEN) && chip->single_dma)) {
702 mutex_unlock(&chip->open_mutex);
703 return -EAGAIN;
705 if (chip->mode & CS4231_MODE_OPEN) {
706 chip->mode |= mode;
707 mutex_unlock(&chip->open_mutex);
708 return 0;
710 /* ok. now enable and ack CODEC IRQ */
711 spin_lock_irqsave(&chip->reg_lock, flags);
712 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
713 CS4231_RECORD_IRQ |
714 CS4231_TIMER_IRQ);
715 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
716 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
717 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
718 chip->image[CS4231_PIN_CTRL] |= CS4231_IRQ_ENABLE;
719 snd_cs4231_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
720 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
721 CS4231_RECORD_IRQ |
722 CS4231_TIMER_IRQ);
723 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
724 spin_unlock_irqrestore(&chip->reg_lock, flags);
726 chip->mode = mode;
727 mutex_unlock(&chip->open_mutex);
728 return 0;
731 static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
733 unsigned long flags;
735 mutex_lock(&chip->open_mutex);
736 chip->mode &= ~mode;
737 if (chip->mode & CS4231_MODE_OPEN) {
738 mutex_unlock(&chip->open_mutex);
739 return;
741 snd_cs4231_calibrate_mute(chip, 1);
743 /* disable IRQ */
744 spin_lock_irqsave(&chip->reg_lock, flags);
745 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
746 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
747 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
748 chip->image[CS4231_PIN_CTRL] &= ~CS4231_IRQ_ENABLE;
749 snd_cs4231_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
751 /* now disable record & playback */
753 if (chip->image[CS4231_IFACE_CTRL] & (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
754 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
755 spin_unlock_irqrestore(&chip->reg_lock, flags);
756 snd_cs4231_mce_up(chip);
757 spin_lock_irqsave(&chip->reg_lock, flags);
758 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
759 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
760 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
761 spin_unlock_irqrestore(&chip->reg_lock, flags);
762 snd_cs4231_mce_down(chip);
763 spin_lock_irqsave(&chip->reg_lock, flags);
766 /* clear IRQ again */
767 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
768 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
769 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
770 spin_unlock_irqrestore(&chip->reg_lock, flags);
772 snd_cs4231_calibrate_mute(chip, 0);
774 chip->mode = 0;
775 mutex_unlock(&chip->open_mutex);
779 * timer open/close
782 static int snd_cs4231_timer_open(struct snd_timer * timer)
784 struct snd_cs4231 *chip = snd_timer_chip(timer);
785 snd_cs4231_open(chip, CS4231_MODE_TIMER);
786 return 0;
789 static int snd_cs4231_timer_close(struct snd_timer * timer)
791 struct snd_cs4231 *chip = snd_timer_chip(timer);
792 snd_cs4231_close(chip, CS4231_MODE_TIMER);
793 return 0;
796 static struct snd_timer_hardware snd_cs4231_timer_table =
798 .flags = SNDRV_TIMER_HW_AUTO,
799 .resolution = 9945,
800 .ticks = 65535,
801 .open = snd_cs4231_timer_open,
802 .close = snd_cs4231_timer_close,
803 .c_resolution = snd_cs4231_timer_resolution,
804 .start = snd_cs4231_timer_start,
805 .stop = snd_cs4231_timer_stop,
809 * ok.. exported functions..
812 static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
813 struct snd_pcm_hw_params *hw_params)
815 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
816 unsigned char new_pdfr;
817 int err;
819 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
820 return err;
821 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params), params_channels(hw_params)) |
822 snd_cs4231_get_rate(params_rate(hw_params));
823 chip->set_playback_format(chip, hw_params, new_pdfr);
824 return 0;
827 static int snd_cs4231_playback_hw_free(struct snd_pcm_substream *substream)
829 return snd_pcm_lib_free_pages(substream);
832 static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
834 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
835 struct snd_pcm_runtime *runtime = substream->runtime;
836 unsigned long flags;
837 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
838 unsigned int count = snd_pcm_lib_period_bytes(substream);
840 spin_lock_irqsave(&chip->reg_lock, flags);
841 chip->p_dma_size = size;
842 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO);
843 snd_dma_program(chip->dma1, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
844 count = snd_cs4231_get_count(chip->image[CS4231_PLAYBK_FORMAT], count) - 1;
845 snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
846 snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
847 spin_unlock_irqrestore(&chip->reg_lock, flags);
848 #if 0
849 snd_cs4231_debug(chip);
850 #endif
851 return 0;
854 static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
855 struct snd_pcm_hw_params *hw_params)
857 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
858 unsigned char new_cdfr;
859 int err;
861 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
862 return err;
863 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params), params_channels(hw_params)) |
864 snd_cs4231_get_rate(params_rate(hw_params));
865 chip->set_capture_format(chip, hw_params, new_cdfr);
866 return 0;
869 static int snd_cs4231_capture_hw_free(struct snd_pcm_substream *substream)
871 return snd_pcm_lib_free_pages(substream);
874 static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
876 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
877 struct snd_pcm_runtime *runtime = substream->runtime;
878 unsigned long flags;
879 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
880 unsigned int count = snd_pcm_lib_period_bytes(substream);
882 spin_lock_irqsave(&chip->reg_lock, flags);
883 chip->c_dma_size = size;
884 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
885 snd_dma_program(chip->dma2, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
886 count = snd_cs4231_get_count(chip->image[CS4231_REC_FORMAT], count) - 1;
887 if (chip->single_dma && chip->hardware != CS4231_HW_INTERWAVE) {
888 snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
889 snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
890 } else {
891 snd_cs4231_out(chip, CS4231_REC_LWR_CNT, (unsigned char) count);
892 snd_cs4231_out(chip, CS4231_REC_UPR_CNT, (unsigned char) (count >> 8));
894 spin_unlock_irqrestore(&chip->reg_lock, flags);
895 return 0;
898 static void snd_cs4231_overrange(struct snd_cs4231 *chip)
900 unsigned long flags;
901 unsigned char res;
903 spin_lock_irqsave(&chip->reg_lock, flags);
904 res = snd_cs4231_in(chip, CS4231_TEST_INIT);
905 spin_unlock_irqrestore(&chip->reg_lock, flags);
906 if (res & (0x08 | 0x02)) /* detect overrange only above 0dB; may be user selectable? */
907 chip->capture_substream->runtime->overrange++;
910 irqreturn_t snd_cs4231_interrupt(int irq, void *dev_id)
912 struct snd_cs4231 *chip = dev_id;
913 unsigned char status;
915 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
916 if (status & CS4231_TIMER_IRQ) {
917 if (chip->timer)
918 snd_timer_interrupt(chip->timer, chip->timer->sticks);
920 if (chip->single_dma && chip->hardware != CS4231_HW_INTERWAVE) {
921 if (status & CS4231_PLAYBACK_IRQ) {
922 if (chip->mode & CS4231_MODE_PLAY) {
923 if (chip->playback_substream)
924 snd_pcm_period_elapsed(chip->playback_substream);
926 if (chip->mode & CS4231_MODE_RECORD) {
927 if (chip->capture_substream) {
928 snd_cs4231_overrange(chip);
929 snd_pcm_period_elapsed(chip->capture_substream);
933 } else {
934 if (status & CS4231_PLAYBACK_IRQ) {
935 if (chip->playback_substream)
936 snd_pcm_period_elapsed(chip->playback_substream);
938 if (status & CS4231_RECORD_IRQ) {
939 if (chip->capture_substream) {
940 snd_cs4231_overrange(chip);
941 snd_pcm_period_elapsed(chip->capture_substream);
946 spin_lock(&chip->reg_lock);
947 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
948 spin_unlock(&chip->reg_lock);
949 return IRQ_HANDLED;
952 static snd_pcm_uframes_t snd_cs4231_playback_pointer(struct snd_pcm_substream *substream)
954 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
955 size_t ptr;
957 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
958 return 0;
959 ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
960 return bytes_to_frames(substream->runtime, ptr);
963 static snd_pcm_uframes_t snd_cs4231_capture_pointer(struct snd_pcm_substream *substream)
965 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
966 size_t ptr;
968 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
969 return 0;
970 ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
971 return bytes_to_frames(substream->runtime, ptr);
978 static int snd_cs4231_probe(struct snd_cs4231 *chip)
980 unsigned long flags;
981 int i, id, rev;
982 unsigned char *ptr;
983 unsigned int hw;
985 #if 0
986 snd_cs4231_debug(chip);
987 #endif
988 id = 0;
989 for (i = 0; i < 50; i++) {
990 mb();
991 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
992 udelay(2000);
993 else {
994 spin_lock_irqsave(&chip->reg_lock, flags);
995 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
996 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
997 spin_unlock_irqrestore(&chip->reg_lock, flags);
998 if (id == 0x0a)
999 break; /* this is valid value */
1002 snd_printdd("cs4231: port = 0x%lx, id = 0x%x\n", chip->port, id);
1003 if (id != 0x0a)
1004 return -ENODEV; /* no valid device found */
1006 if (((hw = chip->hardware) & CS4231_HW_TYPE_MASK) == CS4231_HW_DETECT) {
1007 rev = snd_cs4231_in(chip, CS4231_VERSION) & 0xe7;
1008 snd_printdd("CS4231: VERSION (I25) = 0x%x\n", rev);
1009 if (rev == 0x80) {
1010 unsigned char tmp = snd_cs4231_in(chip, 23);
1011 snd_cs4231_out(chip, 23, ~tmp);
1012 if (snd_cs4231_in(chip, 23) != tmp)
1013 chip->hardware = CS4231_HW_AD1845;
1014 else
1015 chip->hardware = CS4231_HW_CS4231;
1016 } else if (rev == 0xa0) {
1017 chip->hardware = CS4231_HW_CS4231A;
1018 } else if (rev == 0xa2) {
1019 chip->hardware = CS4231_HW_CS4232;
1020 } else if (rev == 0xb2) {
1021 chip->hardware = CS4231_HW_CS4232A;
1022 } else if (rev == 0x83) {
1023 chip->hardware = CS4231_HW_CS4236;
1024 } else if (rev == 0x03) {
1025 chip->hardware = CS4231_HW_CS4236B;
1026 } else {
1027 snd_printk("unknown CS chip with version 0x%x\n", rev);
1028 return -ENODEV; /* unknown CS4231 chip? */
1031 spin_lock_irqsave(&chip->reg_lock, flags);
1032 cs4231_inb(chip, CS4231P(STATUS)); /* clear any pendings IRQ */
1033 cs4231_outb(chip, CS4231P(STATUS), 0);
1034 mb();
1035 spin_unlock_irqrestore(&chip->reg_lock, flags);
1037 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1038 switch (chip->hardware) {
1039 case CS4231_HW_INTERWAVE:
1040 chip->image[CS4231_MISC_INFO] = CS4231_IW_MODE3;
1041 break;
1042 case CS4231_HW_CS4235:
1043 case CS4231_HW_CS4236B:
1044 case CS4231_HW_CS4237B:
1045 case CS4231_HW_CS4238B:
1046 case CS4231_HW_CS4239:
1047 if (hw == CS4231_HW_DETECT3)
1048 chip->image[CS4231_MISC_INFO] = CS4231_4236_MODE3;
1049 else
1050 chip->hardware = CS4231_HW_CS4236;
1051 break;
1054 chip->image[CS4231_IFACE_CTRL] =
1055 (chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA) |
1056 (chip->single_dma ? CS4231_SINGLE_DMA : 0);
1057 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1058 chip->image[CS4231_ALT_FEATURE_2] = chip->hardware == CS4231_HW_INTERWAVE ? 0xc2 : 0x01;
1059 ptr = (unsigned char *) &chip->image;
1060 snd_cs4231_mce_down(chip);
1061 spin_lock_irqsave(&chip->reg_lock, flags);
1062 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
1063 snd_cs4231_out(chip, i, *ptr++);
1064 spin_unlock_irqrestore(&chip->reg_lock, flags);
1065 snd_cs4231_mce_up(chip);
1066 snd_cs4231_mce_down(chip);
1068 mdelay(2);
1070 /* ok.. try check hardware version for CS4236+ chips */
1071 if ((hw & CS4231_HW_TYPE_MASK) == CS4231_HW_DETECT) {
1072 if (chip->hardware == CS4231_HW_CS4236B) {
1073 rev = snd_cs4236_ext_in(chip, CS4236_VERSION);
1074 snd_cs4236_ext_out(chip, CS4236_VERSION, 0xff);
1075 id = snd_cs4236_ext_in(chip, CS4236_VERSION);
1076 snd_cs4236_ext_out(chip, CS4236_VERSION, rev);
1077 snd_printdd("CS4231: ext version; rev = 0x%x, id = 0x%x\n", rev, id);
1078 if ((id & 0x1f) == 0x1d) { /* CS4235 */
1079 chip->hardware = CS4231_HW_CS4235;
1080 switch (id >> 5) {
1081 case 4:
1082 case 5:
1083 case 6:
1084 break;
1085 default:
1086 snd_printk("unknown CS4235 chip (enhanced version = 0x%x)\n", id);
1088 } else if ((id & 0x1f) == 0x0b) { /* CS4236/B */
1089 switch (id >> 5) {
1090 case 4:
1091 case 5:
1092 case 6:
1093 case 7:
1094 chip->hardware = CS4231_HW_CS4236B;
1095 break;
1096 default:
1097 snd_printk("unknown CS4236 chip (enhanced version = 0x%x)\n", id);
1099 } else if ((id & 0x1f) == 0x08) { /* CS4237B */
1100 chip->hardware = CS4231_HW_CS4237B;
1101 switch (id >> 5) {
1102 case 4:
1103 case 5:
1104 case 6:
1105 case 7:
1106 break;
1107 default:
1108 snd_printk("unknown CS4237B chip (enhanced version = 0x%x)\n", id);
1110 } else if ((id & 0x1f) == 0x09) { /* CS4238B */
1111 chip->hardware = CS4231_HW_CS4238B;
1112 switch (id >> 5) {
1113 case 5:
1114 case 6:
1115 case 7:
1116 break;
1117 default:
1118 snd_printk("unknown CS4238B chip (enhanced version = 0x%x)\n", id);
1120 } else if ((id & 0x1f) == 0x1e) { /* CS4239 */
1121 chip->hardware = CS4231_HW_CS4239;
1122 switch (id >> 5) {
1123 case 4:
1124 case 5:
1125 case 6:
1126 break;
1127 default:
1128 snd_printk("unknown CS4239 chip (enhanced version = 0x%x)\n", id);
1130 } else {
1131 snd_printk("unknown CS4236/CS423xB chip (enhanced version = 0x%x)\n", id);
1135 return 0; /* all things are ok.. */
1142 static struct snd_pcm_hardware snd_cs4231_playback =
1144 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1145 SNDRV_PCM_INFO_MMAP_VALID |
1146 SNDRV_PCM_INFO_RESUME |
1147 SNDRV_PCM_INFO_SYNC_START),
1148 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_IMA_ADPCM |
1149 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE),
1150 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1151 .rate_min = 5510,
1152 .rate_max = 48000,
1153 .channels_min = 1,
1154 .channels_max = 2,
1155 .buffer_bytes_max = (128*1024),
1156 .period_bytes_min = 64,
1157 .period_bytes_max = (128*1024),
1158 .periods_min = 1,
1159 .periods_max = 1024,
1160 .fifo_size = 0,
1163 static struct snd_pcm_hardware snd_cs4231_capture =
1165 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1166 SNDRV_PCM_INFO_MMAP_VALID |
1167 SNDRV_PCM_INFO_RESUME |
1168 SNDRV_PCM_INFO_SYNC_START),
1169 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_IMA_ADPCM |
1170 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE),
1171 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1172 .rate_min = 5510,
1173 .rate_max = 48000,
1174 .channels_min = 1,
1175 .channels_max = 2,
1176 .buffer_bytes_max = (128*1024),
1177 .period_bytes_min = 64,
1178 .period_bytes_max = (128*1024),
1179 .periods_min = 1,
1180 .periods_max = 1024,
1181 .fifo_size = 0,
1188 static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1190 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1191 struct snd_pcm_runtime *runtime = substream->runtime;
1192 int err;
1194 runtime->hw = snd_cs4231_playback;
1196 /* hardware bug in InterWave chipset */
1197 if (chip->hardware == CS4231_HW_INTERWAVE && chip->dma1 > 3)
1198 runtime->hw.formats &= ~SNDRV_PCM_FMTBIT_MU_LAW;
1200 /* hardware limitation of cheap chips */
1201 if (chip->hardware == CS4231_HW_CS4235 ||
1202 chip->hardware == CS4231_HW_CS4239)
1203 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE;
1205 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
1206 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
1208 if (chip->claim_dma) {
1209 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma1)) < 0)
1210 return err;
1213 if ((err = snd_cs4231_open(chip, CS4231_MODE_PLAY)) < 0) {
1214 if (chip->release_dma)
1215 chip->release_dma(chip, chip->dma_private_data, chip->dma1);
1216 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1217 return err;
1219 chip->playback_substream = substream;
1220 snd_pcm_set_sync(substream);
1221 chip->rate_constraint(runtime);
1222 return 0;
1225 static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1227 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1228 struct snd_pcm_runtime *runtime = substream->runtime;
1229 int err;
1231 runtime->hw = snd_cs4231_capture;
1233 /* hardware limitation of cheap chips */
1234 if (chip->hardware == CS4231_HW_CS4235 ||
1235 chip->hardware == CS4231_HW_CS4239)
1236 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE;
1238 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
1239 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
1241 if (chip->claim_dma) {
1242 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma2)) < 0)
1243 return err;
1246 if ((err = snd_cs4231_open(chip, CS4231_MODE_RECORD)) < 0) {
1247 if (chip->release_dma)
1248 chip->release_dma(chip, chip->dma_private_data, chip->dma2);
1249 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1250 return err;
1252 chip->capture_substream = substream;
1253 snd_pcm_set_sync(substream);
1254 chip->rate_constraint(runtime);
1255 return 0;
1258 static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1260 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1262 chip->playback_substream = NULL;
1263 snd_cs4231_close(chip, CS4231_MODE_PLAY);
1264 return 0;
1267 static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1269 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1271 chip->capture_substream = NULL;
1272 snd_cs4231_close(chip, CS4231_MODE_RECORD);
1273 return 0;
1276 #ifdef CONFIG_PM
1278 /* lowlevel suspend callback for CS4231 */
1279 static void snd_cs4231_suspend(struct snd_cs4231 *chip)
1281 int reg;
1282 unsigned long flags;
1284 snd_pcm_suspend_all(chip->pcm);
1285 spin_lock_irqsave(&chip->reg_lock, flags);
1286 for (reg = 0; reg < 32; reg++)
1287 chip->image[reg] = snd_cs4231_in(chip, reg);
1288 spin_unlock_irqrestore(&chip->reg_lock, flags);
1291 /* lowlevel resume callback for CS4231 */
1292 static void snd_cs4231_resume(struct snd_cs4231 *chip)
1294 int reg;
1295 unsigned long flags;
1296 /* int timeout; */
1298 snd_cs4231_mce_up(chip);
1299 spin_lock_irqsave(&chip->reg_lock, flags);
1300 for (reg = 0; reg < 32; reg++) {
1301 switch (reg) {
1302 case CS4231_VERSION:
1303 break;
1304 default:
1305 snd_cs4231_out(chip, reg, chip->image[reg]);
1306 break;
1309 spin_unlock_irqrestore(&chip->reg_lock, flags);
1310 #if 1
1311 snd_cs4231_mce_down(chip);
1312 #else
1313 /* The following is a workaround to avoid freeze after resume on TP600E.
1314 This is the first half of copy of snd_cs4231_mce_down(), but doesn't
1315 include rescheduling. -- iwai
1317 snd_cs4231_busy_wait(chip);
1318 spin_lock_irqsave(&chip->reg_lock, flags);
1319 chip->mce_bit &= ~CS4231_MCE;
1320 timeout = cs4231_inb(chip, CS4231P(REGSEL));
1321 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
1322 spin_unlock_irqrestore(&chip->reg_lock, flags);
1323 if (timeout == 0x80)
1324 snd_printk("down [0x%lx]: serious init problem - codec still busy\n", chip->port);
1325 if ((timeout & CS4231_MCE) == 0 ||
1326 !(chip->hardware & (CS4231_HW_CS4231_MASK | CS4231_HW_CS4232_MASK))) {
1327 return;
1329 snd_cs4231_busy_wait(chip);
1330 #endif
1332 #endif /* CONFIG_PM */
1334 static int snd_cs4231_free(struct snd_cs4231 *chip)
1336 release_and_free_resource(chip->res_port);
1337 release_and_free_resource(chip->res_cport);
1338 if (chip->irq >= 0) {
1339 disable_irq(chip->irq);
1340 if (!(chip->hwshare & CS4231_HWSHARE_IRQ))
1341 free_irq(chip->irq, (void *) chip);
1343 if (!(chip->hwshare & CS4231_HWSHARE_DMA1) && chip->dma1 >= 0) {
1344 snd_dma_disable(chip->dma1);
1345 free_dma(chip->dma1);
1347 if (!(chip->hwshare & CS4231_HWSHARE_DMA2) && chip->dma2 >= 0 && chip->dma2 != chip->dma1) {
1348 snd_dma_disable(chip->dma2);
1349 free_dma(chip->dma2);
1351 if (chip->timer)
1352 snd_device_free(chip->card, chip->timer);
1353 kfree(chip);
1354 return 0;
1357 static int snd_cs4231_dev_free(struct snd_device *device)
1359 struct snd_cs4231 *chip = device->device_data;
1360 return snd_cs4231_free(chip);
1363 const char *snd_cs4231_chip_id(struct snd_cs4231 *chip)
1365 switch (chip->hardware) {
1366 case CS4231_HW_CS4231: return "CS4231";
1367 case CS4231_HW_CS4231A: return "CS4231A";
1368 case CS4231_HW_CS4232: return "CS4232";
1369 case CS4231_HW_CS4232A: return "CS4232A";
1370 case CS4231_HW_CS4235: return "CS4235";
1371 case CS4231_HW_CS4236: return "CS4236";
1372 case CS4231_HW_CS4236B: return "CS4236B";
1373 case CS4231_HW_CS4237B: return "CS4237B";
1374 case CS4231_HW_CS4238B: return "CS4238B";
1375 case CS4231_HW_CS4239: return "CS4239";
1376 case CS4231_HW_INTERWAVE: return "AMD InterWave";
1377 case CS4231_HW_OPL3SA2: return chip->card->shortname;
1378 case CS4231_HW_AD1845: return "AD1845";
1379 default: return "???";
1383 static int snd_cs4231_new(struct snd_card *card,
1384 unsigned short hardware,
1385 unsigned short hwshare,
1386 struct snd_cs4231 ** rchip)
1388 struct snd_cs4231 *chip;
1390 *rchip = NULL;
1391 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1392 if (chip == NULL)
1393 return -ENOMEM;
1394 chip->hardware = hardware;
1395 chip->hwshare = hwshare;
1397 spin_lock_init(&chip->reg_lock);
1398 mutex_init(&chip->mce_mutex);
1399 mutex_init(&chip->open_mutex);
1400 chip->card = card;
1401 chip->rate_constraint = snd_cs4231_xrate;
1402 chip->set_playback_format = snd_cs4231_playback_format;
1403 chip->set_capture_format = snd_cs4231_capture_format;
1404 memcpy(&chip->image, &snd_cs4231_original_image, sizeof(snd_cs4231_original_image));
1406 *rchip = chip;
1407 return 0;
1410 int snd_cs4231_create(struct snd_card *card,
1411 unsigned long port,
1412 unsigned long cport,
1413 int irq, int dma1, int dma2,
1414 unsigned short hardware,
1415 unsigned short hwshare,
1416 struct snd_cs4231 ** rchip)
1418 static struct snd_device_ops ops = {
1419 .dev_free = snd_cs4231_dev_free,
1421 struct snd_cs4231 *chip;
1422 int err;
1424 err = snd_cs4231_new(card, hardware, hwshare, &chip);
1425 if (err < 0)
1426 return err;
1428 chip->irq = -1;
1429 chip->dma1 = -1;
1430 chip->dma2 = -1;
1432 if ((chip->res_port = request_region(port, 4, "CS4231")) == NULL) {
1433 snd_printk(KERN_ERR "cs4231: can't grab port 0x%lx\n", port);
1434 snd_cs4231_free(chip);
1435 return -EBUSY;
1437 chip->port = port;
1438 if ((long)cport >= 0 && (chip->res_cport = request_region(cport, 8, "CS4232 Control")) == NULL) {
1439 snd_printk(KERN_ERR "cs4231: can't grab control port 0x%lx\n", cport);
1440 snd_cs4231_free(chip);
1441 return -ENODEV;
1443 chip->cport = cport;
1444 if (!(hwshare & CS4231_HWSHARE_IRQ) && request_irq(irq, snd_cs4231_interrupt, IRQF_DISABLED, "CS4231", (void *) chip)) {
1445 snd_printk(KERN_ERR "cs4231: can't grab IRQ %d\n", irq);
1446 snd_cs4231_free(chip);
1447 return -EBUSY;
1449 chip->irq = irq;
1450 if (!(hwshare & CS4231_HWSHARE_DMA1) && request_dma(dma1, "CS4231 - 1")) {
1451 snd_printk(KERN_ERR "cs4231: can't grab DMA1 %d\n", dma1);
1452 snd_cs4231_free(chip);
1453 return -EBUSY;
1455 chip->dma1 = dma1;
1456 if (!(hwshare & CS4231_HWSHARE_DMA2) && dma1 != dma2 && dma2 >= 0 && request_dma(dma2, "CS4231 - 2")) {
1457 snd_printk(KERN_ERR "cs4231: can't grab DMA2 %d\n", dma2);
1458 snd_cs4231_free(chip);
1459 return -EBUSY;
1461 if (dma1 == dma2 || dma2 < 0) {
1462 chip->single_dma = 1;
1463 chip->dma2 = chip->dma1;
1464 } else
1465 chip->dma2 = dma2;
1467 /* global setup */
1468 if (snd_cs4231_probe(chip) < 0) {
1469 snd_cs4231_free(chip);
1470 return -ENODEV;
1472 snd_cs4231_init(chip);
1474 #if 0
1475 if (chip->hardware & CS4231_HW_CS4232_MASK) {
1476 if (chip->res_cport == NULL)
1477 snd_printk("CS4232 control port features are not accessible\n");
1479 #endif
1481 /* Register device */
1482 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1483 snd_cs4231_free(chip);
1484 return err;
1487 #ifdef CONFIG_PM
1488 /* Power Management */
1489 chip->suspend = snd_cs4231_suspend;
1490 chip->resume = snd_cs4231_resume;
1491 #endif
1493 *rchip = chip;
1494 return 0;
1497 static struct snd_pcm_ops snd_cs4231_playback_ops = {
1498 .open = snd_cs4231_playback_open,
1499 .close = snd_cs4231_playback_close,
1500 .ioctl = snd_pcm_lib_ioctl,
1501 .hw_params = snd_cs4231_playback_hw_params,
1502 .hw_free = snd_cs4231_playback_hw_free,
1503 .prepare = snd_cs4231_playback_prepare,
1504 .trigger = snd_cs4231_trigger,
1505 .pointer = snd_cs4231_playback_pointer,
1508 static struct snd_pcm_ops snd_cs4231_capture_ops = {
1509 .open = snd_cs4231_capture_open,
1510 .close = snd_cs4231_capture_close,
1511 .ioctl = snd_pcm_lib_ioctl,
1512 .hw_params = snd_cs4231_capture_hw_params,
1513 .hw_free = snd_cs4231_capture_hw_free,
1514 .prepare = snd_cs4231_capture_prepare,
1515 .trigger = snd_cs4231_trigger,
1516 .pointer = snd_cs4231_capture_pointer,
1519 int snd_cs4231_pcm(struct snd_cs4231 *chip, int device, struct snd_pcm **rpcm)
1521 struct snd_pcm *pcm;
1522 int err;
1524 if ((err = snd_pcm_new(chip->card, "CS4231", device, 1, 1, &pcm)) < 0)
1525 return err;
1527 spin_lock_init(&chip->reg_lock);
1528 mutex_init(&chip->mce_mutex);
1529 mutex_init(&chip->open_mutex);
1531 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs4231_playback_ops);
1532 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cs4231_capture_ops);
1534 /* global setup */
1535 pcm->private_data = chip;
1536 pcm->info_flags = 0;
1537 if (chip->single_dma)
1538 pcm->info_flags |= SNDRV_PCM_INFO_HALF_DUPLEX;
1539 if (chip->hardware != CS4231_HW_INTERWAVE)
1540 pcm->info_flags |= SNDRV_PCM_INFO_JOINT_DUPLEX;
1541 strcpy(pcm->name, snd_cs4231_chip_id(chip));
1543 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1544 snd_dma_isa_data(),
1545 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
1547 chip->pcm = pcm;
1548 if (rpcm)
1549 *rpcm = pcm;
1550 return 0;
1553 static void snd_cs4231_timer_free(struct snd_timer *timer)
1555 struct snd_cs4231 *chip = timer->private_data;
1556 chip->timer = NULL;
1559 int snd_cs4231_timer(struct snd_cs4231 *chip, int device, struct snd_timer **rtimer)
1561 struct snd_timer *timer;
1562 struct snd_timer_id tid;
1563 int err;
1565 /* Timer initialization */
1566 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1567 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1568 tid.card = chip->card->number;
1569 tid.device = device;
1570 tid.subdevice = 0;
1571 if ((err = snd_timer_new(chip->card, "CS4231", &tid, &timer)) < 0)
1572 return err;
1573 strcpy(timer->name, snd_cs4231_chip_id(chip));
1574 timer->private_data = chip;
1575 timer->private_free = snd_cs4231_timer_free;
1576 timer->hw = snd_cs4231_timer_table;
1577 chip->timer = timer;
1578 if (rtimer)
1579 *rtimer = timer;
1580 return 0;
1584 * MIXER part
1587 static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1589 static char *texts[4] = {
1590 "Line", "Aux", "Mic", "Mix"
1592 static char *opl3sa_texts[4] = {
1593 "Line", "CD", "Mic", "Mix"
1595 static char *gusmax_texts[4] = {
1596 "Line", "Synth", "Mic", "Mix"
1598 char **ptexts = texts;
1599 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1601 snd_assert(chip->card != NULL, return -EINVAL);
1602 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1603 uinfo->count = 2;
1604 uinfo->value.enumerated.items = 4;
1605 if (uinfo->value.enumerated.item > 3)
1606 uinfo->value.enumerated.item = 3;
1607 if (!strcmp(chip->card->driver, "GUS MAX"))
1608 ptexts = gusmax_texts;
1609 switch (chip->hardware) {
1610 case CS4231_HW_INTERWAVE: ptexts = gusmax_texts; break;
1611 case CS4231_HW_OPL3SA2: ptexts = opl3sa_texts; break;
1613 strcpy(uinfo->value.enumerated.name, ptexts[uinfo->value.enumerated.item]);
1614 return 0;
1617 static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1619 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1620 unsigned long flags;
1622 spin_lock_irqsave(&chip->reg_lock, flags);
1623 ucontrol->value.enumerated.item[0] = (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1624 ucontrol->value.enumerated.item[1] = (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1625 spin_unlock_irqrestore(&chip->reg_lock, flags);
1626 return 0;
1629 static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1631 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1632 unsigned long flags;
1633 unsigned short left, right;
1634 int change;
1636 if (ucontrol->value.enumerated.item[0] > 3 ||
1637 ucontrol->value.enumerated.item[1] > 3)
1638 return -EINVAL;
1639 left = ucontrol->value.enumerated.item[0] << 6;
1640 right = ucontrol->value.enumerated.item[1] << 6;
1641 spin_lock_irqsave(&chip->reg_lock, flags);
1642 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1643 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1644 change = left != chip->image[CS4231_LEFT_INPUT] ||
1645 right != chip->image[CS4231_RIGHT_INPUT];
1646 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1647 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1648 spin_unlock_irqrestore(&chip->reg_lock, flags);
1649 return change;
1652 int snd_cs4231_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1654 int mask = (kcontrol->private_value >> 16) & 0xff;
1656 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1657 uinfo->count = 1;
1658 uinfo->value.integer.min = 0;
1659 uinfo->value.integer.max = mask;
1660 return 0;
1663 int snd_cs4231_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1665 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1666 unsigned long flags;
1667 int reg = kcontrol->private_value & 0xff;
1668 int shift = (kcontrol->private_value >> 8) & 0xff;
1669 int mask = (kcontrol->private_value >> 16) & 0xff;
1670 int invert = (kcontrol->private_value >> 24) & 0xff;
1672 spin_lock_irqsave(&chip->reg_lock, flags);
1673 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1674 spin_unlock_irqrestore(&chip->reg_lock, flags);
1675 if (invert)
1676 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1677 return 0;
1680 int snd_cs4231_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1682 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1683 unsigned long flags;
1684 int reg = kcontrol->private_value & 0xff;
1685 int shift = (kcontrol->private_value >> 8) & 0xff;
1686 int mask = (kcontrol->private_value >> 16) & 0xff;
1687 int invert = (kcontrol->private_value >> 24) & 0xff;
1688 int change;
1689 unsigned short val;
1691 val = (ucontrol->value.integer.value[0] & mask);
1692 if (invert)
1693 val = mask - val;
1694 val <<= shift;
1695 spin_lock_irqsave(&chip->reg_lock, flags);
1696 val = (chip->image[reg] & ~(mask << shift)) | val;
1697 change = val != chip->image[reg];
1698 snd_cs4231_out(chip, reg, val);
1699 spin_unlock_irqrestore(&chip->reg_lock, flags);
1700 return change;
1703 int snd_cs4231_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1705 int mask = (kcontrol->private_value >> 24) & 0xff;
1707 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1708 uinfo->count = 2;
1709 uinfo->value.integer.min = 0;
1710 uinfo->value.integer.max = mask;
1711 return 0;
1714 int snd_cs4231_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1716 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1717 unsigned long flags;
1718 int left_reg = kcontrol->private_value & 0xff;
1719 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1720 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1721 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1722 int mask = (kcontrol->private_value >> 24) & 0xff;
1723 int invert = (kcontrol->private_value >> 22) & 1;
1725 spin_lock_irqsave(&chip->reg_lock, flags);
1726 ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1727 ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1728 spin_unlock_irqrestore(&chip->reg_lock, flags);
1729 if (invert) {
1730 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1731 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1733 return 0;
1736 int snd_cs4231_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1738 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1739 unsigned long flags;
1740 int left_reg = kcontrol->private_value & 0xff;
1741 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1742 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1743 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1744 int mask = (kcontrol->private_value >> 24) & 0xff;
1745 int invert = (kcontrol->private_value >> 22) & 1;
1746 int change;
1747 unsigned short val1, val2;
1749 val1 = ucontrol->value.integer.value[0] & mask;
1750 val2 = ucontrol->value.integer.value[1] & mask;
1751 if (invert) {
1752 val1 = mask - val1;
1753 val2 = mask - val2;
1755 val1 <<= shift_left;
1756 val2 <<= shift_right;
1757 spin_lock_irqsave(&chip->reg_lock, flags);
1758 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1759 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1760 change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1761 snd_cs4231_out(chip, left_reg, val1);
1762 snd_cs4231_out(chip, right_reg, val2);
1763 spin_unlock_irqrestore(&chip->reg_lock, flags);
1764 return change;
1767 static struct snd_kcontrol_new snd_cs4231_controls[] = {
1768 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1769 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1770 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1771 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1772 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1773 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1774 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1775 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1776 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1777 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1778 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1779 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1780 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 15, 0),
1782 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1783 .name = "Capture Source",
1784 .info = snd_cs4231_info_mux,
1785 .get = snd_cs4231_get_mux,
1786 .put = snd_cs4231_put_mux,
1788 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1, 0),
1789 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1790 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1)
1793 int snd_cs4231_mixer(struct snd_cs4231 *chip)
1795 struct snd_card *card;
1796 unsigned int idx;
1797 int err;
1799 snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1801 card = chip->card;
1803 strcpy(card->mixername, chip->pcm->name);
1805 for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1806 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4231_controls[idx], chip))) < 0)
1807 return err;
1809 return 0;
1812 EXPORT_SYMBOL(snd_cs4231_out);
1813 EXPORT_SYMBOL(snd_cs4231_in);
1814 EXPORT_SYMBOL(snd_cs4236_ext_out);
1815 EXPORT_SYMBOL(snd_cs4236_ext_in);
1816 EXPORT_SYMBOL(snd_cs4231_mce_up);
1817 EXPORT_SYMBOL(snd_cs4231_mce_down);
1818 EXPORT_SYMBOL(snd_cs4231_interrupt);
1819 EXPORT_SYMBOL(snd_cs4231_chip_id);
1820 EXPORT_SYMBOL(snd_cs4231_create);
1821 EXPORT_SYMBOL(snd_cs4231_pcm);
1822 EXPORT_SYMBOL(snd_cs4231_mixer);
1823 EXPORT_SYMBOL(snd_cs4231_timer);
1824 EXPORT_SYMBOL(snd_cs4231_info_single);
1825 EXPORT_SYMBOL(snd_cs4231_get_single);
1826 EXPORT_SYMBOL(snd_cs4231_put_single);
1827 EXPORT_SYMBOL(snd_cs4231_info_double);
1828 EXPORT_SYMBOL(snd_cs4231_get_double);
1829 EXPORT_SYMBOL(snd_cs4231_put_double);
1832 * INIT part
1835 static int __init alsa_cs4231_init(void)
1837 return 0;
1840 static void __exit alsa_cs4231_exit(void)
1844 module_init(alsa_cs4231_init)
1845 module_exit(alsa_cs4231_exit)