arch/mn10300/include/asm/smp.h

   1 /* MN10300 SMP support
   2  *
   3  * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
   4  * Written by David Howells (dhowells@redhat.com)
   5  *
   6  * Modified by Matsushita Electric Industrial Co., Ltd.
   7  * Modifications:
   8  *  13-Nov-2006 MEI Define IPI-IRQ number and add inline/macro function
   9  *                  for SMP support.
  10  *  22-Jan-2007 MEI Add the define related to SMP_BOOT_IRQ.
  11  *  23-Feb-2007 MEI Add the define related to SMP icahce invalidate.
  12  *  23-Jun-2008 MEI Delete INTC_IPI.
  13  *  22-Jul-2008 MEI Add smp_nmi_call_function and related defines.
  14  *  04-Aug-2008 MEI Delete USE_DOIRQ_CACHE_IPI.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public Licence
  18  * as published by the Free Software Foundation; either version
  19  * 2 of the Licence, or (at your option) any later version.
  20  */
  21 #ifndef _ASM_SMP_H
  22 #define _ASM_SMP_H
  23
  24 #ifndef __ASSEMBLY__
  25 #include <linux/threads.h>
  26 #include <linux/cpumask.h>
  27 #include <linux/thread_info.h>
  28 #endif
  29
  30 #ifdef CONFIG_SMP
  31 #include <proc/smp-regs.h>
  32
  33 #define RESCHEDULE_IPI          63
  34 #define CALL_FUNC_SINGLE_IPI    192
  35 #define LOCAL_TIMER_IPI         193
  36 #define FLUSH_CACHE_IPI         194
  37 #define CALL_FUNCTION_NMI_IPI   195
  38 #define DEBUGGER_NMI_IPI        196
  39
  40 #define SMP_BOOT_IRQ            195
  41
  42 #define RESCHEDULE_GxICR_LV     GxICR_LEVEL_6
  43 #define CALL_FUNCTION_GxICR_LV  GxICR_LEVEL_4
  44 #define LOCAL_TIMER_GxICR_LV    GxICR_LEVEL_4
  45 #define FLUSH_CACHE_GxICR_LV    GxICR_LEVEL_0
  46 #define SMP_BOOT_GxICR_LV       GxICR_LEVEL_0
  47 #define DEBUGGER_GxICR_LV       CONFIG_DEBUGGER_IRQ_LEVEL
  48
  49 #define TIME_OUT_COUNT_BOOT_IPI 100
  50 #define DELAY_TIME_BOOT_IPI     75000
  51
  52
  53 #ifndef __ASSEMBLY__
  54
  55 /**
  56  * raw_smp_processor_id - Determine the raw CPU ID of the CPU running it
  57  *
  58  * What we really want to do is to use the CPUID hardware CPU register to get
  59  * this information, but accesses to that aren't cached, and run at system bus
  60  * speed, not CPU speed.  A copy of this value is, however, stored in the
  61  * thread_info struct, and that can be cached.
  62  *
  63  * An alternate way of dealing with this could be to use the EPSW.S bits to
  64  * cache this information for systems with up to four CPUs.
  65  */
  66 #define arch_smp_processor_id() (CPUID)
  67 #if 0
  68 #define raw_smp_processor_id()  (arch_smp_processor_id())
  69 #else
  70 #define raw_smp_processor_id()  (current_thread_info()->cpu)
  71 #endif
  72
  73 static inline int cpu_logical_map(int cpu)
  74 {
  75         return cpu;
  76 }
  77
  78 static inline int cpu_number_map(int cpu)
  79 {
  80         return cpu;
  81 }
  82
  83
  84 extern cpumask_t cpu_boot_map;
  85
  86 extern void smp_init_cpus(void);
  87 extern void smp_cache_interrupt(void);
  88 extern void send_IPI_allbutself(int irq);
  89 extern int smp_nmi_call_function(void (*func)(void *), void *info, int wait);
  90
  91 extern void arch_send_call_function_single_ipi(int cpu);
  92 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
  93
  94 #ifdef CONFIG_HOTPLUG_CPU
  95 extern int __cpu_disable(void);
  96 extern void __cpu_die(unsigned int cpu);
  97 #endif /* CONFIG_HOTPLUG_CPU */
  98
  99 #endif /* __ASSEMBLY__ */
 100 #else /* CONFIG_SMP */
 101 #ifndef __ASSEMBLY__
 102
 103 static inline void smp_init_cpus(void) {}
 104 #define raw_smp_processor_id() 0
 105
 106 #endif /* __ASSEMBLY__ */
 107 #endif /* CONFIG_SMP */
 108
 109 #endif /* _ASM_SMP_H */