target/cxgbit: Use T6 specific macros to get ETH/IP hdr len
[linux/fpc-iii.git] / arch / x86 / kernel / fpu / init.c
blob60dece392b3a7ab0ef67ce57edc10f79332686eb
1 /*
2 * x86 FPU boot time init code:
3 */
4 #include <asm/fpu/internal.h>
5 #include <asm/tlbflush.h>
6 #include <asm/setup.h>
7 #include <asm/cmdline.h>
9 #include <linux/sched.h>
10 #include <linux/init.h>
13 * Initialize the registers found in all CPUs, CR0 and CR4:
15 static void fpu__init_cpu_generic(void)
17 unsigned long cr0;
18 unsigned long cr4_mask = 0;
20 if (boot_cpu_has(X86_FEATURE_FXSR))
21 cr4_mask |= X86_CR4_OSFXSR;
22 if (boot_cpu_has(X86_FEATURE_XMM))
23 cr4_mask |= X86_CR4_OSXMMEXCPT;
24 if (cr4_mask)
25 cr4_set_bits(cr4_mask);
27 cr0 = read_cr0();
28 cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
29 if (!boot_cpu_has(X86_FEATURE_FPU))
30 cr0 |= X86_CR0_EM;
31 write_cr0(cr0);
33 /* Flush out any pending x87 state: */
34 #ifdef CONFIG_MATH_EMULATION
35 if (!boot_cpu_has(X86_FEATURE_FPU))
36 fpstate_init_soft(&current->thread.fpu.state.soft);
37 else
38 #endif
39 asm volatile ("fninit");
43 * Enable all supported FPU features. Called when a CPU is brought online:
45 void fpu__init_cpu(void)
47 fpu__init_cpu_generic();
48 fpu__init_cpu_xstate();
52 * The earliest FPU detection code.
54 * Set the X86_FEATURE_FPU CPU-capability bit based on
55 * trying to execute an actual sequence of FPU instructions:
57 static void fpu__init_system_early_generic(struct cpuinfo_x86 *c)
59 unsigned long cr0;
60 u16 fsw, fcw;
62 fsw = fcw = 0xffff;
64 cr0 = read_cr0();
65 cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
66 write_cr0(cr0);
68 if (!test_bit(X86_FEATURE_FPU, (unsigned long *)cpu_caps_cleared)) {
69 asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
70 : "+m" (fsw), "+m" (fcw));
72 if (fsw == 0 && (fcw & 0x103f) == 0x003f)
73 set_cpu_cap(c, X86_FEATURE_FPU);
74 else
75 clear_cpu_cap(c, X86_FEATURE_FPU);
78 #ifndef CONFIG_MATH_EMULATION
79 if (!boot_cpu_has(X86_FEATURE_FPU)) {
80 pr_emerg("x86/fpu: Giving up, no FPU found and no math emulation present\n");
81 for (;;)
82 asm volatile("hlt");
84 #endif
88 * Boot time FPU feature detection code:
90 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
92 static void __init fpu__init_system_mxcsr(void)
94 unsigned int mask = 0;
96 if (boot_cpu_has(X86_FEATURE_FXSR)) {
97 /* Static because GCC does not get 16-byte stack alignment right: */
98 static struct fxregs_state fxregs __initdata;
100 asm volatile("fxsave %0" : "+m" (fxregs));
102 mask = fxregs.mxcsr_mask;
105 * If zero then use the default features mask,
106 * which has all features set, except the
107 * denormals-are-zero feature bit:
109 if (mask == 0)
110 mask = 0x0000ffbf;
112 mxcsr_feature_mask &= mask;
116 * Once per bootup FPU initialization sequences that will run on most x86 CPUs:
118 static void __init fpu__init_system_generic(void)
121 * Set up the legacy init FPU context. (xstate init might overwrite this
122 * with a more modern format, if the CPU supports it.)
124 fpstate_init(&init_fpstate);
126 fpu__init_system_mxcsr();
130 * Size of the FPU context state. All tasks in the system use the
131 * same context size, regardless of what portion they use.
132 * This is inherent to the XSAVE architecture which puts all state
133 * components into a single, continuous memory block:
135 unsigned int fpu_kernel_xstate_size;
136 EXPORT_SYMBOL_GPL(fpu_kernel_xstate_size);
138 /* Get alignment of the TYPE. */
139 #define TYPE_ALIGN(TYPE) offsetof(struct { char x; TYPE test; }, test)
142 * Enforce that 'MEMBER' is the last field of 'TYPE'.
144 * Align the computed size with alignment of the TYPE,
145 * because that's how C aligns structs.
147 #define CHECK_MEMBER_AT_END_OF(TYPE, MEMBER) \
148 BUILD_BUG_ON(sizeof(TYPE) != ALIGN(offsetofend(TYPE, MEMBER), \
149 TYPE_ALIGN(TYPE)))
152 * We append the 'struct fpu' to the task_struct:
154 static void __init fpu__init_task_struct_size(void)
156 int task_size = sizeof(struct task_struct);
159 * Subtract off the static size of the register state.
160 * It potentially has a bunch of padding.
162 task_size -= sizeof(((struct task_struct *)0)->thread.fpu.state);
165 * Add back the dynamically-calculated register state
166 * size.
168 task_size += fpu_kernel_xstate_size;
171 * We dynamically size 'struct fpu', so we require that
172 * it be at the end of 'thread_struct' and that
173 * 'thread_struct' be at the end of 'task_struct'. If
174 * you hit a compile error here, check the structure to
175 * see if something got added to the end.
177 CHECK_MEMBER_AT_END_OF(struct fpu, state);
178 CHECK_MEMBER_AT_END_OF(struct thread_struct, fpu);
179 CHECK_MEMBER_AT_END_OF(struct task_struct, thread);
181 arch_task_struct_size = task_size;
185 * Set up the user and kernel xstate sizes based on the legacy FPU context size.
187 * We set this up first, and later it will be overwritten by
188 * fpu__init_system_xstate() if the CPU knows about xstates.
190 static void __init fpu__init_system_xstate_size_legacy(void)
192 static int on_boot_cpu __initdata = 1;
194 WARN_ON_FPU(!on_boot_cpu);
195 on_boot_cpu = 0;
198 * Note that xstate sizes might be overwritten later during
199 * fpu__init_system_xstate().
202 if (!boot_cpu_has(X86_FEATURE_FPU)) {
204 * Disable xsave as we do not support it if i387
205 * emulation is enabled.
207 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
208 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
209 fpu_kernel_xstate_size = sizeof(struct swregs_state);
210 } else {
211 if (boot_cpu_has(X86_FEATURE_FXSR))
212 fpu_kernel_xstate_size =
213 sizeof(struct fxregs_state);
214 else
215 fpu_kernel_xstate_size =
216 sizeof(struct fregs_state);
219 fpu_user_xstate_size = fpu_kernel_xstate_size;
223 * Find supported xfeatures based on cpu features and command-line input.
224 * This must be called after fpu__init_parse_early_param() is called and
225 * xfeatures_mask is enumerated.
227 u64 __init fpu__get_supported_xfeatures_mask(void)
229 return XCNTXT_MASK;
232 /* Legacy code to initialize eager fpu mode. */
233 static void __init fpu__init_system_ctx_switch(void)
235 static bool on_boot_cpu __initdata = 1;
237 WARN_ON_FPU(!on_boot_cpu);
238 on_boot_cpu = 0;
240 WARN_ON_FPU(current->thread.fpu.fpstate_active);
244 * We parse fpu parameters early because fpu__init_system() is executed
245 * before parse_early_param().
247 static void __init fpu__init_parse_early_param(void)
249 if (cmdline_find_option_bool(boot_command_line, "no387"))
250 setup_clear_cpu_cap(X86_FEATURE_FPU);
252 if (cmdline_find_option_bool(boot_command_line, "nofxsr")) {
253 setup_clear_cpu_cap(X86_FEATURE_FXSR);
254 setup_clear_cpu_cap(X86_FEATURE_FXSR_OPT);
255 setup_clear_cpu_cap(X86_FEATURE_XMM);
258 if (cmdline_find_option_bool(boot_command_line, "noxsave"))
259 fpu__xstate_clear_all_cpu_caps();
261 if (cmdline_find_option_bool(boot_command_line, "noxsaveopt"))
262 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
264 if (cmdline_find_option_bool(boot_command_line, "noxsaves"))
265 setup_clear_cpu_cap(X86_FEATURE_XSAVES);
269 * Called on the boot CPU once per system bootup, to set up the initial
270 * FPU state that is later cloned into all processes:
272 void __init fpu__init_system(struct cpuinfo_x86 *c)
274 fpu__init_parse_early_param();
275 fpu__init_system_early_generic(c);
278 * The FPU has to be operational for some of the
279 * later FPU init activities:
281 fpu__init_cpu();
283 fpu__init_system_generic();
284 fpu__init_system_xstate_size_legacy();
285 fpu__init_system_xstate();
286 fpu__init_task_struct_size();
288 fpu__init_system_ctx_switch();