3 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Enhanced CPU detection and feature setting code by Mike Jagdis
6 * and Martin Mares, November 1997.
10 #include <linux/threads.h>
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/segment.h>
14 #include <asm/page_types.h>
15 #include <asm/pgtable_types.h>
16 #include <asm/cache.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/setup.h>
20 #include <asm/processor-flags.h>
21 #include <asm/msr-index.h>
22 #include <asm/cpufeatures.h>
23 #include <asm/percpu.h>
25 #include <asm/bootparam.h>
26 #include <asm/export.h>
28 /* Physical address */
29 #define pa(X) ((X) - __PAGE_OFFSET)
32 * References to members of the new_cpu_data structure.
35 #define X86 new_cpu_data+CPUINFO_x86
36 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
37 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
38 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
39 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
40 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
41 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
42 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
45 * This is how much memory in addition to the memory covered up to
46 * and including _end we need mapped initially.
48 * (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE)
49 * (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE)
51 * Modulo rounding, each megabyte assigned here requires a kilobyte of
52 * memory, which is currently unreclaimed.
54 * This should be a multiple of a page.
56 * KERNEL_IMAGE_SIZE should be greater than pa(_end)
57 * and small than max_low_pfn, otherwise will waste some page table entries
61 #define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
63 #define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
66 #define SIZEOF_PTREGS 17*4
69 * Number of possible pages in the lowmem region.
71 * We shift 2 by 31 instead of 1 by 32 to the left in order to avoid a
72 * gas warning about overflowing shift count when gas has been compiled
73 * with only a host target support using a 32-bit type for internal
76 LOWMEM_PAGES = (((2<<31) - __PAGE_OFFSET) >> PAGE_SHIFT)
78 /* Enough space to fit pagetables for the low memory linear map */
79 MAPPING_BEYOND_END = PAGE_TABLE_SIZE(LOWMEM_PAGES) << PAGE_SHIFT
82 * Worst-case size of the kernel mapping we need to make:
83 * a relocatable kernel can live anywhere in lowmem, so we need to be able
84 * to map all of lowmem.
86 KERNEL_PAGES = LOWMEM_PAGES
88 INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE
89 RESERVE_BRK(pagetables, INIT_MAP_SIZE)
92 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
93 * %esi points to the real-mode code as a 32-bit pointer.
94 * CS and DS must be 4 GB flat segments, but we don't depend on
95 * any particular GDT layout, because we load our own as soon as we
100 movl pa(initial_stack),%ecx
102 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
103 us to not reload segments */
104 testb $KEEP_SEGMENTS, BP_loadflags(%esi)
108 * Set segments to known values.
110 lgdt pa(boot_gdt_descr)
111 movl $(__BOOT_DS),%eax
118 leal -__PAGE_OFFSET(%ecx),%esp
121 * Clear BSS first so that there are no surprises...
125 movl $pa(__bss_start),%edi
126 movl $pa(__bss_stop),%ecx
131 * Copy bootup parameters out of the way.
132 * Note: %esi still has the pointer to the real-mode data.
133 * With the kexec as boot loader, parameter segment might be loaded beyond
134 * kernel image and might not even be addressable by early boot page tables.
135 * (kexec on panic case). Hence copy out the parameters before initializing
138 movl $pa(boot_params),%edi
139 movl $(PARAM_SIZE/4),%ecx
143 movl pa(boot_params) + NEW_CL_POINTER,%esi
145 jz 1f # No command line
146 movl $pa(boot_command_line),%edi
147 movl $(COMMAND_LINE_SIZE/4),%ecx
153 /* save OFW's pgdir table for later use when calling into OFW */
155 movl %eax, pa(olpc_ofw_pgd)
158 #ifdef CONFIG_MICROCODE
159 /* Early load ucode on BSP. */
164 * Initialize page tables. This creates a PDE and a set of page
165 * tables, which are located immediately beyond __brk_base. The variable
166 * _brk_end is set up to point to the first "safe" location.
167 * Mappings are created both at virtual address 0 (identity mapping)
168 * and PAGE_OFFSET for up to _end.
170 #ifdef CONFIG_X86_PAE
173 * In PAE mode initial_page_table is statically defined to contain
174 * enough entries to cover the VMSPLIT option (that is the top 1, 2 or 3
175 * entries). The identity mapping is handled by pointing two PGD entries
176 * to the first kernel PMD.
178 * Note the upper half of each PMD or PTE are always zero at this stage.
181 #define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
183 xorl %ebx,%ebx /* %ebx is kept at zero */
185 movl $pa(__brk_base), %edi
186 movl $pa(initial_pg_pmd), %edx
187 movl $PTE_IDENT_ATTR, %eax
189 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */
190 movl %ecx,(%edx) /* Store PMD entry */
191 /* Upper half already zero */
203 * End condition: we must map up to the end + MAPPING_BEYOND_END.
205 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
209 addl $__PAGE_OFFSET, %edi
210 movl %edi, pa(_brk_end)
212 movl %eax, pa(max_pfn_mapped)
214 /* Do early initialization of the fixmap area */
215 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
216 movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8)
219 page_pde_offset = (__PAGE_OFFSET >> 20);
221 movl $pa(__brk_base), %edi
222 movl $pa(initial_page_table), %edx
223 movl $PTE_IDENT_ATTR, %eax
225 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */
226 movl %ecx,(%edx) /* Store identity PDE entry */
227 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
235 * End condition: we must map up to the end + MAPPING_BEYOND_END.
237 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
240 addl $__PAGE_OFFSET, %edi
241 movl %edi, pa(_brk_end)
243 movl %eax, pa(max_pfn_mapped)
245 /* Do early initialization of the fixmap area */
246 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
247 movl %eax,pa(initial_page_table+0xffc)
250 #ifdef CONFIG_PARAVIRT
251 /* This is can only trip for a broken bootloader... */
252 cmpw $0x207, pa(boot_params + BP_version)
255 /* Paravirt-compatible boot parameters. Look to see what architecture
256 we're booting under. */
257 movl pa(boot_params + BP_hardware_subarch), %eax
258 cmpl $num_subarch_entries, %eax
261 movl pa(subarch_entries)(,%eax,4), %eax
262 subl $__PAGE_OFFSET, %eax
268 /* Unknown implementation; there's really
269 nothing we can do at this point. */
275 .long .Ldefault_entry /* normal x86/PC */
276 .long lguest_entry /* lguest hypervisor */
277 .long xen_entry /* Xen hypervisor */
278 .long .Ldefault_entry /* Moorestown MID */
279 num_subarch_entries = (. - subarch_entries) / 4
283 #endif /* CONFIG_PARAVIRT */
285 #ifdef CONFIG_HOTPLUG_CPU
287 * Boot CPU0 entry point. It's called from play_dead(). Everything has been set
288 * up already except stack. We just set up stack here. Then call
292 movl initial_stack, %ecx
300 * Non-boot CPU entry point; entered from trampoline.S
301 * We can't lgdt here, because lgdt itself uses a data segment, but
302 * we know the trampoline has already loaded the boot_gdt for us.
304 * If cpu hotplug is not supported then this code can go in init section
305 * which will be freed later
307 ENTRY(startup_32_smp)
309 movl $(__BOOT_DS),%eax
314 movl pa(initial_stack),%ecx
316 leal -__PAGE_OFFSET(%ecx),%esp
318 #ifdef CONFIG_MICROCODE
319 /* Early load ucode on AP. */
324 #define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \
325 X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \
327 movl $(CR0_STATE & ~X86_CR0_PG),%eax
331 * We want to start out with EFLAGS unambiguously cleared. Some BIOSes leave
332 * bits like NT set. This would confuse the debugger if this code is traced. So
333 * initialize them properly now before switching to protected mode. That means
334 * DF in particular (even though we have cleared it earlier after copying the
335 * command line) because GCC expects it.
341 * New page tables may be in 4Mbyte page mode and may be using the global pages.
343 * NOTE! If we are on a 486 we may have no cr4 at all! Specifically, cr4 exists
344 * if and only if CPUID exists and has flags other than the FPU flag set.
346 movl $-1,pa(X86_CPUID) # preset CPUID level
347 movl $X86_EFLAGS_ID,%ecx
349 popfl # set EFLAGS=ID
351 popl %eax # get EFLAGS
352 testl $X86_EFLAGS_ID,%eax # did EFLAGS.ID remained set?
353 jz .Lenable_paging # hw disallowed setting of ID bit
354 # which means no CPUID and no CR4
358 movl %eax,pa(X86_CPUID) # save largest std CPUID function
362 andl $~1,%edx # Ignore CPUID.FPU
363 jz .Lenable_paging # No flags or only CPUID.FPU = no CR4
365 movl pa(mmu_cr4_features),%eax
368 testb $X86_CR4_PAE, %al # check if PAE is enabled
371 /* Check if extended functions are implemented */
372 movl $0x80000000, %eax
374 /* Value must be in the range 0x80000001 to 0x8000ffff */
375 subl $0x80000001, %eax
376 cmpl $(0x8000ffff-0x80000001), %eax
379 /* Clear bogus XD_DISABLE bits */
382 mov $0x80000001, %eax
384 /* Execute Disable bit supported? */
385 btl $(X86_FEATURE_NX & 31), %edx
388 /* Setup EFER (Extended Feature Enable Register) */
393 /* Make changes effective */
401 movl $pa(initial_page_table), %eax
402 movl %eax,%cr3 /* set the page table pointer.. */
404 movl %eax,%cr0 /* ..and set paging (PG) bit */
405 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
407 /* Shift the stack pointer to a virtual address */
408 addl $__PAGE_OFFSET, %esp
411 * start system 32-bit setup. We need to re-do some of the things done
412 * in 16-bit mode for the "real" operations.
414 movl setup_once_ref,%eax
416 jz 1f # Did we do this already?
423 movb $4,X86 # at least 486
427 /* get vendor info */
428 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
430 movl %eax,X86_CPUID # save CPUID level
431 movl %ebx,X86_VENDOR_ID # lo 4 chars
432 movl %edx,X86_VENDOR_ID+4 # next 4 chars
433 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
435 orl %eax,%eax # do we have processor info as well?
438 movl $1,%eax # Use the CPUID instruction to get CPU type
440 movb %al,%cl # save reg for future use
441 andb $0x0f,%ah # mask processor family
443 andb $0xf0,%al # mask model
446 andb $0x0f,%cl # mask mask revision
448 movl %edx,X86_CAPABILITY
451 movl $0x50022,%ecx # set AM, WP, NE and MP
453 andl $0x80000011,%eax # Save PG,PE,ET
459 ljmp $(__KERNEL_CS),$1f
460 1: movl $(__KERNEL_DS),%eax # reload all the segment registers
461 movl %eax,%ss # after changing gdt.
463 movl $(__USER_DS),%eax # DS/ES contains default USER segment
467 movl $(__KERNEL_PERCPU), %eax
468 movl %eax,%fs # set this cpu's percpu
470 movl $(__KERNEL_STACK_CANARY),%eax
473 xorl %eax,%eax # Clear LDT
478 ENDPROC(startup_32_smp)
480 #include "verify_cpu.S"
485 * The setup work we only want to run on the BSP.
487 * Warning: %esi is live across this function.
492 * Set up a idt with 256 interrupt gates that push zero if there
493 * is no error code and then jump to early_idt_handler_common.
494 * It doesn't actually load the idt - that needs to be done on
495 * each CPU. Interrupts are enabled elsewhere, when we can be
496 * relatively sure everything is ok.
500 movl $early_idt_handler_array,%eax
501 movl $NUM_EXCEPTION_VECTORS,%ecx
505 /* interrupt gate, dpl=0, present */
506 movl $(0x8E000000 + __KERNEL_CS),2(%edi)
507 addl $EARLY_IDT_HANDLER_SIZE,%eax
511 movl $256 - NUM_EXCEPTION_VECTORS,%ecx
512 movl $ignore_int,%edx
513 movl $(__KERNEL_CS << 16),%eax
514 movw %dx,%ax /* selector = 0x0010 = cs */
515 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
522 #ifdef CONFIG_CC_STACKPROTECTOR
524 * Configure the stack canary. The linker can't handle this by
525 * relocation. Manually set base address in stack canary
526 * segment descriptor.
529 movl $stack_canary,%ecx
530 movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
532 movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
533 movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
536 andl $0,setup_once_ref /* Once is enough, thanks */
539 ENTRY(early_idt_handler_array)
543 # 24(%rsp) error code
545 .rept NUM_EXCEPTION_VECTORS
546 .ifeq (EXCEPTION_ERRCODE_MASK >> i) & 1
547 pushl $0 # Dummy error code, to make stack frame uniform
549 pushl $i # 20(%esp) Vector number
550 jmp early_idt_handler_common
552 .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc
554 ENDPROC(early_idt_handler_array)
556 early_idt_handler_common:
558 * The stack is the hardware frame, an error code or zero, and the
563 incl %ss:early_recursion_flag
565 /* The vector number is in pt_regs->gs */
568 pushl %fs /* pt_regs->fs */
569 movw $0, 2(%esp) /* clear high bits (some CPUs leave garbage) */
570 pushl %es /* pt_regs->es */
571 movw $0, 2(%esp) /* clear high bits (some CPUs leave garbage) */
572 pushl %ds /* pt_regs->ds */
573 movw $0, 2(%esp) /* clear high bits (some CPUs leave garbage) */
574 pushl %eax /* pt_regs->ax */
575 pushl %ebp /* pt_regs->bp */
576 pushl %edi /* pt_regs->di */
577 pushl %esi /* pt_regs->si */
578 pushl %edx /* pt_regs->dx */
579 pushl %ecx /* pt_regs->cx */
580 pushl %ebx /* pt_regs->bx */
582 /* Fix up DS and ES */
583 movl $(__KERNEL_DS), %ecx
587 /* Load the vector number into EDX */
588 movl PT_GS(%esp), %edx
590 /* Load GS into pt_regs->gs and clear high bits */
591 movw %gs, PT_GS(%esp)
592 movw $0, PT_GS+2(%esp)
594 movl %esp, %eax /* args are pt_regs (EAX), trapnr (EDX) */
595 call early_fixup_exception
597 popl %ebx /* pt_regs->bx */
598 popl %ecx /* pt_regs->cx */
599 popl %edx /* pt_regs->dx */
600 popl %esi /* pt_regs->si */
601 popl %edi /* pt_regs->di */
602 popl %ebp /* pt_regs->bp */
603 popl %eax /* pt_regs->ax */
604 popl %ds /* pt_regs->ds */
605 popl %es /* pt_regs->es */
606 popl %fs /* pt_regs->fs */
607 popl %gs /* pt_regs->gs */
608 decl %ss:early_recursion_flag
609 addl $4, %esp /* pop pt_regs->orig_ax */
611 ENDPROC(early_idt_handler_common)
613 /* This is the default interrupt "handler" :-) */
623 movl $(__KERNEL_DS),%eax
626 cmpl $2,early_recursion_flag
628 incl early_recursion_flag
653 GLOBAL(early_recursion_flag)
659 .long i386_start_kernel
660 ENTRY(setup_once_ref)
668 #ifdef CONFIG_X86_PAE
672 .globl initial_page_table
678 .globl empty_zero_page
681 .globl swapper_pg_dir
684 EXPORT_SYMBOL(empty_zero_page)
687 * This starts the data section.
689 #ifdef CONFIG_X86_PAE
691 /* Page-aligned for the benefit of paravirt? */
693 ENTRY(initial_page_table)
694 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */
696 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
697 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
698 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0
701 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
702 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
706 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
708 # error "Kernel PMDs should be 1, 2 or 3"
710 .align PAGE_SIZE /* needs to be page-sized too */
717 * The SIZEOF_PTREGS gap is a convention which helps the in-kernel
718 * unwinder reliably detect the end of the stack.
720 .long init_thread_union + THREAD_SIZE - SIZEOF_PTREGS - \
721 TOP_OF_KERNEL_STACK_PADDING;
725 .asciz "Unknown interrupt or fault at: %p %p %p\n"
727 #include "../../x86/xen/xen-head.S"
730 * The IDT and GDT 'descriptors' are a strange 48-bit object
731 * only used by the lidt and lgdt instructions. They are not
732 * like usual segment descriptors - they consist of a 16-bit
733 * segment size, and 32-bit linear address value:
737 .globl boot_gdt_descr
741 # early boot GDT descriptor (must use 1:1 address mapping)
742 .word 0 # 32 bit align gdt_desc.address
745 .long boot_gdt - __PAGE_OFFSET
747 .word 0 # 32-bit align idt_desc.address
749 .word IDT_ENTRIES*8-1 # idt contains 256 entries
752 # boot GDT descriptor (later on used by CPU#0):
753 .word 0 # 32 bit align gdt_desc.address
754 ENTRY(early_gdt_descr)
755 .word GDT_ENTRIES*8-1
756 .long gdt_page /* Overwritten for secondary CPUs */
759 * The boot_gdt must mirror the equivalent in setup.S and is
760 * used only for booting.
762 .align L1_CACHE_BYTES
764 .fill GDT_ENTRY_BOOT_CS,8,0
765 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
766 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */