2 * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - http://www.ti.com
5 * Jyri Sarha <jsarha@ti.com>
6 * Sergej Sawazki <ce3a@gmx.de>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Gpio controlled clock implementation
15 #include <linux/clk-provider.h>
16 #include <linux/export.h>
17 #include <linux/slab.h>
18 #include <linux/gpio.h>
19 #include <linux/gpio/consumer.h>
20 #include <linux/of_gpio.h>
21 #include <linux/err.h>
22 #include <linux/device.h>
23 #include <linux/platform_device.h>
24 #include <linux/of_device.h>
27 * DOC: basic gpio gated clock which can be enabled and disabled
29 * Traits of this clock:
30 * prepare - clk_(un)prepare only ensures parent is (un)prepared
31 * enable - clk_enable and clk_disable are functional & control gpio
32 * rate - inherits rate from parent. No clk_set_rate support
33 * parent - fixed parent. No clk_set_parent support
36 static int clk_gpio_gate_enable(struct clk_hw
*hw
)
38 struct clk_gpio
*clk
= to_clk_gpio(hw
);
40 gpiod_set_value(clk
->gpiod
, 1);
45 static void clk_gpio_gate_disable(struct clk_hw
*hw
)
47 struct clk_gpio
*clk
= to_clk_gpio(hw
);
49 gpiod_set_value(clk
->gpiod
, 0);
52 static int clk_gpio_gate_is_enabled(struct clk_hw
*hw
)
54 struct clk_gpio
*clk
= to_clk_gpio(hw
);
56 return gpiod_get_value(clk
->gpiod
);
59 const struct clk_ops clk_gpio_gate_ops
= {
60 .enable
= clk_gpio_gate_enable
,
61 .disable
= clk_gpio_gate_disable
,
62 .is_enabled
= clk_gpio_gate_is_enabled
,
64 EXPORT_SYMBOL_GPL(clk_gpio_gate_ops
);
67 * DOC: basic clock multiplexer which can be controlled with a gpio output
68 * Traits of this clock:
69 * prepare - clk_prepare only ensures that parents are prepared
70 * rate - rate is only affected by parent switching. No clk_set_rate support
71 * parent - parent is adjustable through clk_set_parent
74 static u8
clk_gpio_mux_get_parent(struct clk_hw
*hw
)
76 struct clk_gpio
*clk
= to_clk_gpio(hw
);
78 return gpiod_get_value(clk
->gpiod
);
81 static int clk_gpio_mux_set_parent(struct clk_hw
*hw
, u8 index
)
83 struct clk_gpio
*clk
= to_clk_gpio(hw
);
85 gpiod_set_value(clk
->gpiod
, index
);
90 const struct clk_ops clk_gpio_mux_ops
= {
91 .get_parent
= clk_gpio_mux_get_parent
,
92 .set_parent
= clk_gpio_mux_set_parent
,
93 .determine_rate
= __clk_mux_determine_rate
,
95 EXPORT_SYMBOL_GPL(clk_gpio_mux_ops
);
97 static struct clk_hw
*clk_register_gpio(struct device
*dev
, const char *name
,
98 const char * const *parent_names
, u8 num_parents
, unsigned gpio
,
99 bool active_low
, unsigned long flags
,
100 const struct clk_ops
*clk_gpio_ops
)
102 struct clk_gpio
*clk_gpio
;
104 struct clk_init_data init
= {};
105 unsigned long gpio_flags
;
109 clk_gpio
= devm_kzalloc(dev
, sizeof(*clk_gpio
), GFP_KERNEL
);
111 clk_gpio
= kzalloc(sizeof(*clk_gpio
), GFP_KERNEL
);
114 return ERR_PTR(-ENOMEM
);
117 gpio_flags
= GPIOF_ACTIVE_LOW
| GPIOF_OUT_INIT_HIGH
;
119 gpio_flags
= GPIOF_OUT_INIT_LOW
;
122 err
= devm_gpio_request_one(dev
, gpio
, gpio_flags
, name
);
124 err
= gpio_request_one(gpio
, gpio_flags
, name
);
126 if (err
!= -EPROBE_DEFER
)
127 pr_err("%s: %s: Error requesting clock control gpio %u\n",
128 __func__
, name
, gpio
);
136 init
.ops
= clk_gpio_ops
;
137 init
.flags
= flags
| CLK_IS_BASIC
;
138 init
.parent_names
= parent_names
;
139 init
.num_parents
= num_parents
;
141 clk_gpio
->gpiod
= gpio_to_desc(gpio
);
142 clk_gpio
->hw
.init
= &init
;
146 err
= devm_clk_hw_register(dev
, hw
);
148 err
= clk_hw_register(NULL
, hw
);
154 gpiod_put(clk_gpio
->gpiod
);
162 * clk_hw_register_gpio_gate - register a gpio clock gate with the clock
164 * @dev: device that is registering this clock
165 * @name: name of this clock
166 * @parent_name: name of this clock's parent
167 * @gpio: gpio number to gate this clock
168 * @active_low: true if gpio should be set to 0 to enable clock
169 * @flags: clock flags
171 struct clk_hw
*clk_hw_register_gpio_gate(struct device
*dev
, const char *name
,
172 const char *parent_name
, unsigned gpio
, bool active_low
,
175 return clk_register_gpio(dev
, name
,
176 (parent_name
? &parent_name
: NULL
),
177 (parent_name
? 1 : 0), gpio
, active_low
, flags
,
180 EXPORT_SYMBOL_GPL(clk_hw_register_gpio_gate
);
182 struct clk
*clk_register_gpio_gate(struct device
*dev
, const char *name
,
183 const char *parent_name
, unsigned gpio
, bool active_low
,
188 hw
= clk_hw_register_gpio_gate(dev
, name
, parent_name
, gpio
, active_low
,
194 EXPORT_SYMBOL_GPL(clk_register_gpio_gate
);
197 * clk_hw_register_gpio_mux - register a gpio clock mux with the clock framework
198 * @dev: device that is registering this clock
199 * @name: name of this clock
200 * @parent_names: names of this clock's parents
201 * @num_parents: number of parents listed in @parent_names
202 * @gpio: gpio number to gate this clock
203 * @active_low: true if gpio should be set to 0 to enable clock
204 * @flags: clock flags
206 struct clk_hw
*clk_hw_register_gpio_mux(struct device
*dev
, const char *name
,
207 const char * const *parent_names
, u8 num_parents
, unsigned gpio
,
208 bool active_low
, unsigned long flags
)
210 if (num_parents
!= 2) {
211 pr_err("mux-clock %s must have 2 parents\n", name
);
212 return ERR_PTR(-EINVAL
);
215 return clk_register_gpio(dev
, name
, parent_names
, num_parents
,
216 gpio
, active_low
, flags
, &clk_gpio_mux_ops
);
218 EXPORT_SYMBOL_GPL(clk_hw_register_gpio_mux
);
220 struct clk
*clk_register_gpio_mux(struct device
*dev
, const char *name
,
221 const char * const *parent_names
, u8 num_parents
, unsigned gpio
,
222 bool active_low
, unsigned long flags
)
226 hw
= clk_hw_register_gpio_mux(dev
, name
, parent_names
, num_parents
,
227 gpio
, active_low
, flags
);
232 EXPORT_SYMBOL_GPL(clk_register_gpio_mux
);
234 static int gpio_clk_driver_probe(struct platform_device
*pdev
)
236 struct device_node
*node
= pdev
->dev
.of_node
;
237 const char **parent_names
, *gpio_name
;
238 unsigned int num_parents
;
240 enum of_gpio_flags of_flags
;
242 bool active_low
, is_mux
;
244 num_parents
= of_clk_get_parent_count(node
);
246 parent_names
= devm_kcalloc(&pdev
->dev
, num_parents
,
247 sizeof(char *), GFP_KERNEL
);
251 of_clk_parent_fill(node
, parent_names
, num_parents
);
256 is_mux
= of_device_is_compatible(node
, "gpio-mux-clock");
258 gpio_name
= is_mux
? "select-gpios" : "enable-gpios";
259 gpio
= of_get_named_gpio_flags(node
, gpio_name
, 0, &of_flags
);
261 if (gpio
== -EPROBE_DEFER
)
262 pr_debug("%s: %s: GPIOs not yet available, retry later\n",
263 node
->name
, __func__
);
265 pr_err("%s: %s: Can't get '%s' DT property\n",
266 node
->name
, __func__
,
271 active_low
= of_flags
& OF_GPIO_ACTIVE_LOW
;
274 clk
= clk_register_gpio_mux(&pdev
->dev
, node
->name
,
275 parent_names
, num_parents
, gpio
, active_low
, 0);
277 clk
= clk_register_gpio_gate(&pdev
->dev
, node
->name
,
278 parent_names
? parent_names
[0] : NULL
, gpio
,
283 return of_clk_add_provider(node
, of_clk_src_simple_get
, clk
);
286 static const struct of_device_id gpio_clk_match_table
[] = {
287 { .compatible
= "gpio-mux-clock" },
288 { .compatible
= "gpio-gate-clock" },
292 static struct platform_driver gpio_clk_driver
= {
293 .probe
= gpio_clk_driver_probe
,
296 .of_match_table
= gpio_clk_match_table
,
299 builtin_platform_driver(gpio_clk_driver
);