1 Freescale Synchronous Audio Interface (SAI).
3 The SAI is based on I2S module that used communicating with audio codecs,
4 which provides a synchronous audio interface that supports fullduplex
5 serial interfaces with frame synchronization such as I2S, AC97, TDM, and
10 - compatible : Compatible list, contains "fsl,vf610-sai" or
13 - reg : Offset and length of the register set for the device.
15 - clocks : Must contain an entry for each entry in clock-names.
17 - clock-names : Must include the "bus" for register access and
18 "mclk1", "mclk2", "mclk3" for bit clock and frame
20 - dmas : Generic dma devicetree binding as described in
21 Documentation/devicetree/bindings/dma/dma.txt.
23 - dma-names : Two dmas have to be defined, "tx" and "rx".
25 - pinctrl-names : Must contain a "default" entry.
27 - pinctrl-NNN : One property must exist for each entry in
28 pinctrl-names. See ../pinctrl/pinctrl-bindings.txt
29 for details of the property values.
31 - big-endian : Boolean property, required if all the FTM_PWM
32 registers are big-endian rather than little-endian.
34 - lsb-first : Configures whether the LSB or the MSB is transmitted
35 first for the fifo data. If this property is absent,
36 the MSB is transmitted first as default, or the LSB
39 - fsl,sai-synchronous-rx: This is a boolean property. If present, indicating
40 that SAI will work in the synchronous mode (sync Tx
41 with Rx) which means both the transimitter and the
42 receiver will send and receive data by following
43 receiver's bit clocks and frame sync clocks.
45 - fsl,sai-asynchronous: This is a boolean property. If present, indicating
46 that SAI will work in the asynchronous mode, which
47 means both transimitter and receiver will send and
48 receive data by following their own bit clocks and
49 frame sync clocks separately.
52 - If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the
53 default synchronous mode (sync Rx with Tx) will be used, which means both
54 transimitter and receiver will send and receive data by following clocks
56 - fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive.
60 compatible = "fsl,vf610-sai";
61 reg = <0x40031000 0x1000>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&pinctrl_sai2_1>;
64 clocks = <&clks VF610_CLK_PLATFORM_BUS>,
65 <&clks VF610_CLK_SAI2>,
67 clock-names = "bus", "mclk1", "mclk2", "mclk3";
68 dma-names = "tx", "rx";
69 dmas = <&edma0 0 VF610_EDMA_MUXID0_SAI2_TX>,
70 <&edma0 0 VF610_EDMA_MUXID0_SAI2_RX>;