arch/arm/mach-mediatek/platsmp.c

   1 /*
   2  * arch/arm/mach-mediatek/platsmp.c
   3  *
   4  * Copyright (c) 2014 Mediatek Inc.
   5  * Author: Shunli Wang <shunli.wang@mediatek.com>
   6  *         Yingjoe Chen <yingjoe.chen@mediatek.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  */
  18 #include <linux/io.h>
  19 #include <linux/memblock.h>
  20 #include <linux/of.h>
  21 #include <linux/of_address.h>
  22 #include <linux/string.h>
  23 #include <linux/threads.h>
  24
  25 #define MTK_MAX_CPU             8
  26 #define MTK_SMP_REG_SIZE        0x1000
  27
  28 struct mtk_smp_boot_info {
  29         unsigned long smp_base;
  30         unsigned int jump_reg;
  31         unsigned int core_keys[MTK_MAX_CPU - 1];
  32         unsigned int core_regs[MTK_MAX_CPU - 1];
  33 };
  34
  35 static const struct mtk_smp_boot_info mtk_mt8135_tz_boot = {
  36         0x80002000, 0x3fc,
  37         { 0x534c4131, 0x4c415332, 0x41534c33 },
  38         { 0x3f8, 0x3f8, 0x3f8 },
  39 };
  40
  41 static const struct mtk_smp_boot_info mtk_mt6589_boot = {
  42         0x10002000, 0x34,
  43         { 0x534c4131, 0x4c415332, 0x41534c33 },
  44         { 0x38, 0x3c, 0x40 },
  45 };
  46
  47 static const struct mtk_smp_boot_info mtk_mt7623_boot = {
  48         0x10202000, 0x34,
  49         { 0x534c4131, 0x4c415332, 0x41534c33 },
  50         { 0x38, 0x3c, 0x40 },
  51 };
  52
  53 static const struct of_device_id mtk_tz_smp_boot_infos[] __initconst = {
  54         { .compatible   = "mediatek,mt8135", .data = &mtk_mt8135_tz_boot },
  55         { .compatible   = "mediatek,mt8127", .data = &mtk_mt8135_tz_boot },
  56         { .compatible   = "mediatek,mt2701", .data = &mtk_mt8135_tz_boot },
  57         {},
  58 };
  59
  60 static const struct of_device_id mtk_smp_boot_infos[] __initconst = {
  61         { .compatible   = "mediatek,mt6589", .data = &mtk_mt6589_boot },
  62         { .compatible   = "mediatek,mt7623", .data = &mtk_mt7623_boot },
  63         { .compatible   = "mediatek,mt7623a", .data = &mtk_mt7623_boot },
  64         {},
  65 };
  66
  67 static void __iomem *mtk_smp_base;
  68 static const struct mtk_smp_boot_info *mtk_smp_info;
  69
  70 static int mtk_boot_secondary(unsigned int cpu, struct task_struct *idle)
  71 {
  72         if (!mtk_smp_base)
  73                 return -EINVAL;
  74
  75         if (!mtk_smp_info->core_keys[cpu-1])
  76                 return -EINVAL;
  77
  78         writel_relaxed(mtk_smp_info->core_keys[cpu-1],
  79                 mtk_smp_base + mtk_smp_info->core_regs[cpu-1]);
  80
  81         arch_send_wakeup_ipi_mask(cpumask_of(cpu));
  82
  83         return 0;
  84 }
  85
  86 static void __init __mtk_smp_prepare_cpus(unsigned int max_cpus, int trustzone)
  87 {
  88         int i, num;
  89         const struct of_device_id *infos;
  90
  91         if (trustzone) {
  92                 num = ARRAY_SIZE(mtk_tz_smp_boot_infos);
  93                 infos = mtk_tz_smp_boot_infos;
  94         } else {
  95                 num = ARRAY_SIZE(mtk_smp_boot_infos);
  96                 infos = mtk_smp_boot_infos;
  97         }
  98
  99         /* Find smp boot info for this SoC */
 100         for (i = 0; i < num; i++) {
 101                 if (of_machine_is_compatible(infos[i].compatible)) {
 102                         mtk_smp_info = infos[i].data;
 103                         break;
 104                 }
 105         }
 106
 107         if (!mtk_smp_info) {
 108                 pr_err("%s: Device is not supported\n", __func__);
 109                 return;
 110         }
 111
 112         if (trustzone) {
 113                 /* smp_base(trustzone-bootinfo) is reserved by device tree */
 114                 mtk_smp_base = phys_to_virt(mtk_smp_info->smp_base);
 115         } else {
 116                 mtk_smp_base = ioremap(mtk_smp_info->smp_base, MTK_SMP_REG_SIZE);
 117                 if (!mtk_smp_base) {
 118                         pr_err("%s: Can't remap %lx\n", __func__,
 119                                 mtk_smp_info->smp_base);
 120                         return;
 121                 }
 122         }
 123
 124         /*
 125          * write the address of slave startup address into the system-wide
 126          * jump register
 127          */
 128         writel_relaxed(__pa_symbol(secondary_startup_arm),
 129                         mtk_smp_base + mtk_smp_info->jump_reg);
 130 }
 131
 132 static void __init mtk_tz_smp_prepare_cpus(unsigned int max_cpus)
 133 {
 134         __mtk_smp_prepare_cpus(max_cpus, 1);
 135 }
 136
 137 static void __init mtk_smp_prepare_cpus(unsigned int max_cpus)
 138 {
 139         __mtk_smp_prepare_cpus(max_cpus, 0);
 140 }
 141
 142 static const struct smp_operations mt81xx_tz_smp_ops __initconst = {
 143         .smp_prepare_cpus = mtk_tz_smp_prepare_cpus,
 144         .smp_boot_secondary = mtk_boot_secondary,
 145 };
 146 CPU_METHOD_OF_DECLARE(mt81xx_tz_smp, "mediatek,mt81xx-tz-smp", &mt81xx_tz_smp_ops);
 147
 148 static const struct smp_operations mt6589_smp_ops __initconst = {
 149         .smp_prepare_cpus = mtk_smp_prepare_cpus,
 150         .smp_boot_secondary = mtk_boot_secondary,
 151 };
 152 CPU_METHOD_OF_DECLARE(mt6589_smp, "mediatek,mt6589-smp", &mt6589_smp_ops);