drivers/usb/host/xhci-pci.c

   1 /*
   2  * xHCI host controller driver PCI Bus Glue.
   3  *
   4  * Copyright (C) 2008 Intel Corp.
   5  *
   6  * Author: Sarah Sharp
   7  * Some code borrowed from the Linux EHCI driver.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/pci.h>
  24 #include <linux/slab.h>
  25 #include <linux/module.h>
  26
  27 #include "xhci.h"
  28
  29 /* Device for a quirk */
  30 #define PCI_VENDOR_ID_FRESCO_LOGIC      0x1b73
  31 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK  0x1000
  32 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400       0x1400
  33
  34 #define PCI_VENDOR_ID_ETRON             0x1b6f
  35 #define PCI_DEVICE_ID_ASROCK_P67        0x7023
  36
  37 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI      0x8c31
  38 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI   0x9c31
  39 #define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI             0x22b5
  40 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI         0xa12f
  41 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI        0x9d2f
  42
  43 static const char hcd_name[] = "xhci_hcd";
  44
  45 /* called after powerup, by probe or system-pm "wakeup" */
  46 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
  47 {
  48         /*
  49          * TODO: Implement finding debug ports later.
  50          * TODO: see if there are any quirks that need to be added to handle
  51          * new extended capabilities.
  52          */
  53
  54         /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
  55         if (!pci_set_mwi(pdev))
  56                 xhci_dbg(xhci, "MWI active\n");
  57
  58         xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
  59         return 0;
  60 }
  61
  62 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
  63 {
  64         struct pci_dev          *pdev = to_pci_dev(dev);
  65
  66         /* Look for vendor-specific quirks */
  67         if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
  68                         (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
  69                          pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
  70                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
  71                                 pdev->revision == 0x0) {
  72                         xhci->quirks |= XHCI_RESET_EP_QUIRK;
  73                         xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
  74                                         " endpoint cmd after reset endpoint\n");
  75                 }
  76                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
  77                                 pdev->revision == 0x4) {
  78                         xhci->quirks |= XHCI_SLOW_SUSPEND;
  79                         xhci_dbg(xhci,
  80                                 "QUIRK: Fresco Logic xHC revision %u"
  81                                 "must be suspended extra slowly",
  82                                 pdev->revision);
  83                 }
  84                 /* Fresco Logic confirms: all revisions of this chip do not
  85                  * support MSI, even though some of them claim to in their PCI
  86                  * capabilities.
  87                  */
  88                 xhci->quirks |= XHCI_BROKEN_MSI;
  89                 xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u "
  90                                 "has broken MSI implementation\n",
  91                                 pdev->revision);
  92                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
  93         }
  94
  95         if (pdev->vendor == PCI_VENDOR_ID_NEC)
  96                 xhci->quirks |= XHCI_NEC_HOST;
  97
  98         if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
  99                 xhci->quirks |= XHCI_AMD_0x96_HOST;
 100
 101         /* AMD PLL quirk */
 102         if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
 103                 xhci->quirks |= XHCI_AMD_PLL_FIX;
 104
 105         if (pdev->vendor == PCI_VENDOR_ID_AMD)
 106                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
 107
 108         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
 109                         pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
 110                 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
 111                 xhci->limit_active_eps = 64;
 112                 xhci->quirks |= XHCI_SW_BW_CHECKING;
 113                 /*
 114                  * PPT desktop boards DH77EB and DH77DF will power back on after
 115                  * a few seconds of being shutdown.  The fix for this is to
 116                  * switch the ports from xHCI to EHCI on shutdown.  We can't use
 117                  * DMI information to find those particular boards (since each
 118                  * vendor will change the board name), so we have to key off all
 119                  * PPT chipsets.
 120                  */
 121                 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
 122                 xhci->quirks |= XHCI_AVOID_BEI;
 123         }
 124         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
 125                 (pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
 126                  pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||
 127                  pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI)) {
 128                 xhci->quirks |= XHCI_PME_STUCK_QUIRK;
 129         }
 130         if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
 131                         pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
 132                 xhci->quirks |= XHCI_RESET_ON_RESUME;
 133                 xhci_dbg(xhci, "QUIRK: Resetting on resume\n");
 134                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
 135         }
 136         if (pdev->vendor == PCI_VENDOR_ID_VIA)
 137                 xhci->quirks |= XHCI_RESET_ON_RESUME;
 138 }
 139
 140 /*
 141  * Make sure PME works on some Intel xHCI controllers by writing 1 to clear
 142  * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
 143  */
 144 static void xhci_pme_quirk(struct xhci_hcd *xhci)
 145 {
 146         u32 val;
 147         void __iomem *reg;
 148
 149         reg = (void __iomem *) xhci->cap_regs + 0x80a4;
 150         val = readl(reg);
 151         writel(val | BIT(28), reg);
 152         readl(reg);
 153 }
 154
 155 /* called during probe() after chip reset completes */
 156 static int xhci_pci_setup(struct usb_hcd *hcd)
 157 {
 158         struct xhci_hcd         *xhci;
 159         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 160         int                     retval;
 161
 162         retval = xhci_gen_setup(hcd, xhci_pci_quirks);
 163         if (retval)
 164                 return retval;
 165
 166         xhci = hcd_to_xhci(hcd);
 167         if (!usb_hcd_is_primary_hcd(hcd))
 168                 return 0;
 169
 170         pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
 171         xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
 172
 173         /* Find any debug ports */
 174         retval = xhci_pci_reinit(xhci, pdev);
 175         if (!retval)
 176                 return retval;
 177
 178         kfree(xhci);
 179         return retval;
 180 }
 181
 182 /*
 183  * We need to register our own PCI probe function (instead of the USB core's
 184  * function) in order to create a second roothub under xHCI.
 185  */
 186 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
 187 {
 188         int retval;
 189         struct xhci_hcd *xhci;
 190         struct hc_driver *driver;
 191         struct usb_hcd *hcd;
 192
 193         driver = (struct hc_driver *)id->driver_data;
 194         /* Register the USB 2.0 roothub.
 195          * FIXME: USB core must know to register the USB 2.0 roothub first.
 196          * This is sort of silly, because we could just set the HCD driver flags
 197          * to say USB 2.0, but I'm not sure what the implications would be in
 198          * the other parts of the HCD code.
 199          */
 200         retval = usb_hcd_pci_probe(dev, id);
 201
 202         if (retval)
 203                 return retval;
 204
 205         /* USB 2.0 roothub is stored in the PCI device now. */
 206         hcd = dev_get_drvdata(&dev->dev);
 207         xhci = hcd_to_xhci(hcd);
 208         xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
 209                                 pci_name(dev), hcd);
 210         if (!xhci->shared_hcd) {
 211                 retval = -ENOMEM;
 212                 goto dealloc_usb2_hcd;
 213         }
 214
 215         /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
 216          * is called by usb_add_hcd().
 217          */
 218         *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
 219
 220         retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
 221                         IRQF_SHARED);
 222         if (retval)
 223                 goto put_usb3_hcd;
 224         /* Roothub already marked as USB 3.0 speed */
 225         return 0;
 226
 227 put_usb3_hcd:
 228         usb_put_hcd(xhci->shared_hcd);
 229 dealloc_usb2_hcd:
 230         usb_hcd_pci_remove(dev);
 231         return retval;
 232 }
 233
 234 static void xhci_pci_remove(struct pci_dev *dev)
 235 {
 236         struct xhci_hcd *xhci;
 237
 238         xhci = hcd_to_xhci(pci_get_drvdata(dev));
 239         if (xhci->shared_hcd) {
 240                 usb_remove_hcd(xhci->shared_hcd);
 241                 usb_put_hcd(xhci->shared_hcd);
 242         }
 243         usb_hcd_pci_remove(dev);
 244
 245         /* Workaround for spurious wakeups at shutdown with HSW */
 246         if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
 247                 pci_set_power_state(dev, PCI_D3hot);
 248
 249         kfree(xhci);
 250 }
 251
 252 #ifdef CONFIG_PM
 253 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
 254 {
 255         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 256         int     retval = 0;
 257
 258         if (hcd->state != HC_STATE_SUSPENDED ||
 259                         xhci->shared_hcd->state != HC_STATE_SUSPENDED)
 260                 return -EINVAL;
 261
 262         if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
 263                 xhci_pme_quirk(xhci);
 264
 265         retval = xhci_suspend(xhci, do_wakeup);
 266
 267         return retval;
 268 }
 269
 270 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
 271 {
 272         struct xhci_hcd         *xhci = hcd_to_xhci(hcd);
 273         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 274         int                     retval = 0;
 275
 276         /* The BIOS on systems with the Intel Panther Point chipset may or may
 277          * not support xHCI natively.  That means that during system resume, it
 278          * may switch the ports back to EHCI so that users can use their
 279          * keyboard to select a kernel from GRUB after resume from hibernate.
 280          *
 281          * The BIOS is supposed to remember whether the OS had xHCI ports
 282          * enabled before resume, and switch the ports back to xHCI when the
 283          * BIOS/OS semaphore is written, but we all know we can't trust BIOS
 284          * writers.
 285          *
 286          * Unconditionally switch the ports back to xHCI after a system resume.
 287          * We can't tell whether the EHCI or xHCI controller will be resumed
 288          * first, so we have to do the port switchover in both drivers.  Writing
 289          * a '1' to the port switchover registers should have no effect if the
 290          * port was already switched over.
 291          */
 292         if (usb_is_intel_switchable_xhci(pdev))
 293                 usb_enable_xhci_ports(pdev);
 294
 295         if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
 296                 xhci_pme_quirk(xhci);
 297
 298         retval = xhci_resume(xhci, hibernated);
 299         return retval;
 300 }
 301 #endif /* CONFIG_PM */
 302
 303 static const struct hc_driver xhci_pci_hc_driver = {
 304         .description =          hcd_name,
 305         .product_desc =         "xHCI Host Controller",
 306         .hcd_priv_size =        sizeof(struct xhci_hcd *),
 307
 308         /*
 309          * generic hardware linkage
 310          */
 311         .irq =                  xhci_irq,
 312         .flags =                HCD_MEMORY | HCD_USB3 | HCD_SHARED,
 313
 314         /*
 315          * basic lifecycle operations
 316          */
 317         .reset =                xhci_pci_setup,
 318         .start =                xhci_run,
 319 #ifdef CONFIG_PM
 320         .pci_suspend =          xhci_pci_suspend,
 321         .pci_resume =           xhci_pci_resume,
 322 #endif
 323         .stop =                 xhci_stop,
 324         .shutdown =             xhci_shutdown,
 325
 326         /*
 327          * managing i/o requests and associated device resources
 328          */
 329         .urb_enqueue =          xhci_urb_enqueue,
 330         .urb_dequeue =          xhci_urb_dequeue,
 331         .alloc_dev =            xhci_alloc_dev,
 332         .free_dev =             xhci_free_dev,
 333         .alloc_streams =        xhci_alloc_streams,
 334         .free_streams =         xhci_free_streams,
 335         .add_endpoint =         xhci_add_endpoint,
 336         .drop_endpoint =        xhci_drop_endpoint,
 337         .endpoint_reset =       xhci_endpoint_reset,
 338         .check_bandwidth =      xhci_check_bandwidth,
 339         .reset_bandwidth =      xhci_reset_bandwidth,
 340         .address_device =       xhci_address_device,
 341         .update_hub_device =    xhci_update_hub_device,
 342         .reset_device =         xhci_discover_or_reset_device,
 343
 344         /*
 345          * scheduling support
 346          */
 347         .get_frame_number =     xhci_get_frame,
 348
 349         /* Root hub support */
 350         .hub_control =          xhci_hub_control,
 351         .hub_status_data =      xhci_hub_status_data,
 352         .bus_suspend =          xhci_bus_suspend,
 353         .bus_resume =           xhci_bus_resume,
 354         /*
 355          * call back when device connected and addressed
 356          */
 357         .update_device =        xhci_update_device,
 358         .set_usb2_hw_lpm =      xhci_set_usb2_hardware_lpm,
 359 };
 360
 361 /*-------------------------------------------------------------------------*/
 362
 363 /* PCI driver selection metadata; PCI hotplugging uses this */
 364 static const struct pci_device_id pci_ids[] = { {
 365         /* handle any USB 3.0 xHCI controller */
 366         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
 367         .driver_data =  (unsigned long) &xhci_pci_hc_driver,
 368         },
 369         { /* end: all zeroes */ }
 370 };
 371 MODULE_DEVICE_TABLE(pci, pci_ids);
 372
 373 /* pci driver glue; this is a "new style" PCI driver module */
 374 static struct pci_driver xhci_pci_driver = {
 375         .name =         (char *) hcd_name,
 376         .id_table =     pci_ids,
 377
 378         .probe =        xhci_pci_probe,
 379         .remove =       xhci_pci_remove,
 380         /* suspend and resume implemented later */
 381
 382         .shutdown =     usb_hcd_pci_shutdown,
 383 #ifdef CONFIG_PM
 384         .driver = {
 385                 .pm = &usb_hcd_pci_pm_ops
 386         },
 387 #endif
 388 };
 389
 390 int __init xhci_register_pci(void)
 391 {
 392         return pci_register_driver(&xhci_pci_driver);
 393 }
 394
 395 void __exit xhci_unregister_pci(void)
 396 {
 397         pci_unregister_driver(&xhci_pci_driver);
 398 }