1 # SPDX-License-Identifier: GPL-2.0-only
4 select ARCH_32BIT_OFF_T
6 select ARCH_HAS_BINFMT_FLAT if !MMU
7 select ARCH_HAS_DMA_COHERENT_TO_PFN if MMU
8 select ARCH_HAS_GCOV_PROFILE_ALL
9 select ARCH_HAS_SYNC_DMA_FOR_CPU
10 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
11 select ARCH_MIGHT_HAVE_PC_PARPORT
12 select ARCH_NO_COHERENT_DMA_MMAP if !MMU
13 select ARCH_WANT_IPC_PARSE_VERSION
14 select BUILDTIME_EXTABLE_SORT
16 select CLONE_BACKWARDS3
18 select GENERIC_ATOMIC64
19 select GENERIC_CLOCKEVENTS
20 select GENERIC_CPU_DEVICES
21 select GENERIC_IDLE_POLL_SETUP
22 select GENERIC_IRQ_PROBE
23 select GENERIC_IRQ_SHOW
24 select GENERIC_PCI_IOMAP
25 select GENERIC_SCHED_CLOCK
28 select HAVE_DEBUG_KMEMLEAK
29 select HAVE_DYNAMIC_FTRACE
30 select HAVE_FTRACE_MCOUNT_RECORD
31 select HAVE_FUNCTION_GRAPH_TRACER
32 select HAVE_FUNCTION_TRACER
33 select HAVE_MEMBLOCK_NODE_MAP
38 select MODULES_USE_ELF_RELA
40 select OF_EARLY_FLATTREE
41 select PCI_DOMAINS_GENERIC if PCI
42 select PCI_SYSCALL if PCI
43 select TRACING_SUPPORT
45 select CPU_NO_EFFICIENT_FFS
46 select MMU_GATHER_NO_RANGE if MMU
48 # Endianness selection
50 prompt "Endianness selection"
51 default CPU_LITTLE_ENDIAN
53 microblaze architectures can be configured for either little or
54 big endian formats. Be sure to select the appropriate mode.
59 config CPU_LITTLE_ENDIAN
67 config ARCH_HAS_ILOG2_U32
70 config ARCH_HAS_ILOG2_U64
73 config GENERIC_HWEIGHT
76 config GENERIC_CALIBRATE_DELAY
82 config STACKTRACE_SUPPORT
85 config LOCKDEP_SUPPORT
88 source "arch/microblaze/Kconfig.platform"
90 menu "Processor type and features"
92 source "kernel/Kconfig.hz"
98 comment "Boot options"
101 bool "Default bootloader kernel arguments"
104 string "Default kernel command string"
105 depends on CMDLINE_BOOL
106 default "console=ttyUL0,115200"
108 On some architectures there is currently no way for the boot loader
109 to pass arguments to the kernel. For these architectures, you should
110 supply some command-line options at build time by entering them
114 bool "Force default kernel command string"
115 depends on CMDLINE_BOOL
118 Set this to have arguments from the default kernel command string
119 override those passed by the boot loader.
122 bool "Enable seccomp to safely compute untrusted bytecode"
126 This kernel feature is useful for number crunching applications
127 that may need to compute untrusted bytecode during their
128 execution. By using pipes or other transports made available to
129 the process as file descriptors supporting the read/write
130 syscalls, it's possible to isolate those applications in
131 their own address space using seccomp. Once seccomp is
132 enabled via /proc/<pid>/seccomp, it cannot be disabled
133 and the task is only allowed to execute a few safe syscalls
134 defined by each seccomp mode.
136 If unsure, say Y. Only embedded should say N here.
140 menu "Kernel features"
146 config ADVANCED_OPTIONS
147 bool "Prompt for advanced kernel configuration options"
149 This option will enable prompting for a variety of advanced kernel
150 configuration options. These options can cause the kernel to not
151 work if they are set incorrectly, but can be used to optimize certain
152 aspects of kernel memory management.
154 Unless you know what you are doing, say N here.
156 comment "Default settings for advanced configuration options are used"
157 depends on !ADVANCED_OPTIONS
159 config XILINX_UNCACHED_SHADOW
160 bool "Are you using uncached shadow for RAM ?"
161 depends on ADVANCED_OPTIONS && !MMU
164 This is needed to be able to allocate uncachable memory regions.
165 The feature requires the design to define the RAM memory controller
166 window to be twice as large as the actual physical memory.
169 bool "High memory support"
172 The address space of Microblaze processors is only 4 Gigabytes large
173 and it has to accommodate user address space, kernel address
174 space as well as some memory mapped IO. That means that, if you
175 have a large amount of physical memory and/or IO, not all of the
176 memory can be "permanently mapped" by the kernel. The physical
177 memory that is not permanently mapped is called "high memory".
181 config LOWMEM_SIZE_BOOL
182 bool "Set maximum low memory"
183 depends on ADVANCED_OPTIONS && MMU
185 This option allows you to set the maximum amount of memory which
186 will be used as "low memory", that is, memory which the kernel can
187 access directly, without having to set up a kernel virtual mapping.
188 This can be useful in optimizing the layout of kernel virtual
191 Say N here unless you know what you are doing.
194 hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL
197 config MANUAL_RESET_VECTOR
198 hex "Microblaze reset vector address setup"
201 Set this option to have the kernel override the CPU Reset vector.
202 If zero, no change will be made to the MicroBlaze reset vector at
204 If non-zero, a jump instruction to this address, will be written
205 to the reset vector at address 0x0.
206 If you are unsure, set it to default value 0x0.
208 config KERNEL_START_BOOL
209 bool "Set custom kernel base address"
210 depends on ADVANCED_OPTIONS
212 This option allows you to set the kernel virtual address at which
213 the kernel will map low memory (the kernel image will be linked at
214 this address). This can be useful in optimizing the virtual memory
215 layout of the system.
217 Say N here unless you know what you are doing.
220 hex "Virtual address of kernel base" if KERNEL_START_BOOL
221 default "0xc0000000" if MMU
222 default KERNEL_BASE_ADDR if !MMU
224 config TASK_SIZE_BOOL
225 bool "Set custom user task size"
226 depends on ADVANCED_OPTIONS && MMU
228 This option allows you to set the amount of virtual address space
229 allocated to user tasks. This can be useful in optimizing the
230 virtual memory layout of the system.
232 Say N here unless you know what you are doing.
235 hex "Size of user task space" if TASK_SIZE_BOOL
240 default MICROBLAZE_4K_PAGES
241 depends on ADVANCED_OPTIONS && !MMU
243 Select the kernel logical page size. Increasing the page size
244 will reduce software overhead at each page boundary, allow
245 hardware prefetch mechanisms to be more effective, and allow
246 larger dma transfers increasing IO efficiency and reducing
247 overhead. However the utilization of memory will increase.
248 For example, each cached file will using a multiple of the
249 page size to hold its contents and the difference between the
250 end of file and the end of page is wasted.
252 If unsure, choose 4K_PAGES.
254 config MICROBLAZE_4K_PAGES
257 config MICROBLAZE_16K_PAGES
260 config MICROBLAZE_64K_PAGES
270 bool "Xilinx PCI host bridge support"