1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ASM_SH_MMU_CONTEXT_64_H
3 #define __ASM_SH_MMU_CONTEXT_64_H
6 * sh64-specific mmu_context interface.
8 * Copyright (C) 2000, 2001 Paolo Alberelli
9 * Copyright (C) 2003 - 2007 Paul Mundt
11 #include <cpu/registers.h>
12 #include <asm/cacheflush.h>
14 #define SR_ASID_MASK 0xffffffffff00ffffULL
15 #define SR_ASID_SHIFT 16
18 * Destroy context related info for an mm_struct that is about
21 static inline void destroy_context(struct mm_struct
*mm
)
23 /* Well, at least free TLB entries */
27 static inline unsigned long get_asid(void)
29 unsigned long long sr
;
31 asm volatile ("getcon " __SR
", %0\n\t"
34 sr
= (sr
>> SR_ASID_SHIFT
) & MMU_CONTEXT_ASID_MASK
;
35 return (unsigned long) sr
;
38 /* Set ASID into SR */
39 static inline void set_asid(unsigned long asid
)
41 unsigned long long sr
, pc
;
43 asm volatile ("getcon " __SR
", %0" : "=r" (sr
));
45 sr
= (sr
& SR_ASID_MASK
) | (asid
<< SR_ASID_SHIFT
);
48 * It is possible that this function may be inlined and so to avoid
49 * the assembler reporting duplicate symbols we make use of the
50 * gas trick of generating symbols using numerics and forward
53 asm volatile ("movi 1, %1\n\t"
54 "shlli %1, 28, %1\n\t"
56 "putcon %1, " __SR
"\n\t"
57 "putcon %0, " __SSR
"\n\t"
60 "putcon %1, " __SPC
"\n\t"
63 : "=r" (sr
), "=r" (pc
) : "0" (sr
));
66 /* arch/sh/kernel/cpu/sh5/entry.S */
67 extern unsigned long switch_and_save_asid(unsigned long new_asid
);
69 /* No spare register to twiddle, so use a software cache */
70 extern pgd_t
*mmu_pdtp_cache
;
72 #define set_TTB(pgd) (mmu_pdtp_cache = (pgd))
73 #define get_TTB() (mmu_pdtp_cache)
75 #endif /* __ASM_SH_MMU_CONTEXT_64_H */