| blob | 4180f8b20374737175316b62d5263674bf8be5d9 |
1 /* -*- mode: asm -*-
2 **
3 ** head.S -- This file contains the initial boot code for the
4 ** Linux/68k kernel.
5 **
6 ** Copyright 1993 by Hamish Macdonald
7 **
8 ** 68040 fixes by Michael Rausch
9 ** 68060 fixes by Roman Hodek
10 ** MMU cleanup by Randy Thelen
11 ** Final MMU cleanup by Roman Zippel
12 **
13 ** Atari support by Andreas Schwab, using ideas of Robert de Vries
14 ** and Bjoern Brauel
15 ** VME Support by Richard Hirst
16 **
17 ** 94/11/14 Andreas Schwab: put kernel at PAGESIZE
18 ** 94/11/18 Andreas Schwab: remove identity mapping of STRAM for Atari
19 ** ++ Bjoern & Roman: ATARI-68040 support for the Medusa
20 ** 95/11/18 Richard Hirst: Added MVME166 support
21 ** 96/04/26 Guenther Kelleter: fixed identity mapping for Falcon with
22 ** Magnum- and FX-alternate ram
23 ** 98/04/25 Phil Blundell: added HP300 support
24 ** 1998/08/30 David Kilzer: Added support for font_desc structures
25 ** for linux-2.1.115
26 ** 9/02/11 Richard Zidlicky: added Q40 support (initial vesion 99/01/01)
27 ** 2004/05/13 Kars de Jong: Finalised HP300 support
28 **
29 ** This file is subject to the terms and conditions of the GNU General Public
30 ** License. See the file README.legal in the main directory of this archive
31 ** for more details.
32 **
33 */
35 /*
36 * Linux startup code.
37 *
38 * At this point, the boot loader has:
39 * Disabled interrupts
40 * Disabled caches
41 * Put us in supervisor state.
42 *
43 * The kernel setup code takes the following steps:
44 * . Raise interrupt level
45 * . Set up initial kernel memory mapping.
46 * . This sets up a mapping of the 4M of memory the kernel is located in.
47 * . It also does a mapping of any initial machine specific areas.
48 * . Enable the MMU
49 * . Enable cache memories
50 * . Jump to kernel startup
51 *
52 * Much of the file restructuring was to accomplish:
53 * 1) Remove register dependency through-out the file.
54 * 2) Increase use of subroutines to perform functions
55 * 3) Increase readability of the code
56 *
57 * Of course, readability is a subjective issue, so it will never be
58 * argued that that goal was accomplished. It was merely a goal.
59 * A key way to help make code more readable is to give good
60 * documentation. So, the first thing you will find is exaustive
61 * write-ups on the structure of the file, and the features of the
62 * functional subroutines.
63 *
64 * General Structure:
65 * ------------------
66 * Without a doubt the single largest chunk of head.S is spent
67 * mapping the kernel and I/O physical space into the logical range
68 * for the kernel.
69 * There are new subroutines and data structures to make MMU
70 * support cleaner and easier to understand.
71 * First, you will find a routine call "mmu_map" which maps
72 * a logical to a physical region for some length given a cache
73 * type on behalf of the caller. This routine makes writing the
74 * actual per-machine specific code very simple.
75 * A central part of the code, but not a subroutine in itself,
76 * is the mmu_init code which is broken down into mapping the kernel
77 * (the same for all machines) and mapping machine-specific I/O
78 * regions.
79 * Also, there will be a description of engaging the MMU and
80 * caches.
81 * You will notice that there is a chunk of code which
82 * can emit the entire MMU mapping of the machine. This is present
83 * only in debug modes and can be very helpful.
84 * Further, there is a new console driver in head.S that is
85 * also only engaged in debug mode. Currently, it's only supported
86 * on the Macintosh class of machines. However, it is hoped that
87 * others will plug-in support for specific machines.
88 *
89 * ######################################################################
90 *
91 * mmu_map
92 * -------
93 * mmu_map was written for two key reasons. First, it was clear
94 * that it was very difficult to read the previous code for mapping
95 * regions of memory. Second, the Macintosh required such extensive
96 * memory allocations that it didn't make sense to propagate the
97 * existing code any further.
98 * mmu_map requires some parameters:
99 *
100 * mmu_map (logical, physical, length, cache_type)
101 *
102 * While this essentially describes the function in the abstract, you'll
103 * find more indepth description of other parameters at the implementation site.
104 *
105 * mmu_get_root_table_entry
106 * ------------------------
107 * mmu_get_ptr_table_entry
108 * -----------------------
109 * mmu_get_page_table_entry
110 * ------------------------
111 *
112 * These routines are used by other mmu routines to get a pointer into
113 * a table, if necessary a new table is allocated. These routines are working
114 * basically like pmd_alloc() and pte_alloc() in <asm/pgtable.h>. The root
115 * table needs of course only to be allocated once in mmu_get_root_table_entry,
116 * so that here also some mmu specific initialization is done. The second page
117 * at the start of the kernel (the first page is unmapped later) is used for
118 * the kernel_pg_dir. It must be at a position known at link time (as it's used
119 * to initialize the init task struct) and since it needs special cache
120 * settings, it's the easiest to use this page, the rest of the page is used
121 * for further pointer tables.
122 * mmu_get_page_table_entry allocates always a whole page for page tables, this
123 * means 1024 pages and so 4MB of memory can be mapped. It doesn't make sense
124 * to manage page tables in smaller pieces as nearly all mappings have that
125 * size.
126 *
127 * ######################################################################
128 *
129 *
130 * ######################################################################
131 *
132 * mmu_engage
133 * ----------
134 * Thanks to a small helping routine enabling the mmu got quite simple
135 * and there is only one way left. mmu_engage makes a complete a new mapping
136 * that only includes the absolute necessary to be able to jump to the final
137 * position and to restore the original mapping.
138 * As this code doesn't need a transparent translation register anymore this
139 * means all registers are free to be used by machines that needs them for
140 * other purposes.
141 *
142 * ######################################################################
143 *
144 * mmu_print
145 * ---------
146 * This algorithm will print out the page tables of the system as
147 * appropriate for an 030 or an 040. This is useful for debugging purposes
148 * and as such is enclosed in #ifdef MMU_PRINT/#endif clauses.
149 *
150 * ######################################################################
151 *
152 * console_init
153 * ------------
154 * The console is also able to be turned off. The console in head.S
155 * is specifically for debugging and can be very useful. It is surrounded by
156 * #ifdef CONSOLE/#endif clauses so it doesn't have to ship in known-good
157 * kernels. It's basic algorithm is to determine the size of the screen
158 * (in height/width and bit depth) and then use that information for
159 * displaying an 8x8 font or an 8x16 (widthxheight). I prefer the 8x8 for
160 * debugging so I can see more good data. But it was trivial to add support
161 * for both fonts, so I included it.
162 * Also, the algorithm for plotting pixels is abstracted so that in
163 * theory other platforms could add support for different kinds of frame
164 * buffers. This could be very useful.
165 *
166 * console_put_penguin
167 * -------------------
168 * An important part of any Linux bring up is the penguin and there's
169 * nothing like getting the Penguin on the screen! This algorithm will work
170 * on any machine for which there is a console_plot_pixel.
171 *
172 * console_scroll
173 * --------------
174 * My hope is that the scroll algorithm does the right thing on the
175 * various platforms, but it wouldn't be hard to add the test conditions
176 * and new code if it doesn't.
177 *
178 * console_putc
179 * -------------
180 *
181 * ######################################################################
182 *
183 * Register usage has greatly simplified within head.S. Every subroutine
184 * saves and restores all registers that it modifies (except it returns a
185 * value in there of course). So the only register that needs to be initialized
186 * is the stack pointer.
187 * All other init code and data is now placed in the init section, so it will
188 * be automatically freed at the end of the kernel initialization.
189 *
190 * ######################################################################
191 *
192 * options
193 * -------
194 * There are many options available in a build of this file. I've
195 * taken the time to describe them here to save you the time of searching
196 * for them and trying to understand what they mean.
197 *
198 * CONFIG_xxx: These are the obvious machine configuration defines created
199 * during configuration. These are defined in autoconf.h.
200 *
201 * CONSOLE: There is support for head.S console in this file. This
202 * console can talk to a Mac frame buffer, but could easily be extrapolated
203 * to extend it to support other platforms.
204 *
205 * TEST_MMU: This is a test harness for running on any given machine but
206 * getting an MMU dump for another class of machine. The classes of machines
207 * that can be tested are any of the makes (Atari, Amiga, Mac, VME, etc.)
208 * and any of the models (030, 040, 060, etc.).
209 *
210 * NOTE: TEST_MMU is NOT permanent! It is scheduled to be removed
211 * When head.S boots on Atari, Amiga, Macintosh, and VME
212 * machines. At that point the underlying logic will be
213 * believed to be solid enough to be trusted, and TEST_MMU
214 * can be dropped. Do note that that will clean up the
215 * head.S code significantly as large blocks of #if/#else
216 * clauses can be removed.
217 *
218 * MMU_NOCACHE_KERNEL: On the Macintosh platform there was an inquiry into
219 * determing why devices don't appear to work. A test case was to remove
220 * the cacheability of the kernel bits.
221 *
222 * MMU_PRINT: There is a routine built into head.S that can display the
223 * MMU data structures. It outputs its result through the serial_putc
224 * interface. So where ever that winds up driving data, that's where the
225 * mmu struct will appear. On the Macintosh that's typically the console.
226 *
227 * SERIAL_DEBUG: There are a series of putc() macro statements
228 * scattered through out the code to give progress of status to the
229 * person sitting at the console. This constant determines whether those
230 * are used.
231 *
232 * DEBUG: This is the standard DEBUG flag that can be set for building
233 * the kernel. It has the effect adding additional tests into
234 * the code.
235 *
236 * FONT_6x11:
237 * FONT_8x8:
238 * FONT_8x16:
239 * In theory these could be determined at run time or handed
240 * over by the booter. But, let's be real, it's a fine hard
241 * coded value. (But, you will notice the code is run-time
242 * flexible!) A pointer to the font's struct font_desc
243 * is kept locally in Lconsole_font. It is used to determine
244 * font size information dynamically.
245 *
246 * Atari constants:
247 * USE_PRINTER: Use the printer port for serial debug.
248 * USE_SCC_B: Use the SCC port A (Serial2) for serial debug.
249 * USE_SCC_A: Use the SCC port B (Modem2) for serial debug.
250 * USE_MFP: Use the ST-MFP port (Modem1) for serial debug.
251 *
252 * Macintosh constants:
253 * MAC_USE_SCC_A: Use SCC port A (modem) for serial debug and early console.
254 * MAC_USE_SCC_B: Use SCC port B (printer) for serial debug and early console.
255 */
257 #include <linux/linkage.h>
258 #include <linux/init.h>
259 #include <asm/bootinfo.h>
260 #include <asm/setup.h>
261 #include <asm/entry.h>
262 #include <asm/pgtable.h>
263 #include <asm/page.h>
264 #include <asm/asm-offsets.h>
266 #ifdef CONFIG_MAC
268 #include <asm/machw.h>
270 #ifdef CONFIG_FRAMEBUFFER_CONSOLE
271 #define CONSOLE
272 #define CONSOLE_PENGUIN
273 #endif
275 #ifdef CONFIG_EARLY_PRINTK
276 #define SERIAL_DEBUG
277 #else
278 #undef SERIAL_DEBUG
279 #endif
281 #else /* !CONFIG_MAC */
283 #define SERIAL_DEBUG
285 #endif /* !CONFIG_MAC */
287 #undef MMU_PRINT
288 #undef MMU_NOCACHE_KERNEL
289 #undef DEBUG
291 /*
292 * For the head.S console, there are three supported fonts, 6x11, 8x16 and 8x8.
293 * The 8x8 font is harder to read but fits more on the screen.
294 */
295 #define FONT_8x8 /* default */
296 /* #define FONT_8x16 */ /* 2nd choice */
297 /* #define FONT_6x11 */ /* 3rd choice */
299 .globl kernel_pg_dir
300 .globl availmem
301 .globl m68k_pgtable_cachemode
302 .globl m68k_supervisor_cachemode
303 #ifdef CONFIG_MVME16x
304 .globl mvme_bdid
305 #endif
306 #ifdef CONFIG_Q40
307 .globl q40_mem_cptr
308 #endif
310 CPUTYPE_040 = 1 /* indicates an 040 */
311 CPUTYPE_060 = 2 /* indicates an 060 */
312 CPUTYPE_0460 = 3 /* if either above are set, this is set */
313 CPUTYPE_020 = 4 /* indicates an 020 */
315 /* Translation control register */
316 TC_ENABLE = 0x8000
317 TC_PAGE8K = 0x4000
318 TC_PAGE4K = 0x0000
320 /* Transparent translation registers */
321 TTR_ENABLE = 0x8000 /* enable transparent translation */
322 TTR_ANYMODE = 0x4000 /* user and kernel mode access */
323 TTR_KERNELMODE = 0x2000 /* only kernel mode access */
324 TTR_USERMODE = 0x0000 /* only user mode access */
325 TTR_CI = 0x0400 /* inhibit cache */
326 TTR_RW = 0x0200 /* read/write mode */
327 TTR_RWM = 0x0100 /* read/write mask */
328 TTR_FCB2 = 0x0040 /* function code base bit 2 */
329 TTR_FCB1 = 0x0020 /* function code base bit 1 */
330 TTR_FCB0 = 0x0010 /* function code base bit 0 */
331 TTR_FCM2 = 0x0004 /* function code mask bit 2 */
332 TTR_FCM1 = 0x0002 /* function code mask bit 1 */
333 TTR_FCM0 = 0x0001 /* function code mask bit 0 */
335 /* Cache Control registers */
336 CC6_ENABLE_D = 0x80000000 /* enable data cache (680[46]0) */
337 CC6_FREEZE_D = 0x40000000 /* freeze data cache (68060) */
338 CC6_ENABLE_SB = 0x20000000 /* enable store buffer (68060) */
339 CC6_PUSH_DPI = 0x10000000 /* disable CPUSH invalidation (68060) */
340 CC6_HALF_D = 0x08000000 /* half-cache mode for data cache (68060) */
341 CC6_ENABLE_B = 0x00800000 /* enable branch cache (68060) */
342 CC6_CLRA_B = 0x00400000 /* clear all entries in branch cache (68060) */
343 CC6_CLRU_B = 0x00200000 /* clear user entries in branch cache (68060) */
344 CC6_ENABLE_I = 0x00008000 /* enable instruction cache (680[46]0) */
345 CC6_FREEZE_I = 0x00004000 /* freeze instruction cache (68060) */
346 CC6_HALF_I = 0x00002000 /* half-cache mode for instruction cache (68060) */
347 CC3_ALLOC_WRITE = 0x00002000 /* write allocate mode(68030) */
348 CC3_ENABLE_DB = 0x00001000 /* enable data burst (68030) */
349 CC3_CLR_D = 0x00000800 /* clear data cache (68030) */
350 CC3_CLRE_D = 0x00000400 /* clear entry in data cache (68030) */
351 CC3_FREEZE_D = 0x00000200 /* freeze data cache (68030) */
352 CC3_ENABLE_D = 0x00000100 /* enable data cache (68030) */
353 CC3_ENABLE_IB = 0x00000010 /* enable instruction burst (68030) */
354 CC3_CLR_I = 0x00000008 /* clear instruction cache (68030) */
355 CC3_CLRE_I = 0x00000004 /* clear entry in instruction cache (68030) */
356 CC3_FREEZE_I = 0x00000002 /* freeze instruction cache (68030) */
357 CC3_ENABLE_I = 0x00000001 /* enable instruction cache (68030) */
359 /* Miscellaneous definitions */
360 PAGESIZE = 4096
361 PAGESHIFT = 12
363 ROOT_TABLE_SIZE = 128
364 PTR_TABLE_SIZE = 128
365 PAGE_TABLE_SIZE = 64
366 ROOT_INDEX_SHIFT = 25
367 PTR_INDEX_SHIFT = 18
368 PAGE_INDEX_SHIFT = 12
370 #ifdef DEBUG
371 /* When debugging use readable names for labels */
372 #ifdef __STDC__
373 #define L(name) .head.S.##name
374 #else
375 #define L(name) .head.S./**/name
376 #endif
377 #else
378 #ifdef __STDC__
379 #define L(name) .L##name
380 #else
381 #define L(name) .L/**/name
382 #endif
383 #endif
385 /* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */
386 #ifndef __INITDATA
387 #define __INITDATA .data
388 #define __FINIT .previous
389 #endif
391 /* Several macros to make the writing of subroutines easier:
392 * - func_start marks the beginning of the routine which setups the frame
393 * register and saves the registers, it also defines another macro
394 * to automatically restore the registers again.
395 * - func_return marks the end of the routine and simply calls the prepared
396 * macro to restore registers and jump back to the caller.
397 * - func_define generates another macro to automatically put arguments
398 * onto the stack call the subroutine and cleanup the stack again.
399 */
401 /* Within subroutines these macros can be used to access the arguments
402 * on the stack. With STACK some allocated memory on the stack can be
403 * accessed and ARG0 points to the return address (used by mmu_engage).
404 */
405 #define STACK %a6@(stackstart)
406 #define ARG0 %a6@(4)
407 #define ARG1 %a6@(8)
408 #define ARG2 %a6@(12)
409 #define ARG3 %a6@(16)
410 #define ARG4 %a6@(20)
412 .macro func_start name,saveregs,stack=0
413 L(\name):
414 linkw %a6,#-\stack
415 moveml \saveregs,%sp@-
416 .set stackstart,-\stack
418 .macro func_return_\name
419 moveml %sp@+,\saveregs
420 unlk %a6
421 rts
422 .endm
423 .endm
425 .macro func_return name
426 func_return_\name
427 .endm
429 .macro func_call name
430 jbsr L(\name)
431 .endm
433 .macro move_stack nr,arg1,arg2,arg3,arg4
434 .if \nr
435 move_stack "(\nr-1)",\arg2,\arg3,\arg4
436 movel \arg1,%sp@-
437 .endif
438 .endm
440 .macro func_define name,nr=0
441 .macro \name arg1,arg2,arg3,arg4
442 move_stack \nr,\arg1,\arg2,\arg3,\arg4
443 func_call \name
444 .if \nr
445 lea %sp@(\nr*4),%sp
446 .endif
447 .endm
448 .endm
450 func_define mmu_map,4
451 func_define mmu_map_tt,4
452 func_define mmu_fixup_page_mmu_cache,1
453 func_define mmu_temp_map,2
454 func_define mmu_engage
455 func_define mmu_get_root_table_entry,1
456 func_define mmu_get_ptr_table_entry,2
457 func_define mmu_get_page_table_entry,2
458 func_define mmu_print
459 func_define get_new_page
460 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
461 func_define set_leds
462 #endif
464 .macro mmu_map_eq arg1,arg2,arg3
465 mmu_map \arg1,\arg1,\arg2,\arg3
466 .endm
468 .macro get_bi_record record
469 pea \record
470 func_call get_bi_record
471 addql #4,%sp
472 .endm
474 func_define serial_putc,1
475 func_define console_putc,1
477 func_define console_init
478 func_define console_put_stats
479 func_define console_put_penguin
480 func_define console_plot_pixel,3
481 func_define console_scroll
483 .macro putc ch
484 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
485 pea \ch
486 #endif
487 #ifdef CONSOLE
488 func_call console_putc
489 #endif
490 #ifdef SERIAL_DEBUG
491 func_call serial_putc
492 #endif
493 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
494 addql #4,%sp
495 #endif
496 .endm
498 .macro dputc ch
499 #ifdef DEBUG
500 putc \ch
501 #endif
502 .endm
504 func_define putn,1
506 .macro dputn nr
507 #ifdef DEBUG
508 putn \nr
509 #endif
510 .endm
512 .macro puts string
513 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
514 __INITDATA
515 .Lstr\@:
516 .string "\string"
517 __FINIT
518 pea %pc@(.Lstr\@)
519 func_call puts
520 addql #4,%sp
521 #endif
522 .endm
524 .macro dputs string
525 #ifdef DEBUG
526 puts "\string"
527 #endif
528 .endm
530 #define is_not_amiga(lab) cmpl &MACH_AMIGA,%pc@(m68k_machtype); jne lab
531 #define is_not_atari(lab) cmpl &MACH_ATARI,%pc@(m68k_machtype); jne lab
532 #define is_not_mac(lab) cmpl &MACH_MAC,%pc@(m68k_machtype); jne lab
533 #define is_not_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jne lab
534 #define is_not_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jne lab
535 #define is_not_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jne lab
536 #define is_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jeq lab
537 #define is_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jeq lab
538 #define is_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jeq lab
539 #define is_not_hp300(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); jne lab
540 #define is_not_apollo(lab) cmpl &MACH_APOLLO,%pc@(m68k_machtype); jne lab
541 #define is_not_q40(lab) cmpl &MACH_Q40,%pc@(m68k_machtype); jne lab
542 #define is_not_sun3x(lab) cmpl &MACH_SUN3X,%pc@(m68k_machtype); jne lab
544 #define hasnt_leds(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); \
545 jeq 42f; \
546 cmpl &MACH_APOLLO,%pc@(m68k_machtype); \
547 jne lab ;\
548 42:\
550 #define is_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jne lab
551 #define is_not_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jeq lab
552 #define is_040(lab) btst &CPUTYPE_040,%pc@(L(cputype)+3); jne lab
553 #define is_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jne lab
554 #define is_not_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jeq lab
555 #define is_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jne lab
556 #define is_not_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jeq lab
558 /* On the HP300 we use the on-board LEDs for debug output before
559 the console is running. Writing a 1 bit turns the corresponding LED
560 _off_ - on the 340 bit 7 is towards the back panel of the machine. */
561 .macro leds mask
562 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
563 hasnt_leds(.Lled\@)
564 pea \mask
565 func_call set_leds
566 addql #4,%sp
567 .Lled\@:
568 #endif
569 .endm
571 __HEAD
572 ENTRY(_stext)
573 /*
574 * Version numbers of the bootinfo interface
575 * The area from _stext to _start will later be used as kernel pointer table
576 */
577 bras 1f /* Jump over bootinfo version numbers */
579 .long BOOTINFOV_MAGIC
580 .long MACH_AMIGA, AMIGA_BOOTI_VERSION
581 .long MACH_ATARI, ATARI_BOOTI_VERSION
582 .long MACH_MVME147, MVME147_BOOTI_VERSION
583 .long MACH_MVME16x, MVME16x_BOOTI_VERSION
584 .long MACH_BVME6000, BVME6000_BOOTI_VERSION
585 .long MACH_MAC, MAC_BOOTI_VERSION
586 .long MACH_Q40, Q40_BOOTI_VERSION
587 .long MACH_HP300, HP300_BOOTI_VERSION
588 .long 0
589 1: jra __start
591 .equ kernel_pg_dir,_stext
593 .equ .,_stext+PAGESIZE
595 ENTRY(_start)
596 jra __start
597 __INIT
598 ENTRY(__start)
599 /*
600 * Setup initial stack pointer
601 */
602 lea %pc@(_stext),%sp
604 /*
605 * Record the CPU and machine type.
606 */
607 get_bi_record BI_MACHTYPE
608 lea %pc@(m68k_machtype),%a1
609 movel %a0@,%a1@
611 get_bi_record BI_FPUTYPE
612 lea %pc@(m68k_fputype),%a1
613 movel %a0@,%a1@
615 get_bi_record BI_MMUTYPE
616 lea %pc@(m68k_mmutype),%a1
617 movel %a0@,%a1@
619 get_bi_record BI_CPUTYPE
620 lea %pc@(m68k_cputype),%a1
621 movel %a0@,%a1@
623 leds 0x1
625 #ifdef CONFIG_MAC
626 /*
627 * For Macintosh, we need to determine the display parameters early (at least
628 * while debugging it).
629 */
631 is_not_mac(L(test_notmac))
633 get_bi_record BI_MAC_VADDR
634 lea %pc@(L(mac_videobase)),%a1
635 movel %a0@,%a1@
637 get_bi_record BI_MAC_VDEPTH
638 lea %pc@(L(mac_videodepth)),%a1
639 movel %a0@,%a1@
641 get_bi_record BI_MAC_VDIM
642 lea %pc@(L(mac_dimensions)),%a1
643 movel %a0@,%a1@
645 get_bi_record BI_MAC_VROW
646 lea %pc@(L(mac_rowbytes)),%a1
647 movel %a0@,%a1@
649 #ifdef SERIAL_DEBUG
650 get_bi_record BI_MAC_SCCBASE
651 lea %pc@(L(mac_sccbase)),%a1
652 movel %a0@,%a1@
653 #endif
655 #if 0
656 /*
657 * Clear the screen
658 */
659 lea %pc@(L(mac_videobase)),%a0
660 movel %a0@,%a1
661 lea %pc@(L(mac_dimensions)),%a0
662 movel %a0@,%d1
663 swap %d1 /* #rows is high bytes */
664 andl #0xFFFF,%d1 /* rows */
665 subl #10,%d1
666 lea %pc@(L(mac_rowbytes)),%a0
667 loopy2:
668 movel %a0@,%d0
669 subql #1,%d0
670 loopx2:
671 moveb #0x55, %a1@+
672 dbra %d0,loopx2
673 dbra %d1,loopy2
674 #endif
676 L(test_notmac):
677 #endif /* CONFIG_MAC */
680 /*
681 * There are ultimately two pieces of information we want for all kinds of
682 * processors CpuType and CacheBits. The CPUTYPE was passed in from booter
683 * and is converted here from a booter type definition to a separate bit
684 * number which allows for the standard is_0x0 macro tests.
685 */
686 movel %pc@(m68k_cputype),%d0
687 /*
688 * Assume it's an 030
689 */
690 clrl %d1
692 /*
693 * Test the BootInfo cputype for 060
694 */
695 btst #CPUB_68060,%d0
696 jeq 1f
697 bset #CPUTYPE_060,%d1
698 bset #CPUTYPE_0460,%d1
699 jra 3f
700 1:
701 /*
702 * Test the BootInfo cputype for 040
703 */
704 btst #CPUB_68040,%d0
705 jeq 2f
706 bset #CPUTYPE_040,%d1
707 bset #CPUTYPE_0460,%d1
708 jra 3f
709 2:
710 /*
711 * Test the BootInfo cputype for 020
712 */
713 btst #CPUB_68020,%d0
714 jeq 3f
715 bset #CPUTYPE_020,%d1
716 jra 3f
717 3:
718 /*
719 * Record the cpu type
720 */
721 lea %pc@(L(cputype)),%a0
722 movel %d1,%a0@
724 /*
725 * NOTE:
726 *
727 * Now the macros are valid:
728 * is_040_or_060
729 * is_not_040_or_060
730 * is_040
731 * is_060
732 * is_not_060
733 */
735 /*
736 * Determine the cache mode for pages holding MMU tables
737 * and for supervisor mode, unused for '020 and '030
738 */
739 clrl %d0
740 clrl %d1
742 is_not_040_or_060(L(save_cachetype))
744 /*
745 * '040 or '060
746 * d1 := cacheable write-through
747 * NOTE: The 68040 manual strongly recommends non-cached for MMU tables,
748 * but we have been using write-through since at least 2.0.29 so I
749 * guess it is OK.
750 */
751 #ifdef CONFIG_060_WRITETHROUGH
752 /*
753 * If this is a 68060 board using drivers with cache coherency
754 * problems, then supervisor memory accesses need to be write-through
755 * also; otherwise, we want copyback.
756 */
758 is_not_060(1f)
759 movel #_PAGE_CACHE040W,%d0
760 jra L(save_cachetype)
761 #endif /* CONFIG_060_WRITETHROUGH */
762 1:
763 movew #_PAGE_CACHE040,%d0
765 movel #_PAGE_CACHE040W,%d1
767 L(save_cachetype):
768 /* Save cache mode for supervisor mode and page tables
769 */
770 lea %pc@(m68k_supervisor_cachemode),%a0
771 movel %d0,%a0@
772 lea %pc@(m68k_pgtable_cachemode),%a0
773 movel %d1,%a0@
775 /*
776 * raise interrupt level
777 */
778 movew #0x2700,%sr
780 /*
781 If running on an Atari, determine the I/O base of the
782 serial port and test if we are running on a Medusa or Hades.
783 This test is necessary here, because on the Hades the serial
784 port is only accessible in the high I/O memory area.
786 The test whether it is a Medusa is done by writing to the byte at
787 phys. 0x0. This should result in a bus error on all other machines.
789 ...should, but doesn't. The Afterburner040 for the Falcon has the
790 same behaviour (0x0..0x7 are no ROM shadow). So we have to do
791 another test to distinguish Medusa and AB040. This is a
792 read attempt for 0x00ff82fe phys. that should bus error on a Falcon
793 (+AB040), but is in the range where the Medusa always asserts DTACK.
795 The test for the Hades is done by reading address 0xb0000000. This
796 should give a bus error on the Medusa.
797 */
799 #ifdef CONFIG_ATARI
800 is_not_atari(L(notypetest))
802 /* get special machine type (Medusa/Hades/AB40) */
803 moveq #0,%d3 /* default if tag doesn't exist */
804 get_bi_record BI_ATARI_MCH_TYPE
805 tstl %d0
806 jbmi 1f
807 movel %a0@,%d3
808 lea %pc@(atari_mch_type),%a0
809 movel %d3,%a0@
810 1:
811 /* On the Hades, the iobase must be set up before opening the
812 * serial port. There are no I/O regs at 0x00ffxxxx at all. */
813 moveq #0,%d0
814 cmpl #ATARI_MACH_HADES,%d3
815 jbne 1f
816 movel #0xff000000,%d0 /* Hades I/O base addr: 0xff000000 */
817 1: lea %pc@(L(iobase)),%a0
818 movel %d0,%a0@
820 L(notypetest):
821 #endif
823 #ifdef CONFIG_VME
824 is_mvme147(L(getvmetype))
825 is_bvme6000(L(getvmetype))
826 is_not_mvme16x(L(gvtdone))
828 /* See if the loader has specified the BI_VME_TYPE tag. Recent
829 * versions of VMELILO and TFTPLILO do this. We have to do this
830 * early so we know how to handle console output. If the tag
831 * doesn't exist then we use the Bug for output on MVME16x.
832 */
833 L(getvmetype):
834 get_bi_record BI_VME_TYPE
835 tstl %d0
836 jbmi 1f
837 movel %a0@,%d3
838 lea %pc@(vme_brdtype),%a0
839 movel %d3,%a0@
840 1:
841 #ifdef CONFIG_MVME16x
842 is_not_mvme16x(L(gvtdone))
844 /* Need to get the BRD_ID info to differentiate between 162, 167,
845 * etc. This is available as a BI_VME_BRDINFO tag with later
846 * versions of VMELILO and TFTPLILO, otherwise we call the Bug.
847 */
848 get_bi_record BI_VME_BRDINFO
849 tstl %d0
850 jpl 1f
852 /* Get pointer to board ID data from Bug */
853 movel %d2,%sp@-
854 trap #15
855 .word 0x70 /* trap 0x70 - .BRD_ID */
856 movel %sp@+,%a0
857 1:
858 lea %pc@(mvme_bdid),%a1
859 /* Structure is 32 bytes long */
860 movel %a0@+,%a1@+
861 movel %a0@+,%a1@+
862 movel %a0@+,%a1@+
863 movel %a0@+,%a1@+
864 movel %a0@+,%a1@+
865 movel %a0@+,%a1@+
866 movel %a0@+,%a1@+
867 movel %a0@+,%a1@+
868 #endif
870 L(gvtdone):
872 #endif
874 #ifdef CONFIG_HP300
875 is_not_hp300(L(nothp))
877 /* Get the address of the UART for serial debugging */
878 get_bi_record BI_HP300_UART_ADDR
879 tstl %d0
880 jbmi 1f
881 movel %a0@,%d3
882 lea %pc@(L(uartbase)),%a0
883 movel %d3,%a0@
884 get_bi_record BI_HP300_UART_SCODE
885 tstl %d0
886 jbmi 1f
887 movel %a0@,%d3
888 lea %pc@(L(uart_scode)),%a0
889 movel %d3,%a0@
890 1:
891 L(nothp):
892 #endif
894 /*
895 * Initialize serial port
896 */
897 jbsr L(serial_init)
899 /*
900 * Initialize console
901 */
902 #ifdef CONFIG_MAC
903 is_not_mac(L(nocon))
904 #ifdef CONSOLE
905 console_init
906 #ifdef CONSOLE_PENGUIN
907 console_put_penguin
908 #endif /* CONSOLE_PENGUIN */
909 console_put_stats
910 #endif /* CONSOLE */
911 L(nocon):
912 #endif /* CONFIG_MAC */
915 putc '\n'
916 putc 'A'
917 leds 0x2
918 dputn %pc@(L(cputype))
919 dputn %pc@(m68k_supervisor_cachemode)
920 dputn %pc@(m68k_pgtable_cachemode)
921 dputc '\n'
923 /*
924 * Save physical start address of kernel
925 */
926 lea %pc@(L(phys_kernel_start)),%a0
927 lea %pc@(_stext),%a1
928 subl #_stext,%a1
929 addl #PAGE_OFFSET,%a1
930 movel %a1,%a0@
932 putc 'B'
934 leds 0x4
936 /*
937 * mmu_init
938 *
939 * This block of code does what's necessary to map in the various kinds
940 * of machines for execution of Linux.
941 * First map the first 4 MB of kernel code & data
942 */
944 mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),#4*1024*1024,\
945 %pc@(m68k_supervisor_cachemode)
947 putc 'C'
949 #ifdef CONFIG_AMIGA
951 L(mmu_init_amiga):
953 is_not_amiga(L(mmu_init_not_amiga))
954 /*
955 * mmu_init_amiga
956 */
958 putc 'D'
960 is_not_040_or_060(1f)
962 /*
963 * 040: Map the 16Meg range physical 0x0 up to logical 0x8000.0000
964 */
965 mmu_map #0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S
966 /*
967 * Map the Zorro III I/O space with transparent translation
968 * for frame buffer memory etc.
969 */
970 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE_S
972 jbra L(mmu_init_done)
974 1:
975 /*
976 * 030: Map the 32Meg range physical 0x0 up to logical 0x8000.0000
977 */
978 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
979 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030
981 jbra L(mmu_init_done)
983 L(mmu_init_not_amiga):
984 #endif
986 #ifdef CONFIG_ATARI
988 L(mmu_init_atari):
990 is_not_atari(L(mmu_init_not_atari))
992 putc 'E'
994 /* On the Atari, we map the I/O region (phys. 0x00ffxxxx) by mapping
995 the last 16 MB of virtual address space to the first 16 MB (i.e.
996 0xffxxxxxx -> 0x00xxxxxx). For this, an additional pointer table is
997 needed. I/O ranges are marked non-cachable.
999 For the Medusa it is better to map the I/O region transparently
1000 (i.e. 0xffxxxxxx -> 0xffxxxxxx), because some I/O registers are
1001 accessible only in the high area.
1003 On the Hades all I/O registers are only accessible in the high
1004 area.
1005 */
1007 /* I/O base addr for non-Medusa, non-Hades: 0x00000000 */
1008 moveq #0,%d0
1009 movel %pc@(atari_mch_type),%d3
1010 cmpl #ATARI_MACH_MEDUSA,%d3
1011 jbeq 2f
1012 cmpl #ATARI_MACH_HADES,%d3
1013 jbne 1f
1014 2: movel #0xff000000,%d0 /* Medusa/Hades base addr: 0xff000000 */
1015 1: movel %d0,%d3
1017 is_040_or_060(L(spata68040))
1019 /* Map everything non-cacheable, though not all parts really
1020 * need to disable caches (crucial only for 0xff8000..0xffffff
1021 * (standard I/O) and 0xf00000..0xf3ffff (IDE)). The remainder
1022 * isn't really used, except for sometimes peeking into the
1023 * ROMs (mirror at phys. 0x0), so caching isn't necessary for
1024 * this. */
1025 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE030
1027 jbra L(mmu_init_done)
1029 L(spata68040):
1031 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE_S
1033 jbra L(mmu_init_done)
1035 L(mmu_init_not_atari):
1036 #endif
1038 #ifdef CONFIG_Q40
1039 is_not_q40(L(notq40))
1040 /*
1041 * add transparent mapping for 0xff00 0000 - 0xffff ffff
1042 * non-cached serialized etc..
1043 * this includes master chip, DAC, RTC and ISA ports
1044 * 0xfe000000-0xfeffffff is for screen and ROM
1045 */
1047 putc 'Q'
1049 mmu_map_tt #0,#0xfe000000,#0x01000000,#_PAGE_CACHE040W
1050 mmu_map_tt #1,#0xff000000,#0x01000000,#_PAGE_NOCACHE_S
1052 jbra L(mmu_init_done)
1054 L(notq40):
1055 #endif
1057 #ifdef CONFIG_HP300
1058 is_not_hp300(L(nothp300))
1060 /* On the HP300, we map the ROM, INTIO and DIO regions (phys. 0x00xxxxxx)
1061 * by mapping 32MB (on 020/030) or 16 MB (on 040) from 0xf0xxxxxx -> 0x00xxxxxx).
1062 * The ROM mapping is needed because the LEDs are mapped there too.
1063 */
1065 is_040(1f)
1067 /*
1068 * 030: Map the 32Meg range physical 0x0 up to logical 0xf000.0000
1069 */
1070 mmu_map #0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030
1072 jbra L(mmu_init_done)
1074 1:
1075 /*
1076 * 040: Map the 16Meg range physical 0x0 up to logical 0xf000.0000
1077 */
1078 mmu_map #0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE_S
1080 jbra L(mmu_init_done)
1082 L(nothp300):
1083 #endif /* CONFIG_HP300 */
1085 #ifdef CONFIG_MVME147
1087 is_not_mvme147(L(not147))
1089 /*
1090 * On MVME147 we have already created kernel page tables for
1091 * 4MB of RAM at address 0, so now need to do a transparent
1092 * mapping of the top of memory space. Make it 0.5GByte for now,
1093 * so we can access on-board i/o areas.
1094 */
1096 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE030
1098 jbra L(mmu_init_done)
1100 L(not147):
1101 #endif /* CONFIG_MVME147 */
1103 #ifdef CONFIG_MVME16x
1105 is_not_mvme16x(L(not16x))
1107 /*
1108 * On MVME16x we have already created kernel page tables for
1109 * 4MB of RAM at address 0, so now need to do a transparent
1110 * mapping of the top of memory space. Make it 0.5GByte for now.
1111 * Supervisor only access, so transparent mapping doesn't
1112 * clash with User code virtual address space.
1113 * this covers IO devices, PROM and SRAM. The PROM and SRAM
1114 * mapping is needed to allow 167Bug to run.
1115 * IO is in the range 0xfff00000 to 0xfffeffff.
1116 * PROM is 0xff800000->0xffbfffff and SRAM is
1117 * 0xffe00000->0xffe1ffff.
1118 */
1120 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1122 jbra L(mmu_init_done)
1124 L(not16x):
1125 #endif /* CONFIG_MVME162 | CONFIG_MVME167 */
1127 #ifdef CONFIG_BVME6000
1129 is_not_bvme6000(L(not6000))
1131 /*
1132 * On BVME6000 we have already created kernel page tables for
1133 * 4MB of RAM at address 0, so now need to do a transparent
1134 * mapping of the top of memory space. Make it 0.5GByte for now,
1135 * so we can access on-board i/o areas.
1136 * Supervisor only access, so transparent mapping doesn't
1137 * clash with User code virtual address space.
1138 */
1140 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1142 jbra L(mmu_init_done)
1144 L(not6000):
1145 #endif /* CONFIG_BVME6000 */
1147 /*
1148 * mmu_init_mac
1149 *
1150 * The Macintosh mappings are less clear.
1151 *
1152 * Even as of this writing, it is unclear how the
1153 * Macintosh mappings will be done. However, as
1154 * the first author of this code I'm proposing the
1155 * following model:
1156 *
1157 * Map the kernel (that's already done),
1158 * Map the I/O (on most machines that's the
1159 * 0x5000.0000 ... 0x5300.0000 range,
1160 * Map the video frame buffer using as few pages
1161 * as absolutely (this requirement mostly stems from
1162 * the fact that when the frame buffer is at
1163 * 0x0000.0000 then we know there is valid RAM just
1164 * above the screen that we don't want to waste!).
1165 *
1166 * By the way, if the frame buffer is at 0x0000.0000
1167 * then the Macintosh is known as an RBV based Mac.
1168 *
1169 * By the way 2, the code currently maps in a bunch of
1170 * regions. But I'd like to cut that out. (And move most
1171 * of the mappings up into the kernel proper ... or only
1172 * map what's necessary.)
1173 */
1175 #ifdef CONFIG_MAC
1177 L(mmu_init_mac):
1179 is_not_mac(L(mmu_init_not_mac))
1181 putc 'F'
1183 is_not_040_or_060(1f)
1185 moveq #_PAGE_NOCACHE_S,%d3
1186 jbra 2f
1187 1:
1188 moveq #_PAGE_NOCACHE030,%d3
1189 2:
1190 /*
1191 * Mac Note: screen address of logical 0xF000.0000 -> <screen physical>
1192 * we simply map the 4MB that contains the videomem
1193 */
1195 movel #VIDEOMEMMASK,%d0
1196 andl %pc@(L(mac_videobase)),%d0
1198 mmu_map #VIDEOMEMBASE,%d0,#VIDEOMEMSIZE,%d3
1199 /* ROM from 4000 0000 to 4200 0000 (only for mac_reset()) */
1200 mmu_map_eq #0x40000000,#0x02000000,%d3
1201 /* IO devices (incl. serial port) from 5000 0000 to 5300 0000 */
1202 mmu_map_eq #0x50000000,#0x03000000,%d3
1203 /* Nubus slot space (video at 0xF0000000, rom at 0xF0F80000) */
1204 mmu_map_tt #1,#0xf8000000,#0x08000000,%d3
1206 jbra L(mmu_init_done)
1208 L(mmu_init_not_mac):
1209 #endif
1211 #ifdef CONFIG_SUN3X
1212 is_not_sun3x(L(notsun3x))
1214 /* oh, the pain.. We're gonna want the prom code after
1215 * starting the MMU, so we copy the mappings, translating
1216 * from 8k -> 4k pages as we go.
1217 */
1219 /* copy maps from 0xfee00000 to 0xff000000 */
1220 movel #0xfee00000, %d0
1221 moveq #ROOT_INDEX_SHIFT, %d1
1222 lsrl %d1,%d0
1223 mmu_get_root_table_entry %d0
1225 movel #0xfee00000, %d0
1226 moveq #PTR_INDEX_SHIFT, %d1
1227 lsrl %d1,%d0
1228 andl #PTR_TABLE_SIZE-1, %d0
1229 mmu_get_ptr_table_entry %a0,%d0
1231 movel #0xfee00000, %d0
1232 moveq #PAGE_INDEX_SHIFT, %d1
1233 lsrl %d1,%d0
1234 andl #PAGE_TABLE_SIZE-1, %d0
1235 mmu_get_page_table_entry %a0,%d0
1237 /* this is where the prom page table lives */
1238 movel 0xfefe00d4, %a1
1239 movel %a1@, %a1
1241 movel #((0x200000 >> 13)-1), %d1
1243 1:
1244 movel %a1@+, %d3
1245 movel %d3,%a0@+
1246 addl #0x1000,%d3
1247 movel %d3,%a0@+
1249 dbra %d1,1b
1251 /* setup tt1 for I/O */
1252 mmu_map_tt #1,#0x40000000,#0x40000000,#_PAGE_NOCACHE_S
1253 jbra L(mmu_init_done)
1255 L(notsun3x):
1256 #endif
1258 #ifdef CONFIG_APOLLO
1259 is_not_apollo(L(notapollo))
1261 putc 'P'
1262 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
1264 L(notapollo):
1265 jbra L(mmu_init_done)
1266 #endif
1268 L(mmu_init_done):
1270 putc 'G'
1271 leds 0x8
1273 /*
1274 * mmu_fixup
1275 *
1276 * On the 040 class machines, all pages that are used for the
1277 * mmu have to be fixed up. According to Motorola, pages holding mmu
1278 * tables should be non-cacheable on a '040 and write-through on a
1279 * '060. But analysis of the reasons for this, and practical
1280 * experience, showed that write-through also works on a '040.
1281 *
1282 * Allocated memory so far goes from kernel_end to memory_start that
1283 * is used for all kind of tables, for that the cache attributes
1284 * are now fixed.
1285 */
1286 L(mmu_fixup):
1288 is_not_040_or_060(L(mmu_fixup_done))
1290 #ifdef MMU_NOCACHE_KERNEL
1291 jbra L(mmu_fixup_done)
1292 #endif
1294 /* first fix the page at the start of the kernel, that
1295 * contains also kernel_pg_dir.
1296 */
1297 movel %pc@(L(phys_kernel_start)),%d0
1298 subl #PAGE_OFFSET,%d0
1299 lea %pc@(_stext),%a0
1300 subl %d0,%a0
1301 mmu_fixup_page_mmu_cache %a0
1303 movel %pc@(L(kernel_end)),%a0
1304 subl %d0,%a0
1305 movel %pc@(L(memory_start)),%a1
1306 subl %d0,%a1
1307 bra 2f
1308 1:
1309 mmu_fixup_page_mmu_cache %a0
1310 addw #PAGESIZE,%a0
1311 2:
1312 cmpl %a0,%a1
1313 jgt 1b
1315 L(mmu_fixup_done):
1317 #ifdef MMU_PRINT
1318 mmu_print
1319 #endif
1321 /*
1322 * mmu_engage
1323 *
1324 * This chunk of code performs the gruesome task of engaging the MMU.
1325 * The reason its gruesome is because when the MMU becomes engaged it
1326 * maps logical addresses to physical addresses. The Program Counter
1327 * register is then passed through the MMU before the next instruction
1328 * is fetched (the instruction following the engage MMU instruction).
1329 * This may mean one of two things:
1330 * 1. The Program Counter falls within the logical address space of
1331 * the kernel of which there are two sub-possibilities:
1332 * A. The PC maps to the correct instruction (logical PC == physical
1333 * code location), or
1334 * B. The PC does not map through and the processor will read some
1335 * data (or instruction) which is not the logically next instr.
1336 * As you can imagine, A is good and B is bad.
1337 * Alternatively,
1338 * 2. The Program Counter does not map through the MMU. The processor
1339 * will take a Bus Error.
1340 * Clearly, 2 is bad.
1341 * It doesn't take a wiz kid to figure you want 1.A.
1342 * This code creates that possibility.
1343 * There are two possible 1.A. states (we now ignore the other above states):
1344 * A. The kernel is located at physical memory addressed the same as
1345 * the logical memory for the kernel, i.e., 0x01000.
1346 * B. The kernel is located some where else. e.g., 0x0400.0000
1347 *
1348 * Under some conditions the Macintosh can look like A or B.
1349 * [A friend and I once noted that Apple hardware engineers should be
1350 * wacked twice each day: once when they show up at work (as in, Whack!,
1351 * "This is for the screwy hardware we know you're going to design today."),
1352 * and also at the end of the day (as in, Whack! "I don't know what
1353 * you designed today, but I'm sure it wasn't good."). -- rst]
1354 *
1355 * This code works on the following premise:
1356 * If the kernel start (%d5) is within the first 16 Meg of RAM,
1357 * then create a mapping for the kernel at logical 0x8000.0000 to
1358 * the physical location of the pc. And, create a transparent
1359 * translation register for the first 16 Meg. Then, after the MMU
1360 * is engaged, the PC can be moved up into the 0x8000.0000 range
1361 * and then the transparent translation can be turned off and then
1362 * the PC can jump to the correct logical location and it will be
1363 * home (finally). This is essentially the code that the Amiga used
1364 * to use. Now, it's generalized for all processors. Which means
1365 * that a fresh (but temporary) mapping has to be created. The mapping
1366 * is made in page 0 (an as of yet unused location -- except for the
1367 * stack!). This temporary mapping will only require 1 pointer table
1368 * and a single page table (it can map 256K).
1369 *
1370 * OK, alternatively, imagine that the Program Counter is not within
1371 * the first 16 Meg. Then, just use Transparent Translation registers
1372 * to do the right thing.
1373 *
1374 * Last, if _start is already at 0x01000, then there's nothing special
1375 * to do (in other words, in a degenerate case of the first case above,
1376 * do nothing).
1377 *
1378 * Let's do it.
1379 *
1380 *
1381 */
1383 putc 'H'
1385 mmu_engage
1387 /*
1388 * After this point no new memory is allocated and
1389 * the start of available memory is stored in availmem.
1390 * (The bootmem allocator requires now the physicall address.)
1391 */
1393 movel L(memory_start),availmem
1395 #ifdef CONFIG_AMIGA
1396 is_not_amiga(1f)
1397 /* fixup the Amiga custom register location before printing */
1398 clrl L(custom)
1399 1:
1400 #endif
1402 #ifdef CONFIG_ATARI
1403 is_not_atari(1f)
1404 /* fixup the Atari iobase register location before printing */
1405 movel #0xff000000,L(iobase)
1406 1:
1407 #endif
1409 #ifdef CONFIG_MAC
1410 is_not_mac(1f)
1411 movel #~VIDEOMEMMASK,%d0
1412 andl L(mac_videobase),%d0
1413 addl #VIDEOMEMBASE,%d0
1414 movel %d0,L(mac_videobase)
1415 #if defined(CONSOLE)
1416 movel %pc@(L(phys_kernel_start)),%d0
1417 subl #PAGE_OFFSET,%d0
1418 subl %d0,L(console_font)
1419 subl %d0,L(console_font_data)
1420 #endif
1421 #ifdef SERIAL_DEBUG
1422 orl #0x50000000,L(mac_sccbase)
1423 #endif
1424 1:
1425 #endif
1427 #ifdef CONFIG_HP300
1428 is_not_hp300(2f)
1429 /*
1430 * Fix up the iobase register to point to the new location of the LEDs.
1431 */
1432 movel #0xf0000000,L(iobase)
1434 /*
1435 * Energise the FPU and caches.
1436 */
1437 is_040(1f)
1438 movel #0x60,0xf05f400c
1439 jbra 2f
1441 /*
1442 * 040: slightly different, apparently.
1443 */
1444 1: movew #0,0xf05f400e
1445 movew #0x64,0xf05f400e
1446 2:
1447 #endif
1449 #ifdef CONFIG_SUN3X
1450 is_not_sun3x(1f)
1452 /* enable copro */
1453 oriw #0x4000,0x61000000
1454 1:
1455 #endif
1457 #ifdef CONFIG_APOLLO
1458 is_not_apollo(1f)
1460 /*
1461 * Fix up the iobase before printing
1462 */
1463 movel #0x80000000,L(iobase)
1464 1:
1465 #endif
1467 putc 'I'
1468 leds 0x10
1470 /*
1471 * Enable caches
1472 */
1474 is_not_040_or_060(L(cache_not_680460))
1476 L(cache680460):
1477 .chip 68040
1478 nop
1479 cpusha %bc
1480 nop
1482 is_060(L(cache68060))
1484 movel #CC6_ENABLE_D+CC6_ENABLE_I,%d0
1485 /* MMU stuff works in copyback mode now, so enable the cache */
1486 movec %d0,%cacr
1487 jra L(cache_done)
1489 L(cache68060):
1490 movel #CC6_ENABLE_D+CC6_ENABLE_I+CC6_ENABLE_SB+CC6_PUSH_DPI+CC6_ENABLE_B+CC6_CLRA_B,%d0
1491 /* MMU stuff works in copyback mode now, so enable the cache */
1492 movec %d0,%cacr
1493 /* enable superscalar dispatch in PCR */
1494 moveq #1,%d0
1495 .chip 68060
1496 movec %d0,%pcr
1498 jbra L(cache_done)
1499 L(cache_not_680460):
1500 L(cache68030):
1501 .chip 68030
1502 movel #CC3_ENABLE_DB+CC3_CLR_D+CC3_ENABLE_D+CC3_ENABLE_IB+CC3_CLR_I+CC3_ENABLE_I,%d0
1503 movec %d0,%cacr
1505 jra L(cache_done)
1506 .chip 68k
1507 L(cache_done):
1509 putc 'J'
1511 /*
1512 * Setup initial stack pointer
1513 */
1514 lea init_task,%curptr
1515 lea init_thread_union+THREAD_SIZE,%sp
1517 putc 'K'
1519 subl %a6,%a6 /* clear a6 for gdb */
1521 /*
1522 * The new 64bit printf support requires an early exception initialization.
1523 */
1524 jbsr base_trap_init
1526 /* jump to the kernel start */
1528 putc '\n'
1529 leds 0x55
1531 jbsr start_kernel
1533 /*
1534 * Find a tag record in the bootinfo structure
1535 * The bootinfo structure is located right after the kernel bss
1536 * Returns: d0: size (-1 if not found)
1537 * a0: data pointer (end-of-records if not found)
1538 */
1539 func_start get_bi_record,%d1
1541 movel ARG1,%d0
1542 lea %pc@(_end),%a0
1543 1: tstw %a0@(BIR_TAG)
1544 jeq 3f
1545 cmpw %a0@(BIR_TAG),%d0
1546 jeq 2f
1547 addw %a0@(BIR_SIZE),%a0
1548 jra 1b
1549 2: moveq #0,%d0
1550 movew %a0@(BIR_SIZE),%d0
1551 lea %a0@(BIR_DATA),%a0
1552 jra 4f
1553 3: moveq #-1,%d0
1554 lea %a0@(BIR_SIZE),%a0
1555 4:
1556 func_return get_bi_record
1559 /*
1560 * MMU Initialization Begins Here
1561 *
1562 * The structure of the MMU tables on the 68k machines
1563 * is thus:
1564 * Root Table
1565 * Logical addresses are translated through
1566 * a hierarchical translation mechanism where the high-order
1567 * seven bits of the logical address (LA) are used as an
1568 * index into the "root table." Each entry in the root
1569 * table has a bit which specifies if it's a valid pointer to a
1570 * pointer table. Each entry defines a 32KMeg range of memory.
1571 * If an entry is invalid then that logical range of 32M is
1572 * invalid and references to that range of memory (when the MMU
1573 * is enabled) will fault. If the entry is valid, then it does
1574 * one of two things. On 040/060 class machines, it points to
1575 * a pointer table which then describes more finely the memory
1576 * within that 32M range. On 020/030 class machines, a technique
1577 * called "early terminating descriptors" are used. This technique
1578 * allows an entire 32Meg to be described by a single entry in the
1579 * root table. Thus, this entry in the root table, contains the
1580 * physical address of the memory or I/O at the logical address
1581 * which the entry represents and it also contains the necessary
1582 * cache bits for this region.
1583 *
1584 * Pointer Tables
1585 * Per the Root Table, there will be one or more
1586 * pointer tables. Each pointer table defines a 32M range.
1587 * Not all of the 32M range need be defined. Again, the next
1588 * seven bits of the logical address are used an index into
1589 * the pointer table to point to page tables (if the pointer
1590 * is valid). There will undoubtedly be more than one
1591 * pointer table for the kernel because each pointer table
1592 * defines a range of only 32M. Valid pointer table entries
1593 * point to page tables, or are early terminating entries
1594 * themselves.
1595 *
1596 * Page Tables
1597 * Per the Pointer Tables, each page table entry points
1598 * to the physical page in memory that supports the logical
1599 * address that translates to the particular index.
1600 *
1601 * In short, the Logical Address gets translated as follows:
1602 * bits 31..26 - index into the Root Table
1603 * bits 25..18 - index into the Pointer Table
1604 * bits 17..12 - index into the Page Table
1605 * bits 11..0 - offset into a particular 4K page
1606 *
1607 * The algorithms which follows do one thing: they abstract
1608 * the MMU hardware. For example, there are three kinds of
1609 * cache settings that are relevant. Either, memory is
1610 * being mapped in which case it is either Kernel Code (or
1611 * the RamDisk) or it is MMU data. On the 030, the MMU data
1612 * option also describes the kernel. Or, I/O is being mapped
1613 * in which case it has its own kind of cache bits. There
1614 * are constants which abstract these notions from the code that
1615 * actually makes the call to map some range of memory.
1616 *
1617 *
1618 *
1619 */
1621 #ifdef MMU_PRINT
1622 /*
1623 * mmu_print
1624 *
1625 * This algorithm will print out the current MMU mappings.
1626 *
1627 * Input:
1628 * %a5 points to the root table. Everything else is calculated
1629 * from this.
1630 */
1632 #define mmu_next_valid 0
1633 #define mmu_start_logical 4
1634 #define mmu_next_logical 8
1635 #define mmu_start_physical 12
1636 #define mmu_next_physical 16
1638 #define MMU_PRINT_INVALID -1
1639 #define MMU_PRINT_VALID 1
1640 #define MMU_PRINT_UNINITED 0
1642 #define putZc(z,n) jbne 1f; putc z; jbra 2f; 1: putc n; 2:
1644 func_start mmu_print,%a0-%a6/%d0-%d7
1646 movel %pc@(L(kernel_pgdir_ptr)),%a5
1647 lea %pc@(L(mmu_print_data)),%a0
1648 movel #MMU_PRINT_UNINITED,%a0@(mmu_next_valid)
1650 is_not_040_or_060(mmu_030_print)
1652 mmu_040_print:
1653 puts "\nMMU040\n"
1654 puts "rp:"
1655 putn %a5
1656 putc '\n'
1657 #if 0
1658 /*
1659 * The following #if/#endif block is a tight algorithm for dumping the 040
1660 * MMU Map in gory detail. It really isn't that practical unless the
1661 * MMU Map algorithm appears to go awry and you need to debug it at the
1662 * entry per entry level.
1663 */
1664 movel #ROOT_TABLE_SIZE,%d5
1665 #if 0
1666 movel %a5@+,%d7 | Burn an entry to skip the kernel mappings,
1667 subql #1,%d5 | they (might) work
1668 #endif
1669 1: tstl %d5
1670 jbeq mmu_print_done
1671 subq #1,%d5
1672 movel %a5@+,%d7
1673 btst #1,%d7
1674 jbeq 1b
1676 2: putn %d7
1677 andil #0xFFFFFE00,%d7
1678 movel %d7,%a4
1679 movel #PTR_TABLE_SIZE,%d4
1680 putc ' '
1681 3: tstl %d4
1682 jbeq 11f
1683 subq #1,%d4
1684 movel %a4@+,%d7
1685 btst #1,%d7
1686 jbeq 3b
1688 4: putn %d7
1689 andil #0xFFFFFF00,%d7
1690 movel %d7,%a3
1691 movel #PAGE_TABLE_SIZE,%d3
1692 5: movel #8,%d2
1693 6: tstl %d3
1694 jbeq 31f
1695 subq #1,%d3
1696 movel %a3@+,%d6
1697 btst #0,%d6
1698 jbeq 6b
1699 7: tstl %d2
1700 jbeq 8f
1701 subq #1,%d2
1702 putc ' '
1703 jbra 91f
1704 8: putc '\n'
1705 movel #8+1+8+1+1,%d2
1706 9: putc ' '
1707 dbra %d2,9b
1708 movel #7,%d2
1709 91: putn %d6
1710 jbra 6b
1712 31: putc '\n'
1713 movel #8+1,%d2
1714 32: putc ' '
1715 dbra %d2,32b
1716 jbra 3b
1718 11: putc '\n'
1719 jbra 1b
1720 #endif /* MMU 040 Dumping code that's gory and detailed */
1722 lea %pc@(kernel_pg_dir),%a5
1723 movel %a5,%a0 /* a0 has the address of the root table ptr */
1724 movel #0x00000000,%a4 /* logical address */
1725 moveql #0,%d0
1726 40:
1727 /* Increment the logical address and preserve in d5 */
1728 movel %a4,%d5
1729 addil #PAGESIZE<<13,%d5
1730 movel %a0@+,%d6
1731 btst #1,%d6
1732 jbne 41f
1733 jbsr mmu_print_tuple_invalidate
1734 jbra 48f
1735 41:
1736 movel #0,%d1
1737 andil #0xfffffe00,%d6
1738 movel %d6,%a1
1739 42:
1740 movel %a4,%d5
1741 addil #PAGESIZE<<6,%d5
1742 movel %a1@+,%d6
1743 btst #1,%d6
1744 jbne 43f
1745 jbsr mmu_print_tuple_invalidate
1746 jbra 47f
1747 43:
1748 movel #0,%d2
1749 andil #0xffffff00,%d6
1750 movel %d6,%a2
1751 44:
1752 movel %a4,%d5
1753 addil #PAGESIZE,%d5
1754 movel %a2@+,%d6
1755 btst #0,%d6
1756 jbne 45f
1757 jbsr mmu_print_tuple_invalidate
1758 jbra 46f
1759 45:
1760 moveml %d0-%d1,%sp@-
1761 movel %a4,%d0
1762 movel %d6,%d1
1763 andil #0xfffff4e0,%d1
1764 lea %pc@(mmu_040_print_flags),%a6
1765 jbsr mmu_print_tuple
1766 moveml %sp@+,%d0-%d1
1767 46:
1768 movel %d5,%a4
1769 addq #1,%d2
1770 cmpib #64,%d2
1771 jbne 44b
1772 47:
1773 movel %d5,%a4
1774 addq #1,%d1
1775 cmpib #128,%d1
1776 jbne 42b
1777 48:
1778 movel %d5,%a4 /* move to the next logical address */
1779 addq #1,%d0
1780 cmpib #128,%d0
1781 jbne 40b
1783 .chip 68040
1784 movec %dtt1,%d0
1785 movel %d0,%d1
1786 andiw #0x8000,%d1 /* is it valid ? */
1787 jbeq 1f /* No, bail out */
1789 movel %d0,%d1
1790 andil #0xff000000,%d1 /* Get the address */
1791 putn %d1
1792 puts "=="
1793 putn %d1
1795 movel %d0,%d6
1796 jbsr mmu_040_print_flags_tt
1797 1:
1798 movec %dtt0,%d0
1799 movel %d0,%d1
1800 andiw #0x8000,%d1 /* is it valid ? */
1801 jbeq 1f /* No, bail out */
1803 movel %d0,%d1
1804 andil #0xff000000,%d1 /* Get the address */
1805 putn %d1
1806 puts "=="
1807 putn %d1
1809 movel %d0,%d6
1810 jbsr mmu_040_print_flags_tt
1811 1:
1812 .chip 68k
1814 jbra mmu_print_done
1816 mmu_040_print_flags:
1817 btstl #10,%d6
1818 putZc(' ','G') /* global bit */
1819 btstl #7,%d6
1820 putZc(' ','S') /* supervisor bit */
1821 mmu_040_print_flags_tt:
1822 btstl #6,%d6
1823 jbne 3f
1824 putc 'C'
1825 btstl #5,%d6
1826 putZc('w','c') /* write through or copy-back */
1827 jbra 4f
1828 3:
1829 putc 'N'
1830 btstl #5,%d6
1831 putZc('s',' ') /* serialized non-cacheable, or non-cacheable */
1832 4:
1833 rts
1835 mmu_030_print_flags:
1836 btstl #6,%d6
1837 putZc('C','I') /* write through or copy-back */
1838 rts
1840 mmu_030_print:
1841 puts "\nMMU030\n"
1842 puts "\nrp:"
1843 putn %a5
1844 putc '\n'
1845 movel %a5,%d0
1846 andil #0xfffffff0,%d0
1847 movel %d0,%a0
1848 movel #0x00000000,%a4 /* logical address */
1849 movel #0,%d0
1850 30:
1851 movel %a4,%d5
1852 addil #PAGESIZE<<13,%d5
1853 movel %a0@+,%d6
1854 btst #1,%d6 /* is it a table ptr? */
1855 jbne 31f /* yes */
1856 btst #0,%d6 /* is it early terminating? */
1857 jbeq 1f /* no */
1858 jbsr mmu_030_print_helper
1859 jbra 38f
1860 1:
1861 jbsr mmu_print_tuple_invalidate
1862 jbra 38f
1863 31:
1864 movel #0,%d1
1865 andil #0xfffffff0,%d6
1866 movel %d6,%a1
1867 32:
1868 movel %a4,%d5
1869 addil #PAGESIZE<<6,%d5
1870 movel %a1@+,%d6
1871 btst #1,%d6 /* is it a table ptr? */
1872 jbne 33f /* yes */
1873 btst #0,%d6 /* is it a page descriptor? */
1874 jbeq 1f /* no */
1875 jbsr mmu_030_print_helper
1876 jbra 37f
1877 1:
1878 jbsr mmu_print_tuple_invalidate
1879 jbra 37f
1880 33:
1881 movel #0,%d2
1882 andil #0xfffffff0,%d6
1883 movel %d6,%a2
1884 34:
1885 movel %a4,%d5
1886 addil #PAGESIZE,%d5
1887 movel %a2@+,%d6
1888 btst #0,%d6
1889 jbne 35f
1890 jbsr mmu_print_tuple_invalidate
1891 jbra 36f
1892 35:
1893 jbsr mmu_030_print_helper
1894 36:
1895 movel %d5,%a4
1896 addq #1,%d2
1897 cmpib #64,%d2
1898 jbne 34b
1899 37:
1900 movel %d5,%a4
1901 addq #1,%d1
1902 cmpib #128,%d1
1903 jbne 32b
1904 38:
1905 movel %d5,%a4 /* move to the next logical address */
1906 addq #1,%d0
1907 cmpib #128,%d0
1908 jbne 30b
1910 mmu_print_done:
1911 puts "\n"
1913 func_return mmu_print
1916 mmu_030_print_helper:
1917 moveml %d0-%d1,%sp@-
1918 movel %a4,%d0
1919 movel %d6,%d1
1920 lea %pc@(mmu_030_print_flags),%a6
1921 jbsr mmu_print_tuple
1922 moveml %sp@+,%d0-%d1
1923 rts
1925 mmu_print_tuple_invalidate:
1926 moveml %a0/%d7,%sp@-
1928 lea %pc@(L(mmu_print_data)),%a0
1929 tstl %a0@(mmu_next_valid)
1930 jbmi mmu_print_tuple_invalidate_exit
1932 movel #MMU_PRINT_INVALID,%a0@(mmu_next_valid)
1934 putn %a4
1936 puts "##\n"
1938 mmu_print_tuple_invalidate_exit:
1939 moveml %sp@+,%a0/%d7
1940 rts
1943 mmu_print_tuple:
1944 moveml %d0-%d7/%a0,%sp@-
1946 lea %pc@(L(mmu_print_data)),%a0
1948 tstl %a0@(mmu_next_valid)
1949 jble mmu_print_tuple_print
1951 cmpl %a0@(mmu_next_physical),%d1
1952 jbeq mmu_print_tuple_increment
1954 mmu_print_tuple_print:
1955 putn %d0
1956 puts "->"
1957 putn %d1
1959 movel %d1,%d6
1960 jbsr %a6@
1962 mmu_print_tuple_record:
1963 movel #MMU_PRINT_VALID,%a0@(mmu_next_valid)
1965 movel %d1,%a0@(mmu_next_physical)
1967 mmu_print_tuple_increment:
1968 movel %d5,%d7
1969 subl %a4,%d7
1970 addl %d7,%a0@(mmu_next_physical)
1972 mmu_print_tuple_exit:
1973 moveml %sp@+,%d0-%d7/%a0
1974 rts
1976 mmu_print_machine_cpu_types:
1977 puts "machine: "
1979 is_not_amiga(1f)
1980 puts "amiga"
1981 jbra 9f
1982 1:
1983 is_not_atari(2f)
1984 puts "atari"
1985 jbra 9f
1986 2:
1987 is_not_mac(3f)
1988 puts "macintosh"
1989 jbra 9f
1990 3: puts "unknown"
1991 9: putc '\n'
1993 puts "cputype: 0"
1994 is_not_060(1f)
1995 putc '6'
1996 jbra 9f
1997 1:
1998 is_not_040_or_060(2f)
1999 putc '4'
2000 jbra 9f
2001 2: putc '3'
2002 9: putc '0'
2003 putc '\n'
2005 rts
2006 #endif /* MMU_PRINT */
2008 /*
2009 * mmu_map_tt
2010 *
2011 * This is a specific function which works on all 680x0 machines.
2012 * On 030, 040 & 060 it will attempt to use Transparent Translation
2013 * registers (tt1).
2014 * On 020 it will call the standard mmu_map which will use early
2015 * terminating descriptors.
2016 */
2017 func_start mmu_map_tt,%d0/%d1/%a0,4
2019 dputs "mmu_map_tt:"
2020 dputn ARG1
2021 dputn ARG2
2022 dputn ARG3
2023 dputn ARG4
2024 dputc '\n'
2026 is_020(L(do_map))
2028 /* Extract the highest bit set
2029 */
2030 bfffo ARG3{#0,#32},%d1
2031 cmpw #8,%d1
2032 jcc L(do_map)
2034 /* And get the mask
2035 */
2036 moveq #-1,%d0
2037 lsrl %d1,%d0
2038 lsrl #1,%d0
2040 /* Mask the address
2041 */
2042 movel %d0,%d1
2043 notl %d1
2044 andl ARG2,%d1
2046 /* Generate the upper 16bit of the tt register
2047 */
2048 lsrl #8,%d0
2049 orl %d0,%d1
2050 clrw %d1
2052 is_040_or_060(L(mmu_map_tt_040))
2054 /* set 030 specific bits (read/write access for supervisor mode
2055 * (highest function code set, lower two bits masked))
2056 */
2057 orw #TTR_ENABLE+TTR_RWM+TTR_FCB2+TTR_FCM1+TTR_FCM0,%d1
2058 movel ARG4,%d0
2059 btst #6,%d0
2060 jeq 1f
2061 orw #TTR_CI,%d1
2063 1: lea STACK,%a0
2064 dputn %d1
2065 movel %d1,%a0@
2066 .chip 68030
2067 tstl ARG1
2068 jne 1f
2069 pmove %a0@,%tt0
2070 jra 2f
2071 1: pmove %a0@,%tt1
2072 2: .chip 68k
2073 jra L(mmu_map_tt_done)
2075 /* set 040 specific bits
2076 */
2077 L(mmu_map_tt_040):
2078 orw #TTR_ENABLE+TTR_KERNELMODE,%d1
2079 orl ARG4,%d1
2080 dputn %d1
2082 .chip 68040
2083 tstl ARG1
2084 jne 1f
2085 movec %d1,%itt0
2086 movec %d1,%dtt0
2087 jra 2f
2088 1: movec %d1,%itt1
2089 movec %d1,%dtt1
2090 2: .chip 68k
2092 jra L(mmu_map_tt_done)
2094 L(do_map):
2095 mmu_map_eq ARG2,ARG3,ARG4
2097 L(mmu_map_tt_done):
2099 func_return mmu_map_tt
2101 /*
2102 * mmu_map
2103 *
2104 * This routine will map a range of memory using a pointer
2105 * table and allocating the pages on the fly from the kernel.
2106 * The pointer table does not have to be already linked into
2107 * the root table, this routine will do that if necessary.
2108 *
2109 * NOTE
2110 * This routine will assert failure and use the serial_putc
2111 * routines in the case of a run-time error. For example,
2112 * if the address is already mapped.
2113 *
2114 * NOTE-2
2115 * This routine will use early terminating descriptors
2116 * where possible for the 68020+68851 and 68030 type
2117 * processors.
2118 */
2119 func_start mmu_map,%d0-%d4/%a0-%a4
2121 dputs "\nmmu_map:"
2122 dputn ARG1
2123 dputn ARG2
2124 dputn ARG3
2125 dputn ARG4
2126 dputc '\n'
2128 /* Get logical address and round it down to 256KB
2129 */
2130 movel ARG1,%d0
2131 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2132 movel %d0,%a3
2134 /* Get the end address
2135 */
2136 movel ARG1,%a4
2137 addl ARG3,%a4
2138 subql #1,%a4
2140 /* Get physical address and round it down to 256KB
2141 */
2142 movel ARG2,%d0
2143 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2144 movel %d0,%a2
2146 /* Add page attributes to the physical address
2147 */
2148 movel ARG4,%d0
2149 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2150 addw %d0,%a2
2152 dputn %a2
2153 dputn %a3
2154 dputn %a4
2156 is_not_040_or_060(L(mmu_map_030))
2158 addw #_PAGE_GLOBAL040,%a2
2159 /*
2160 * MMU 040 & 060 Support
2161 *
2162 * The MMU usage for the 040 and 060 is different enough from
2163 * the 030 and 68851 that there is separate code. This comment
2164 * block describes the data structures and algorithms built by
2165 * this code.
2166 *
2167 * The 040 does not support early terminating descriptors, as
2168 * the 030 does. Therefore, a third level of table is needed
2169 * for the 040, and that would be the page table. In Linux,
2170 * page tables are allocated directly from the memory above the
2171 * kernel.
2172 *
2173 */
2175 L(mmu_map_040):
2176 /* Calculate the offset into the root table
2177 */
2178 movel %a3,%d0
2179 moveq #ROOT_INDEX_SHIFT,%d1
2180 lsrl %d1,%d0
2181 mmu_get_root_table_entry %d0
2183 /* Calculate the offset into the pointer table
2184 */
2185 movel %a3,%d0
2186 moveq #PTR_INDEX_SHIFT,%d1
2187 lsrl %d1,%d0
2188 andl #PTR_TABLE_SIZE-1,%d0
2189 mmu_get_ptr_table_entry %a0,%d0
2191 /* Calculate the offset into the page table
2192 */
2193 movel %a3,%d0
2194 moveq #PAGE_INDEX_SHIFT,%d1
2195 lsrl %d1,%d0
2196 andl #PAGE_TABLE_SIZE-1,%d0
2197 mmu_get_page_table_entry %a0,%d0
2199 /* The page table entry must not no be busy
2200 */
2201 tstl %a0@
2202 jne L(mmu_map_error)
2204 /* Do the mapping and advance the pointers
2205 */
2206 movel %a2,%a0@
2207 2:
2208 addw #PAGESIZE,%a2
2209 addw #PAGESIZE,%a3
2211 /* Ready with mapping?
2212 */
2213 lea %a3@(-1),%a0
2214 cmpl %a0,%a4
2215 jhi L(mmu_map_040)
2216 jra L(mmu_map_done)
2218 L(mmu_map_030):
2219 /* Calculate the offset into the root table
2220 */
2221 movel %a3,%d0
2222 moveq #ROOT_INDEX_SHIFT,%d1
2223 lsrl %d1,%d0
2224 mmu_get_root_table_entry %d0
2226 /* Check if logical address 32MB aligned,
2227 * so we can try to map it once
2228 */
2229 movel %a3,%d0
2230 andl #(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1)&(-ROOT_TABLE_SIZE),%d0
2231 jne 1f
2233 /* Is there enough to map for 32MB at once
2234 */
2235 lea %a3@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1),%a1
2236 cmpl %a1,%a4
2237 jcs 1f
2239 addql #1,%a1
2241 /* The root table entry must not no be busy
2242 */
2243 tstl %a0@
2244 jne L(mmu_map_error)
2246 /* Do the mapping and advance the pointers
2247 */
2248 dputs "early term1"
2249 dputn %a2
2250 dputn %a3
2251 dputn %a1
2252 dputc '\n'
2253 movel %a2,%a0@
2255 movel %a1,%a3
2256 lea %a2@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE),%a2
2257 jra L(mmu_mapnext_030)
2258 1:
2259 /* Calculate the offset into the pointer table
2260 */
2261 movel %a3,%d0
2262 moveq #PTR_INDEX_SHIFT,%d1
2263 lsrl %d1,%d0
2264 andl #PTR_TABLE_SIZE-1,%d0
2265 mmu_get_ptr_table_entry %a0,%d0
2267 /* The pointer table entry must not no be busy
2268 */
2269 tstl %a0@
2270 jne L(mmu_map_error)
2272 /* Do the mapping and advance the pointers
2273 */
2274 dputs "early term2"
2275 dputn %a2
2276 dputn %a3
2277 dputc '\n'
2278 movel %a2,%a0@
2280 addl #PAGE_TABLE_SIZE*PAGESIZE,%a2
2281 addl #PAGE_TABLE_SIZE*PAGESIZE,%a3
2283 L(mmu_mapnext_030):
2284 /* Ready with mapping?
2285 */
2286 lea %a3@(-1),%a0
2287 cmpl %a0,%a4
2288 jhi L(mmu_map_030)
2289 jra L(mmu_map_done)
2291 L(mmu_map_error):
2293 dputs "mmu_map error:"
2294 dputn %a2
2295 dputn %a3
2296 dputc '\n'
2298 L(mmu_map_done):
2300 func_return mmu_map
2302 /*
2303 * mmu_fixup
2304 *
2305 * On the 040 class machines, all pages that are used for the
2306 * mmu have to be fixed up.
2307 */
2309 func_start mmu_fixup_page_mmu_cache,%d0/%a0
2311 dputs "mmu_fixup_page_mmu_cache"
2312 dputn ARG1
2314 /* Calculate the offset into the root table
2315 */
2316 movel ARG1,%d0
2317 moveq #ROOT_INDEX_SHIFT,%d1
2318 lsrl %d1,%d0
2319 mmu_get_root_table_entry %d0
2321 /* Calculate the offset into the pointer table
2322 */
2323 movel ARG1,%d0
2324 moveq #PTR_INDEX_SHIFT,%d1
2325 lsrl %d1,%d0
2326 andl #PTR_TABLE_SIZE-1,%d0
2327 mmu_get_ptr_table_entry %a0,%d0
2329 /* Calculate the offset into the page table
2330 */
2331 movel ARG1,%d0
2332 moveq #PAGE_INDEX_SHIFT,%d1
2333 lsrl %d1,%d0
2334 andl #PAGE_TABLE_SIZE-1,%d0
2335 mmu_get_page_table_entry %a0,%d0
2337 movel %a0@,%d0
2338 andil #_CACHEMASK040,%d0
2339 orl %pc@(m68k_pgtable_cachemode),%d0
2340 movel %d0,%a0@
2342 dputc '\n'
2344 func_return mmu_fixup_page_mmu_cache
2346 /*
2347 * mmu_temp_map
2348 *
2349 * create a temporary mapping to enable the mmu,
2350 * this we don't need any transparation translation tricks.
2351 */
2353 func_start mmu_temp_map,%d0/%d1/%a0/%a1
2355 dputs "mmu_temp_map"
2356 dputn ARG1
2357 dputn ARG2
2358 dputc '\n'
2360 lea %pc@(L(temp_mmap_mem)),%a1
2362 /* Calculate the offset in the root table
2363 */
2364 movel ARG2,%d0
2365 moveq #ROOT_INDEX_SHIFT,%d1
2366 lsrl %d1,%d0
2367 mmu_get_root_table_entry %d0
2369 /* Check if the table is temporary allocated, so we have to reuse it
2370 */
2371 movel %a0@,%d0
2372 cmpl %pc@(L(memory_start)),%d0
2373 jcc 1f
2375 /* Temporary allocate a ptr table and insert it into the root table
2376 */
2377 movel %a1@,%d0
2378 addl #PTR_TABLE_SIZE*4,%a1@
2379 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2380 movel %d0,%a0@
2381 dputs " (new)"
2382 1:
2383 dputn %d0
2384 /* Mask the root table entry for the ptr table
2385 */
2386 andw #-ROOT_TABLE_SIZE,%d0
2387 movel %d0,%a0
2389 /* Calculate the offset into the pointer table
2390 */
2391 movel ARG2,%d0
2392 moveq #PTR_INDEX_SHIFT,%d1
2393 lsrl %d1,%d0
2394 andl #PTR_TABLE_SIZE-1,%d0
2395 lea %a0@(%d0*4),%a0
2396 dputn %a0
2398 /* Check if a temporary page table is already allocated
2399 */
2400 movel %a0@,%d0
2401 jne 1f
2403 /* Temporary allocate a page table and insert it into the ptr table
2404 */
2405 movel %a1@,%d0
2406 /* The 512 should be PAGE_TABLE_SIZE*4, but that violates the
2407 alignment restriction for pointer tables on the '0[46]0. */
2408 addl #512,%a1@
2409 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2410 movel %d0,%a0@
2411 dputs " (new)"
2412 1:
2413 dputn %d0
2414 /* Mask the ptr table entry for the page table
2415 */
2416 andw #-PTR_TABLE_SIZE,%d0
2417 movel %d0,%a0
2419 /* Calculate the offset into the page table
2420 */
2421 movel ARG2,%d0
2422 moveq #PAGE_INDEX_SHIFT,%d1
2423 lsrl %d1,%d0
2424 andl #PAGE_TABLE_SIZE-1,%d0
2425 lea %a0@(%d0*4),%a0
2426 dputn %a0
2428 /* Insert the address into the page table
2429 */
2430 movel ARG1,%d0
2431 andw #-PAGESIZE,%d0
2432 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2433 movel %d0,%a0@
2434 dputn %d0
2436 dputc '\n'
2438 func_return mmu_temp_map
2440 func_start mmu_engage,%d0-%d2/%a0-%a3
2442 moveq #ROOT_TABLE_SIZE-1,%d0
2443 /* Temporarily use a different root table. */
2444 lea %pc@(L(kernel_pgdir_ptr)),%a0
2445 movel %a0@,%a2
2446 movel %pc@(L(memory_start)),%a1
2447 movel %a1,%a0@
2448 movel %a2,%a0
2449 1:
2450 movel %a0@+,%a1@+
2451 dbra %d0,1b
2453 lea %pc@(L(temp_mmap_mem)),%a0
2454 movel %a1,%a0@
2456 movew #PAGESIZE-1,%d0
2457 1:
2458 clrl %a1@+
2459 dbra %d0,1b
2461 lea %pc@(1b),%a0
2462 movel #1b,%a1
2463 /* Skip temp mappings if phys == virt */
2464 cmpl %a0,%a1
2465 jeq 1f
2467 mmu_temp_map %a0,%a0
2468 mmu_temp_map %a0,%a1
2470 addw #PAGESIZE,%a0
2471 addw #PAGESIZE,%a1
2472 mmu_temp_map %a0,%a0
2473 mmu_temp_map %a0,%a1
2474 1:
2475 movel %pc@(L(memory_start)),%a3
2476 movel %pc@(L(phys_kernel_start)),%d2
2478 is_not_040_or_060(L(mmu_engage_030))
2480 L(mmu_engage_040):
2481 .chip 68040
2482 nop
2483 cinva %bc
2484 nop
2485 pflusha
2486 nop
2487 movec %a3,%srp
2488 movel #TC_ENABLE+TC_PAGE4K,%d0
2489 movec %d0,%tc /* enable the MMU */
2490 jmp 1f:l
2491 1: nop
2492 movec %a2,%srp
2493 nop
2494 cinva %bc
2495 nop
2496 pflusha
2497 .chip 68k
2498 jra L(mmu_engage_cleanup)
2500 L(mmu_engage_030_temp):
2501 .space 12
2502 L(mmu_engage_030):
2503 .chip 68030
2504 lea %pc@(L(mmu_engage_030_temp)),%a0
2505 movel #0x80000002,%a0@
2506 movel %a3,%a0@(4)
2507 movel #0x0808,%d0
2508 movec %d0,%cacr
2509 pmove %a0@,%srp
2510 pflusha
2511 /*
2512 * enable,super root enable,4096 byte pages,7 bit root index,
2513 * 7 bit pointer index, 6 bit page table index.
2514 */
2515 movel #0x82c07760,%a0@(8)
2516 pmove %a0@(8),%tc /* enable the MMU */
2517 jmp 1f:l
2518 1: movel %a2,%a0@(4)
2519 movel #0x0808,%d0
2520 movec %d0,%cacr
2521 pmove %a0@,%srp
2522 pflusha
2523 .chip 68k
2525 L(mmu_engage_cleanup):
2526 subl #PAGE_OFFSET,%d2
2527 subl %d2,%a2
2528 movel %a2,L(kernel_pgdir_ptr)
2529 subl %d2,%fp
2530 subl %d2,%sp
2531 subl %d2,ARG0
2533 func_return mmu_engage
2535 func_start mmu_get_root_table_entry,%d0/%a1
2537 #if 0
2538 dputs "mmu_get_root_table_entry:"
2539 dputn ARG1
2540 dputs " ="
2541 #endif
2543 movel %pc@(L(kernel_pgdir_ptr)),%a0
2544 tstl %a0
2545 jne 2f
2547 dputs "\nmmu_init:"
2549 /* Find the start of free memory, get_bi_record does this for us,
2550 * as the bootinfo structure is located directly behind the kernel
2551 * and and we simply search for the last entry.
2552 */
2553 get_bi_record BI_LAST
2554 addw #PAGESIZE-1,%a0
2555 movel %a0,%d0
2556 andw #-PAGESIZE,%d0
2558 dputn %d0
2560 lea %pc@(L(memory_start)),%a0
2561 movel %d0,%a0@
2562 lea %pc@(L(kernel_end)),%a0
2563 movel %d0,%a0@
2565 /* we have to return the first page at _stext since the init code
2566 * in mm/init.c simply expects kernel_pg_dir there, the rest of
2567 * page is used for further ptr tables in get_ptr_table.
2568 */
2569 lea %pc@(_stext),%a0
2570 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2571 movel %a0,%a1@
2572 addl #ROOT_TABLE_SIZE*4,%a1@
2574 lea %pc@(L(mmu_num_pointer_tables)),%a1
2575 addql #1,%a1@
2577 /* clear the page
2578 */
2579 movel %a0,%a1
2580 movew #PAGESIZE/4-1,%d0
2581 1:
2582 clrl %a1@+
2583 dbra %d0,1b
2585 lea %pc@(L(kernel_pgdir_ptr)),%a1
2586 movel %a0,%a1@
2588 dputn %a0
2589 dputc '\n'
2590 2:
2591 movel ARG1,%d0
2592 lea %a0@(%d0*4),%a0
2594 #if 0
2595 dputn %a0
2596 dputc '\n'
2597 #endif
2599 func_return mmu_get_root_table_entry
2603 func_start mmu_get_ptr_table_entry,%d0/%a1
2605 #if 0
2606 dputs "mmu_get_ptr_table_entry:"
2607 dputn ARG1
2608 dputn ARG2
2609 dputs " ="
2610 #endif
2612 movel ARG1,%a0
2613 movel %a0@,%d0
2614 jne 2f
2616 /* Keep track of the number of pointer tables we use
2617 */
2618 dputs "\nmmu_get_new_ptr_table:"
2619 lea %pc@(L(mmu_num_pointer_tables)),%a0
2620 movel %a0@,%d0
2621 addql #1,%a0@
2623 /* See if there is a free pointer table in our cache of pointer tables
2624 */
2625 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2626 andw #7,%d0
2627 jne 1f
2629 /* Get a new pointer table page from above the kernel memory
2630 */
2631 get_new_page
2632 movel %a0,%a1@
2633 1:
2634 /* There is an unused pointer table in our cache... use it
2635 */
2636 movel %a1@,%d0
2637 addl #PTR_TABLE_SIZE*4,%a1@
2639 dputn %d0
2640 dputc '\n'
2642 /* Insert the new pointer table into the root table
2643 */
2644 movel ARG1,%a0
2645 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2646 movel %d0,%a0@
2647 2:
2648 /* Extract the pointer table entry
2649 */
2650 andw #-PTR_TABLE_SIZE,%d0
2651 movel %d0,%a0
2652 movel ARG2,%d0
2653 lea %a0@(%d0*4),%a0
2655 #if 0
2656 dputn %a0
2657 dputc '\n'
2658 #endif
2660 func_return mmu_get_ptr_table_entry
2663 func_start mmu_get_page_table_entry,%d0/%a1
2665 #if 0
2666 dputs "mmu_get_page_table_entry:"
2667 dputn ARG1
2668 dputn ARG2
2669 dputs " ="
2670 #endif
2672 movel ARG1,%a0
2673 movel %a0@,%d0
2674 jne 2f
2676 /* If the page table entry doesn't exist, we allocate a complete new
2677 * page and use it as one continues big page table which can cover
2678 * 4MB of memory, nearly almost all mappings have that alignment.
2679 */
2680 get_new_page
2681 addw #_PAGE_TABLE+_PAGE_ACCESSED,%a0
2683 /* align pointer table entry for a page of page tables
2684 */
2685 movel ARG1,%d0
2686 andw #-(PAGESIZE/PAGE_TABLE_SIZE),%d0
2687 movel %d0,%a1
2689 /* Insert the page tables into the pointer entries
2690 */
2691 moveq #PAGESIZE/PAGE_TABLE_SIZE/4-1,%d0
2692 1:
2693 movel %a0,%a1@+
2694 lea %a0@(PAGE_TABLE_SIZE*4),%a0
2695 dbra %d0,1b
2697 /* Now we can get the initialized pointer table entry
2698 */
2699 movel ARG1,%a0
2700 movel %a0@,%d0
2701 2:
2702 /* Extract the page table entry
2703 */
2704 andw #-PAGE_TABLE_SIZE,%d0
2705 movel %d0,%a0
2706 movel ARG2,%d0
2707 lea %a0@(%d0*4),%a0
2709 #if 0
2710 dputn %a0
2711 dputc '\n'
2712 #endif
2714 func_return mmu_get_page_table_entry
2716 /*
2717 * get_new_page
2718 *
2719 * Return a new page from the memory start and clear it.
2720 */
2721 func_start get_new_page,%d0/%a1
2723 dputs "\nget_new_page:"
2725 /* allocate the page and adjust memory_start
2726 */
2727 lea %pc@(L(memory_start)),%a0
2728 movel %a0@,%a1
2729 addl #PAGESIZE,%a0@
2731 /* clear the new page
2732 */
2733 movel %a1,%a0
2734 movew #PAGESIZE/4-1,%d0
2735 1:
2736 clrl %a1@+
2737 dbra %d0,1b
2739 dputn %a0
2740 dputc '\n'
2742 func_return get_new_page
2746 /*
2747 * Debug output support
2748 * Atarians have a choice between the parallel port, the serial port
2749 * from the MFP or a serial port of the SCC
2750 */
2752 #ifdef CONFIG_MAC
2754 L(scc_initable_mac):
2755 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2756 .byte 3,0xc0 /* receiver: 8 bpc */
2757 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2758 .byte 10,0 /* NRZ */
2759 .byte 11,0x50 /* use baud rate generator */
2760 .byte 12,1,13,0 /* 38400 baud */
2761 .byte 14,1 /* Baud rate generator enable */
2762 .byte 3,0xc1 /* enable receiver */
2763 .byte 5,0xea /* enable transmitter */
2764 .byte -1
2765 .even
2766 #endif
2768 #ifdef CONFIG_ATARI
2769 /* #define USE_PRINTER */
2770 /* #define USE_SCC_B */
2771 /* #define USE_SCC_A */
2772 #define USE_MFP
2774 #if defined(USE_SCC_A) || defined(USE_SCC_B)
2775 #define USE_SCC
2776 /* Initialisation table for SCC */
2777 L(scc_initable):
2778 .byte 9,12 /* Reset */
2779 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2780 .byte 3,0xc0 /* receiver: 8 bpc */
2781 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2782 .byte 9,0 /* no interrupts */
2783 .byte 10,0 /* NRZ */
2784 .byte 11,0x50 /* use baud rate generator */
2785 .byte 12,24,13,0 /* 9600 baud */
2786 .byte 14,2,14,3 /* use master clock for BRG, enable */
2787 .byte 3,0xc1 /* enable receiver */
2788 .byte 5,0xea /* enable transmitter */
2789 .byte -1
2790 .even
2791 #endif
2793 #ifdef USE_PRINTER
2795 LPSG_SELECT = 0xff8800
2796 LPSG_READ = 0xff8800
2797 LPSG_WRITE = 0xff8802
2798 LPSG_IO_A = 14
2799 LPSG_IO_B = 15
2800 LPSG_CONTROL = 7
2801 LSTMFP_GPIP = 0xfffa01
2802 LSTMFP_DDR = 0xfffa05
2803 LSTMFP_IERB = 0xfffa09
2805 #elif defined(USE_SCC_B)
2807 LSCC_CTRL = 0xff8c85
2808 LSCC_DATA = 0xff8c87
2810 #elif defined(USE_SCC_A)
2812 LSCC_CTRL = 0xff8c81
2813 LSCC_DATA = 0xff8c83
2815 #elif defined(USE_MFP)
2817 LMFP_UCR = 0xfffa29
2818 LMFP_TDCDR = 0xfffa1d
2819 LMFP_TDDR = 0xfffa25
2820 LMFP_TSR = 0xfffa2d
2821 LMFP_UDR = 0xfffa2f
2823 #endif
2824 #endif /* CONFIG_ATARI */
2826 /*
2827 * Serial port output support.
2828 */
2830 /*
2831 * Initialize serial port hardware for 9600/8/1
2832 */
2833 func_start serial_init,%d0/%d1/%a0/%a1
2834 /*
2835 * Some of the register usage that follows
2836 * CONFIG_AMIGA
2837 * a0 = pointer to boot info record
2838 * d0 = boot info offset
2839 * CONFIG_ATARI
2840 * a0 = address of SCC
2841 * a1 = Liobase address/address of scc_initable
2842 * d0 = init data for serial port
2843 * CONFIG_MAC
2844 * a0 = address of SCC
2845 * a1 = address of scc_initable_mac
2846 * d0 = init data for serial port
2847 */
2849 #ifdef CONFIG_AMIGA
2850 #define SERIAL_DTR 7
2851 #define SERIAL_CNTRL CIABBASE+C_PRA
2853 is_not_amiga(1f)
2854 lea %pc@(L(custom)),%a0
2855 movel #-ZTWOBASE,%a0@
2856 bclr #SERIAL_DTR,SERIAL_CNTRL-ZTWOBASE
2857 get_bi_record BI_AMIGA_SERPER
2858 movew %a0@,CUSTOMBASE+C_SERPER-ZTWOBASE
2859 | movew #61,CUSTOMBASE+C_SERPER-ZTWOBASE
2860 1:
2861 #endif
2862 #ifdef CONFIG_ATARI
2863 is_not_atari(4f)
2864 movel %pc@(L(iobase)),%a1
2865 #if defined(USE_PRINTER)
2866 bclr #0,%a1@(LSTMFP_IERB)
2867 bclr #0,%a1@(LSTMFP_DDR)
2868 moveb #LPSG_CONTROL,%a1@(LPSG_SELECT)
2869 moveb #0xff,%a1@(LPSG_WRITE)
2870 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
2871 clrb %a1@(LPSG_WRITE)
2872 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
2873 moveb %a1@(LPSG_READ),%d0
2874 bset #5,%d0
2875 moveb %d0,%a1@(LPSG_WRITE)
2876 #elif defined(USE_SCC)
2877 lea %a1@(LSCC_CTRL),%a0
2878 lea %pc@(L(scc_initable)),%a1
2879 2: moveb %a1@+,%d0
2880 jmi 3f
2881 moveb %d0,%a0@
2882 moveb %a1@+,%a0@
2883 jra 2b
2884 3: clrb %a0@
2885 #elif defined(USE_MFP)
2886 bclr #1,%a1@(LMFP_TSR)
2887 moveb #0x88,%a1@(LMFP_UCR)
2888 andb #0x70,%a1@(LMFP_TDCDR)
2889 moveb #2,%a1@(LMFP_TDDR)
2890 orb #1,%a1@(LMFP_TDCDR)
2891 bset #1,%a1@(LMFP_TSR)
2892 #endif
2893 jra L(serial_init_done)
2894 4:
2895 #endif
2896 #ifdef CONFIG_MAC
2897 is_not_mac(L(serial_init_not_mac))
2899 #ifdef SERIAL_DEBUG
2901 /* You may define either or both of these. */
2902 #define MAC_USE_SCC_A /* Modem port */
2903 #define MAC_USE_SCC_B /* Printer port */
2905 #define mac_scc_cha_b_ctrl_offset 0x0
2906 #define mac_scc_cha_a_ctrl_offset 0x2
2907 #define mac_scc_cha_b_data_offset 0x4
2908 #define mac_scc_cha_a_data_offset 0x6
2910 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
2911 movel %pc@(L(mac_sccbase)),%a0
2912 /* Reset SCC register pointer */
2913 moveb %a0@(mac_scc_cha_a_ctrl_offset),%d0
2914 /* Reset SCC device: write register pointer then register value */
2915 moveb #9,%a0@(mac_scc_cha_a_ctrl_offset)
2916 moveb #0xc0,%a0@(mac_scc_cha_a_ctrl_offset)
2917 /* Wait for 5 PCLK cycles, which is about 68 CPU cycles */
2918 /* 5 / 3.6864 MHz = approx. 1.36 us = 68 / 50 MHz */
2919 movel #35,%d0
2920 5:
2921 subq #1,%d0
2922 jne 5b
2923 #endif
2925 #ifdef MAC_USE_SCC_A
2926 /* Initialize channel A */
2927 lea %pc@(L(scc_initable_mac)),%a1
2928 5: moveb %a1@+,%d0
2929 jmi 6f
2930 moveb %d0,%a0@(mac_scc_cha_a_ctrl_offset)
2931 moveb %a1@+,%a0@(mac_scc_cha_a_ctrl_offset)
2932 jra 5b
2933 6:
2934 #endif /* MAC_USE_SCC_A */
2936 #ifdef MAC_USE_SCC_B
2937 /* Initialize channel B */
2938 lea %pc@(L(scc_initable_mac)),%a1
2939 7: moveb %a1@+,%d0
2940 jmi 8f
2941 moveb %d0,%a0@(mac_scc_cha_b_ctrl_offset)
2942 moveb %a1@+,%a0@(mac_scc_cha_b_ctrl_offset)
2943 jra 7b
2944 8:
2945 #endif /* MAC_USE_SCC_B */
2947 #endif /* SERIAL_DEBUG */
2949 jra L(serial_init_done)
2950 L(serial_init_not_mac):
2951 #endif /* CONFIG_MAC */
2953 #ifdef CONFIG_Q40
2954 is_not_q40(2f)
2955 /* debug output goes into SRAM, so we don't do it unless requested
2956 - check for '%LX$' signature in SRAM */
2957 lea %pc@(q40_mem_cptr),%a1
2958 move.l #0xff020010,%a1@ /* must be inited - also used by debug=mem */
2959 move.l #0xff020000,%a1
2960 cmp.b #'%',%a1@
2961 bne 2f /*nodbg*/
2962 addq.w #4,%a1
2963 cmp.b #'L',%a1@
2964 bne 2f /*nodbg*/
2965 addq.w #4,%a1
2966 cmp.b #'X',%a1@
2967 bne 2f /*nodbg*/
2968 addq.w #4,%a1
2969 cmp.b #'$',%a1@
2970 bne 2f /*nodbg*/
2971 /* signature OK */
2972 lea %pc@(L(q40_do_debug)),%a1
2973 tas %a1@
2974 /*nodbg: q40_do_debug is 0 by default*/
2975 2:
2976 #endif
2978 #ifdef CONFIG_APOLLO
2979 /* We count on the PROM initializing SIO1 */
2980 #endif
2982 #ifdef CONFIG_HP300
2983 /* We count on the boot loader initialising the UART */
2984 #endif
2986 L(serial_init_done):
2987 func_return serial_init
2989 /*
2990 * Output character on serial port.
2991 */
2992 func_start serial_putc,%d0/%d1/%a0/%a1
2994 movel ARG1,%d0
2995 cmpib #'\n',%d0
2996 jbne 1f
2998 /* A little safe recursion is good for the soul */
2999 serial_putc #'\r'
3000 1:
3002 #ifdef CONFIG_AMIGA
3003 is_not_amiga(2f)
3004 andw #0x00ff,%d0
3005 oriw #0x0100,%d0
3006 movel %pc@(L(custom)),%a0
3007 movew %d0,%a0@(CUSTOMBASE+C_SERDAT)
3008 1: movew %a0@(CUSTOMBASE+C_SERDATR),%d0
3009 andw #0x2000,%d0
3010 jeq 1b
3011 jra L(serial_putc_done)
3012 2:
3013 #endif
3015 #ifdef CONFIG_MAC
3016 is_not_mac(5f)
3018 #ifdef SERIAL_DEBUG
3020 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
3021 movel %pc@(L(mac_sccbase)),%a1
3022 #endif
3024 #ifdef MAC_USE_SCC_A
3025 3: btst #2,%a1@(mac_scc_cha_a_ctrl_offset)
3026 jeq 3b
3027 moveb %d0,%a1@(mac_scc_cha_a_data_offset)
3028 #endif /* MAC_USE_SCC_A */
3030 #ifdef MAC_USE_SCC_B
3031 4: btst #2,%a1@(mac_scc_cha_b_ctrl_offset)
3032 jeq 4b
3033 moveb %d0,%a1@(mac_scc_cha_b_data_offset)
3034 #endif /* MAC_USE_SCC_B */
3036 #endif /* SERIAL_DEBUG */
3038 jra L(serial_putc_done)
3039 5:
3040 #endif /* CONFIG_MAC */
3042 #ifdef CONFIG_ATARI
3043 is_not_atari(4f)
3044 movel %pc@(L(iobase)),%a1
3045 #if defined(USE_PRINTER)
3046 3: btst #0,%a1@(LSTMFP_GPIP)
3047 jne 3b
3048 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
3049 moveb %d0,%a1@(LPSG_WRITE)
3050 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
3051 moveb %a1@(LPSG_READ),%d0
3052 bclr #5,%d0
3053 moveb %d0,%a1@(LPSG_WRITE)
3054 nop
3055 nop
3056 bset #5,%d0
3057 moveb %d0,%a1@(LPSG_WRITE)
3058 #elif defined(USE_SCC)
3059 3: btst #2,%a1@(LSCC_CTRL)
3060 jeq 3b
3061 moveb %d0,%a1@(LSCC_DATA)
3062 #elif defined(USE_MFP)
3063 3: btst #7,%a1@(LMFP_TSR)
3064 jeq 3b
3065 moveb %d0,%a1@(LMFP_UDR)
3066 #endif
3067 jra L(serial_putc_done)
3068 4:
3069 #endif /* CONFIG_ATARI */
3071 #ifdef CONFIG_MVME147
3072 is_not_mvme147(2f)
3073 1: btst #2,M147_SCC_CTRL_A
3074 jeq 1b
3075 moveb %d0,M147_SCC_DATA_A
3076 jbra L(serial_putc_done)
3077 2:
3078 #endif
3080 #ifdef CONFIG_MVME16x
3081 is_not_mvme16x(2f)
3082 /*
3083 * If the loader gave us a board type then we can use that to
3084 * select an appropriate output routine; otherwise we just use
3085 * the Bug code. If we have to use the Bug that means the Bug
3086 * workspace has to be valid, which means the Bug has to use
3087 * the SRAM, which is non-standard.
3088 */
3089 moveml %d0-%d7/%a2-%a6,%sp@-
3090 movel vme_brdtype,%d1
3091 jeq 1f | No tag - use the Bug
3092 cmpi #VME_TYPE_MVME162,%d1
3093 jeq 6f
3094 cmpi #VME_TYPE_MVME172,%d1
3095 jne 5f
3096 /* 162/172; it's an SCC */
3097 6: btst #2,M162_SCC_CTRL_A
3098 nop
3099 nop
3100 nop
3101 jeq 6b
3102 moveb #8,M162_SCC_CTRL_A
3103 nop
3104 nop
3105 nop
3106 moveb %d0,M162_SCC_CTRL_A
3107 jra 3f
3108 5:
3109 /* 166/167/177; it's a CD2401 */
3110 moveb #0,M167_CYCAR
3111 moveb M167_CYIER,%d2
3112 moveb #0x02,M167_CYIER
3113 7:
3114 btst #5,M167_PCSCCTICR
3115 jeq 7b
3116 moveb M167_PCTPIACKR,%d1
3117 moveb M167_CYLICR,%d1
3118 jeq 8f
3119 moveb #0x08,M167_CYTEOIR
3120 jra 7b
3121 8:
3122 moveb %d0,M167_CYTDR
3123 moveb #0,M167_CYTEOIR
3124 moveb %d2,M167_CYIER
3125 jra 3f
3126 1:
3127 moveb %d0,%sp@-
3128 trap #15
3129 .word 0x0020 /* TRAP 0x020 */
3130 3:
3131 moveml %sp@+,%d0-%d7/%a2-%a6
3132 jbra L(serial_putc_done)
3133 2:
3134 #endif /* CONFIG_MVME16x */
3136 #ifdef CONFIG_BVME6000
3137 is_not_bvme6000(2f)
3138 /*
3139 * The BVME6000 machine has a serial port ...
3140 */
3141 1: btst #2,BVME_SCC_CTRL_A
3142 jeq 1b
3143 moveb %d0,BVME_SCC_DATA_A
3144 jbra L(serial_putc_done)
3145 2:
3146 #endif
3148 #ifdef CONFIG_SUN3X
3149 is_not_sun3x(2f)
3150 movel %d0,-(%sp)
3151 movel 0xFEFE0018,%a1
3152 jbsr (%a1)
3153 addq #4,%sp
3154 jbra L(serial_putc_done)
3155 2:
3156 #endif
3158 #ifdef CONFIG_Q40
3159 is_not_q40(2f)
3160 tst.l %pc@(L(q40_do_debug)) /* only debug if requested */
3161 beq 2f
3162 lea %pc@(q40_mem_cptr),%a1
3163 move.l %a1@,%a0
3164 move.b %d0,%a0@
3165 addq.l #4,%a0
3166 move.l %a0,%a1@
3167 jbra L(serial_putc_done)
3168 2:
3169 #endif
3171 #ifdef CONFIG_APOLLO
3172 is_not_apollo(2f)
3173 movl %pc@(L(iobase)),%a1
3174 moveb %d0,%a1@(LTHRB0)
3175 1: moveb %a1@(LSRB0),%d0
3176 andb #0x4,%d0
3177 beq 1b
3178 jbra L(serial_putc_done)
3179 2:
3180 #endif
3182 #ifdef CONFIG_HP300
3183 is_not_hp300(3f)
3184 movl %pc@(L(iobase)),%a1
3185 addl %pc@(L(uartbase)),%a1
3186 movel %pc@(L(uart_scode)),%d1 /* Check the scode */
3187 jmi 3f /* Unset? Exit */
3188 cmpi #256,%d1 /* APCI scode? */
3189 jeq 2f
3190 1: moveb %a1@(DCALSR),%d1 /* Output to DCA */
3191 andb #0x20,%d1
3192 beq 1b
3193 moveb %d0,%a1@(DCADATA)
3194 jbra L(serial_putc_done)
3195 2: moveb %a1@(APCILSR),%d1 /* Output to APCI */
3196 andb #0x20,%d1
3197 beq 2b
3198 moveb %d0,%a1@(APCIDATA)
3199 jbra L(serial_putc_done)
3200 3:
3201 #endif
3203 L(serial_putc_done):
3204 func_return serial_putc
3206 /*
3207 * Output a string.
3208 */
3209 func_start puts,%d0/%a0
3211 movel ARG1,%a0
3212 jra 2f
3213 1:
3214 #ifdef CONSOLE
3215 console_putc %d0
3216 #endif
3217 #ifdef SERIAL_DEBUG
3218 serial_putc %d0
3219 #endif
3220 2: moveb %a0@+,%d0
3221 jne 1b
3223 func_return puts
3225 /*
3226 * Output number in hex notation.
3227 */
3229 func_start putn,%d0-%d2
3231 putc ' '
3233 movel ARG1,%d0
3234 moveq #7,%d1
3235 1: roll #4,%d0
3236 move %d0,%d2
3237 andb #0x0f,%d2
3238 addb #'0',%d2
3239 cmpb #'9',%d2
3240 jls 2f
3241 addb #'A'-('9'+1),%d2
3242 2:
3243 #ifdef CONSOLE
3244 console_putc %d2
3245 #endif
3246 #ifdef SERIAL_DEBUG
3247 serial_putc %d2
3248 #endif
3249 dbra %d1,1b
3251 func_return putn
3253 #ifdef CONFIG_MAC
3254 /*
3255 * mac_early_print
3256 *
3257 * This routine takes its parameters on the stack. It then
3258 * turns around and calls the internal routines. This routine
3259 * is used by the boot console.
3260 *
3261 * The calling parameters are:
3262 * void mac_early_print(const char *str, unsigned length);
3263 *
3264 * This routine does NOT understand variable arguments only
3265 * simple strings!
3266 */
3267 ENTRY(mac_early_print)
3268 moveml %d0/%d1/%a0,%sp@-
3269 movew %sr,%sp@-
3270 ori #0x0700,%sr
3271 movel %sp@(18),%a0 /* fetch parameter */
3272 movel %sp@(22),%d1 /* fetch parameter */
3273 jra 2f
3274 1:
3275 #ifdef CONSOLE
3276 console_putc %d0
3277 #endif
3278 #ifdef SERIAL_DEBUG
3279 serial_putc %d0
3280 #endif
3281 subq #1,%d1
3282 2: jeq 3f
3283 moveb %a0@+,%d0
3284 jne 1b
3285 3:
3286 movew %sp@+,%sr
3287 moveml %sp@+,%d0/%d1/%a0
3288 rts
3289 #endif /* CONFIG_MAC */
3291 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3292 func_start set_leds,%d0/%a0
3293 movel ARG1,%d0
3294 #ifdef CONFIG_HP300
3295 is_not_hp300(1f)
3296 movel %pc@(L(iobase)),%a0
3297 moveb %d0,%a0@(0x1ffff)
3298 jra 2f
3299 #endif
3300 1:
3301 #ifdef CONFIG_APOLLO
3302 movel %pc@(L(iobase)),%a0
3303 lsll #8,%d0
3304 eorw #0xff00,%d0
3305 moveb %d0,%a0@(LCPUCTRL)
3306 #endif
3307 2:
3308 func_return set_leds
3309 #endif
3311 #ifdef CONSOLE
3312 /*
3313 * For continuity, see the data alignment
3314 * to which this structure is tied.
3315 */
3316 #define Lconsole_struct_cur_column 0
3317 #define Lconsole_struct_cur_row 4
3318 #define Lconsole_struct_num_columns 8
3319 #define Lconsole_struct_num_rows 12
3320 #define Lconsole_struct_left_edge 16
3321 #define Lconsole_struct_penguin_putc 20
3323 func_start console_init,%a0-%a4/%d0-%d7
3324 /*
3325 * Some of the register usage that follows
3326 * a0 = pointer to boot_info
3327 * a1 = pointer to screen
3328 * a2 = pointer to Lconsole_globals
3329 * d3 = pixel width of screen
3330 * d4 = pixel height of screen
3331 * (d3,d4) ~= (x,y) of a point just below
3332 * and to the right of the screen
3333 * NOT on the screen!
3334 * d5 = number of bytes per scan line
3335 * d6 = number of bytes on the entire screen
3336 */
3338 lea %pc@(L(console_globals)),%a2
3339 movel %pc@(L(mac_videobase)),%a1
3340 movel %pc@(L(mac_rowbytes)),%d5
3341 movel %pc@(L(mac_dimensions)),%d3 /* -> low byte */
3342 movel %d3,%d4
3343 swap %d4 /* -> high byte */
3344 andl #0xffff,%d3 /* d3 = screen width in pixels */
3345 andl #0xffff,%d4 /* d4 = screen height in pixels */
3347 movel %d5,%d6
3348 | subl #20,%d6
3349 mulul %d4,%d6 /* scan line bytes x num scan lines */
3350 divul #8,%d6 /* we'll clear 8 bytes at a time */
3351 moveq #-1,%d0 /* Mac_black */
3352 subq #1,%d6
3354 L(console_clear_loop):
3355 movel %d0,%a1@+
3356 movel %d0,%a1@+
3357 dbra %d6,L(console_clear_loop)
3359 /* Calculate font size */
3361 #if defined(FONT_8x8) && defined(CONFIG_FONT_8x8)
3362 lea %pc@(font_vga_8x8),%a0
3363 #elif defined(FONT_8x16) && defined(CONFIG_FONT_8x16)
3364 lea %pc@(font_vga_8x16),%a0
3365 #elif defined(FONT_6x11) && defined(CONFIG_FONT_6x11)
3366 lea %pc@(font_vga_6x11),%a0
3367 #elif defined(CONFIG_FONT_8x8) /* default */
3368 lea %pc@(font_vga_8x8),%a0
3369 #else /* no compiled-in font */
3370 lea 0,%a0
3371 #endif
3373 /*
3374 * At this point we make a shift in register usage
3375 * a1 = address of console_font pointer
3376 */
3377 lea %pc@(L(console_font)),%a1
3378 movel %a0,%a1@ /* store pointer to struct fbcon_font_desc in console_font */
3379 tstl %a0
3380 jeq 1f
3381 lea %pc@(L(console_font_data)),%a4
3382 movel %a0@(FONT_DESC_DATA),%d0
3383 subl #L(console_font),%a1
3384 addl %a1,%d0
3385 movel %d0,%a4@
3387 /*
3388 * Calculate global maxs
3389 * Note - we can use either an
3390 * 8 x 16 or 8 x 8 character font
3391 * 6 x 11 also supported
3392 */
3393 /* ASSERT: a0 = contents of Lconsole_font */
3394 movel %d3,%d0 /* screen width in pixels */
3395 divul %a0@(FONT_DESC_WIDTH),%d0 /* d0 = max num chars per row */
3397 movel %d4,%d1 /* screen height in pixels */
3398 divul %a0@(FONT_DESC_HEIGHT),%d1 /* d1 = max num rows */
3400 movel %d0,%a2@(Lconsole_struct_num_columns)
3401 movel %d1,%a2@(Lconsole_struct_num_rows)
3403 /*
3404 * Clear the current row and column
3405 */
3406 clrl %a2@(Lconsole_struct_cur_column)
3407 clrl %a2@(Lconsole_struct_cur_row)
3408 clrl %a2@(Lconsole_struct_left_edge)
3410 /*
3411 * Initialization is complete
3412 */
3413 1:
3414 func_return console_init
3416 func_start console_put_stats,%a0/%d7
3417 /*
3418 * Some of the register usage that follows
3419 * a0 = pointer to boot_info
3420 * d7 = value of boot_info fields
3421 */
3422 puts "\nMacLinux\n"
3424 #ifdef SERIAL_DEBUG
3425 puts "\n vidaddr:"
3426 putn %pc@(L(mac_videobase)) /* video addr. */
3428 puts "\n _stext:"
3429 lea %pc@(_stext),%a0
3430 putn %a0
3432 puts "\nbootinfo:"
3433 lea %pc@(_end),%a0
3434 putn %a0
3436 puts "\n cpuid:"
3437 putn %pc@(L(cputype))
3439 # ifdef CONFIG_MAC
3440 puts "\n sccbase:"
3441 putn %pc@(L(mac_sccbase))
3442 # endif
3443 # ifdef MMU_PRINT
3444 putc '\n'
3445 jbsr mmu_print_machine_cpu_types
3446 # endif
3447 #endif /* SERIAL_DEBUG */
3449 putc '\n'
3451 func_return console_put_stats
3453 #ifdef CONSOLE_PENGUIN
3454 func_start console_put_penguin,%a0-%a1/%d0-%d7
3455 /*
3456 * Get 'that_penguin' onto the screen in the upper right corner
3457 * penguin is 64 x 74 pixels, align against right edge of screen
3458 */
3459 lea %pc@(L(mac_dimensions)),%a0
3460 movel %a0@,%d0
3461 andil #0xffff,%d0
3462 subil #64,%d0 /* snug up against the right edge */
3463 clrl %d1 /* start at the top */
3464 movel #73,%d7
3465 lea %pc@(L(that_penguin)),%a1
3466 L(console_penguin_row):
3467 movel #31,%d6
3468 L(console_penguin_pixel_pair):
3469 moveb %a1@,%d2
3470 lsrb #4,%d2
3471 console_plot_pixel %d0,%d1,%d2
3472 addq #1,%d0
3473 moveb %a1@+,%d2
3474 console_plot_pixel %d0,%d1,%d2
3475 addq #1,%d0
3476 dbra %d6,L(console_penguin_pixel_pair)
3478 subil #64,%d0
3479 addq #1,%d1
3480 dbra %d7,L(console_penguin_row)
3482 func_return console_put_penguin
3484 /* include penguin bitmap */
3485 L(that_penguin):
3486 #include "../mac/mac_penguin.S"
3487 #endif
3489 /*
3490 * Calculate source and destination addresses
3491 * output a1 = dest
3492 * a2 = source
3493 */
3495 func_start console_scroll,%a0-%a4/%d0-%d7
3496 lea %pc@(L(mac_videobase)),%a0
3497 movel %a0@,%a1
3498 movel %a1,%a2
3499 lea %pc@(L(mac_rowbytes)),%a0
3500 movel %a0@,%d5
3501 movel %pc@(L(console_font)),%a0
3502 tstl %a0
3503 jeq 1f
3504 mulul %a0@(FONT_DESC_HEIGHT),%d5 /* account for # scan lines per character */
3505 addal %d5,%a2
3507 /*
3508 * Get dimensions
3509 */
3510 lea %pc@(L(mac_dimensions)),%a0
3511 movel %a0@,%d3
3512 movel %d3,%d4
3513 swap %d4
3514 andl #0xffff,%d3 /* d3 = screen width in pixels */
3515 andl #0xffff,%d4 /* d4 = screen height in pixels */
3517 /*
3518 * Calculate number of bytes to move
3519 */
3520 lea %pc@(L(mac_rowbytes)),%a0
3521 movel %a0@,%d6
3522 movel %pc@(L(console_font)),%a0
3523 subl %a0@(FONT_DESC_HEIGHT),%d4 /* we're not scrolling the top row! */
3524 mulul %d4,%d6 /* scan line bytes x num scan lines */
3525 divul #32,%d6 /* we'll move 8 longs at a time */
3526 subq #1,%d6
3528 L(console_scroll_loop):
3529 movel %a2@+,%a1@+
3530 movel %a2@+,%a1@+
3531 movel %a2@+,%a1@+
3532 movel %a2@+,%a1@+
3533 movel %a2@+,%a1@+
3534 movel %a2@+,%a1@+
3535 movel %a2@+,%a1@+
3536 movel %a2@+,%a1@+
3537 dbra %d6,L(console_scroll_loop)
3539 lea %pc@(L(mac_rowbytes)),%a0
3540 movel %a0@,%d6
3541 movel %pc@(L(console_font)),%a0
3542 mulul %a0@(FONT_DESC_HEIGHT),%d6 /* scan line bytes x font height */
3543 divul #32,%d6 /* we'll move 8 words at a time */
3544 subq #1,%d6
3546 moveq #-1,%d0
3547 L(console_scroll_clear_loop):
3548 movel %d0,%a1@+
3549 movel %d0,%a1@+
3550 movel %d0,%a1@+
3551 movel %d0,%a1@+
3552 movel %d0,%a1@+
3553 movel %d0,%a1@+
3554 movel %d0,%a1@+
3555 movel %d0,%a1@+
3556 dbra %d6,L(console_scroll_clear_loop)
3558 1:
3559 func_return console_scroll
3562 func_start console_putc,%a0/%a1/%d0-%d7
3564 is_not_mac(L(console_exit))
3565 tstl %pc@(L(console_font))
3566 jeq L(console_exit)
3568 /* Output character in d7 on console.
3569 */
3570 movel ARG1,%d7
3571 cmpib #'\n',%d7
3572 jbne 1f
3574 /* A little safe recursion is good for the soul */
3575 console_putc #'\r'
3576 1:
3577 lea %pc@(L(console_globals)),%a0
3579 cmpib #10,%d7
3580 jne L(console_not_lf)
3581 movel %a0@(Lconsole_struct_cur_row),%d0
3582 addil #1,%d0
3583 movel %d0,%a0@(Lconsole_struct_cur_row)
3584 movel %a0@(Lconsole_struct_num_rows),%d1
3585 cmpl %d1,%d0
3586 jcs 1f
3587 subil #1,%d0
3588 movel %d0,%a0@(Lconsole_struct_cur_row)
3589 console_scroll
3590 1:
3591 jra L(console_exit)
3593 L(console_not_lf):
3594 cmpib #13,%d7
3595 jne L(console_not_cr)
3596 clrl %a0@(Lconsole_struct_cur_column)
3597 jra L(console_exit)
3599 L(console_not_cr):
3600 cmpib #1,%d7
3601 jne L(console_not_home)
3602 clrl %a0@(Lconsole_struct_cur_row)
3603 clrl %a0@(Lconsole_struct_cur_column)
3604 jra L(console_exit)
3606 /*
3607 * At this point we know that the %d7 character is going to be
3608 * rendered on the screen. Register usage is -
3609 * a0 = pointer to console globals
3610 * a1 = font data
3611 * d0 = cursor column
3612 * d1 = cursor row to draw the character
3613 * d7 = character number
3614 */
3615 L(console_not_home):
3616 movel %a0@(Lconsole_struct_cur_column),%d0
3617 addql #1,%a0@(Lconsole_struct_cur_column)
3618 movel %a0@(Lconsole_struct_num_columns),%d1
3619 cmpl %d1,%d0
3620 jcs 1f
3621 console_putc #'\n' /* recursion is OK! */
3622 1:
3623 movel %a0@(Lconsole_struct_cur_row),%d1
3625 /*
3626 * At this point we make a shift in register usage
3627 * a0 = address of pointer to font data (fbcon_font_desc)
3628 */
3629 movel %pc@(L(console_font)),%a0
3630 movel %pc@(L(console_font_data)),%a1 /* Load fbcon_font_desc.data into a1 */
3631 andl #0x000000ff,%d7
3632 /* ASSERT: a0 = contents of Lconsole_font */
3633 mulul %a0@(FONT_DESC_HEIGHT),%d7 /* d7 = index into font data */
3634 addl %d7,%a1 /* a1 = points to char image */
3636 /*
3637 * At this point we make a shift in register usage
3638 * d0 = pixel coordinate, x
3639 * d1 = pixel coordinate, y
3640 * d2 = (bit 0) 1/0 for white/black (!) pixel on screen
3641 * d3 = font scan line data (8 pixels)
3642 * d6 = count down for the font's pixel width (8)
3643 * d7 = count down for the font's pixel count in height
3644 */
3645 /* ASSERT: a0 = contents of Lconsole_font */
3646 mulul %a0@(FONT_DESC_WIDTH),%d0
3647 mulul %a0@(FONT_DESC_HEIGHT),%d1
3648 movel %a0@(FONT_DESC_HEIGHT),%d7 /* Load fbcon_font_desc.height into d7 */
3649 subq #1,%d7
3650 L(console_read_char_scanline):
3651 moveb %a1@+,%d3
3653 /* ASSERT: a0 = contents of Lconsole_font */
3654 movel %a0@(FONT_DESC_WIDTH),%d6 /* Load fbcon_font_desc.width into d6 */
3655 subql #1,%d6
3657 L(console_do_font_scanline):
3658 lslb #1,%d3
3659 scsb %d2 /* convert 1 bit into a byte */
3660 console_plot_pixel %d0,%d1,%d2
3661 addq #1,%d0
3662 dbra %d6,L(console_do_font_scanline)
3664 /* ASSERT: a0 = contents of Lconsole_font */
3665 subl %a0@(FONT_DESC_WIDTH),%d0
3666 addq #1,%d1
3667 dbra %d7,L(console_read_char_scanline)
3669 L(console_exit):
3670 func_return console_putc
3672 /*
3673 * Input:
3674 * d0 = x coordinate
3675 * d1 = y coordinate
3676 * d2 = (bit 0) 1/0 for white/black (!)
3677 * All registers are preserved
3678 */
3679 func_start console_plot_pixel,%a0-%a1/%d0-%d4
3681 movel %pc@(L(mac_videobase)),%a1
3682 movel %pc@(L(mac_videodepth)),%d3
3683 movel ARG1,%d0
3684 movel ARG2,%d1
3685 mulul %pc@(L(mac_rowbytes)),%d1
3686 movel ARG3,%d2
3688 /*
3689 * Register usage:
3690 * d0 = x coord becomes byte offset into frame buffer
3691 * d1 = y coord
3692 * d2 = black or white (0/1)
3693 * d3 = video depth
3694 * d4 = temp of x (d0) for many bit depths
3695 */
3696 L(test_1bit):
3697 cmpb #1,%d3
3698 jbne L(test_2bit)
3699 movel %d0,%d4 /* we need the low order 3 bits! */
3700 divul #8,%d0
3701 addal %d0,%a1
3702 addal %d1,%a1
3703 andb #7,%d4
3704 eorb #7,%d4 /* reverse the x-coordinate w/ screen-bit # */
3705 andb #1,%d2
3706 jbne L(white_1)
3707 bsetb %d4,%a1@
3708 jbra L(console_plot_pixel_exit)
3709 L(white_1):
3710 bclrb %d4,%a1@
3711 jbra L(console_plot_pixel_exit)
3713 L(test_2bit):
3714 cmpb #2,%d3
3715 jbne L(test_4bit)
3716 movel %d0,%d4 /* we need the low order 2 bits! */
3717 divul #4,%d0
3718 addal %d0,%a1
3719 addal %d1,%a1
3720 andb #3,%d4
3721 eorb #3,%d4 /* reverse the x-coordinate w/ screen-bit # */
3722 lsll #1,%d4 /* ! */
3723 andb #1,%d2
3724 jbne L(white_2)
3725 bsetb %d4,%a1@
3726 addq #1,%d4
3727 bsetb %d4,%a1@
3728 jbra L(console_plot_pixel_exit)
3729 L(white_2):
3730 bclrb %d4,%a1@
3731 addq #1,%d4
3732 bclrb %d4,%a1@
3733 jbra L(console_plot_pixel_exit)
3735 L(test_4bit):
3736 cmpb #4,%d3
3737 jbne L(test_8bit)
3738 movel %d0,%d4 /* we need the low order bit! */
3739 divul #2,%d0
3740 addal %d0,%a1
3741 addal %d1,%a1
3742 andb #1,%d4
3743 eorb #1,%d4
3744 lsll #2,%d4 /* ! */
3745 andb #1,%d2
3746 jbne L(white_4)
3747 bsetb %d4,%a1@
3748 addq #1,%d4
3749 bsetb %d4,%a1@
3750 addq #1,%d4
3751 bsetb %d4,%a1@
3752 addq #1,%d4
3753 bsetb %d4,%a1@
3754 jbra L(console_plot_pixel_exit)
3755 L(white_4):
3756 bclrb %d4,%a1@
3757 addq #1,%d4
3758 bclrb %d4,%a1@
3759 addq #1,%d4
3760 bclrb %d4,%a1@
3761 addq #1,%d4
3762 bclrb %d4,%a1@
3763 jbra L(console_plot_pixel_exit)
3765 L(test_8bit):
3766 cmpb #8,%d3
3767 jbne L(test_16bit)
3768 addal %d0,%a1
3769 addal %d1,%a1
3770 andb #1,%d2
3771 jbne L(white_8)
3772 moveb #0xff,%a1@
3773 jbra L(console_plot_pixel_exit)
3774 L(white_8):
3775 clrb %a1@
3776 jbra L(console_plot_pixel_exit)
3778 L(test_16bit):
3779 cmpb #16,%d3
3780 jbne L(console_plot_pixel_exit)
3781 addal %d0,%a1
3782 addal %d0,%a1
3783 addal %d1,%a1
3784 andb #1,%d2
3785 jbne L(white_16)
3786 clrw %a1@
3787 jbra L(console_plot_pixel_exit)
3788 L(white_16):
3789 movew #0x0fff,%a1@
3790 jbra L(console_plot_pixel_exit)
3792 L(console_plot_pixel_exit):
3793 func_return console_plot_pixel
3794 #endif /* CONSOLE */
3796 #if 0
3797 /*
3798 * This is some old code lying around. I don't believe
3799 * it's used or important anymore. My guess is it contributed
3800 * to getting to this point, but it's done for now.
3801 * It was still in the 2.1.77 head.S, so it's still here.
3802 * (And still not used!)
3803 */
3804 L(showtest):
3805 moveml %a0/%d7,%sp@-
3806 puts "A="
3807 putn %a1
3809 .long 0xf0119f15 | ptestr #5,%a1@,#7,%a0
3811 puts "DA="
3812 putn %a0
3814 puts "D="
3815 putn %a0@
3817 puts "S="
3818 lea %pc@(L(mmu)),%a0
3819 .long 0xf0106200 | pmove %psr,%a0@
3820 clrl %d7
3821 movew %a0@,%d7
3822 putn %d7
3824 putc '\n'
3825 moveml %sp@+,%a0/%d7
3826 rts
3827 #endif /* 0 */
3829 __INITDATA
3830 .align 4
3832 #if defined(CONFIG_ATARI) || defined(CONFIG_AMIGA) || \
3833 defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3834 L(custom):
3835 L(iobase):
3836 .long 0
3837 #endif
3839 #if defined(CONSOLE)
3840 L(console_globals):
3841 .long 0 /* cursor column */
3842 .long 0 /* cursor row */
3843 .long 0 /* max num columns */
3844 .long 0 /* max num rows */
3845 .long 0 /* left edge */
3846 .long 0 /* mac putc */
3847 L(console_font):
3848 .long 0 /* pointer to console font (struct font_desc) */
3849 L(console_font_data):
3850 .long 0 /* pointer to console font data */
3851 #endif /* CONSOLE */
3853 #if defined(MMU_PRINT)
3854 L(mmu_print_data):
3855 .long 0 /* valid flag */
3856 .long 0 /* start logical */
3857 .long 0 /* next logical */
3858 .long 0 /* start physical */
3859 .long 0 /* next physical */
3860 #endif /* MMU_PRINT */
3862 L(cputype):
3863 .long 0
3864 L(mmu_cached_pointer_tables):
3865 .long 0
3866 L(mmu_num_pointer_tables):
3867 .long 0
3868 L(phys_kernel_start):
3869 .long 0
3870 L(kernel_end):
3871 .long 0
3872 L(memory_start):
3873 .long 0
3874 L(kernel_pgdir_ptr):
3875 .long 0
3876 L(temp_mmap_mem):
3877 .long 0
3879 #if defined (CONFIG_MVME147)
3880 M147_SCC_CTRL_A = 0xfffe3002
3881 M147_SCC_DATA_A = 0xfffe3003
3882 #endif
3884 #if defined (CONFIG_MVME16x)
3885 M162_SCC_CTRL_A = 0xfff45005
3886 M167_CYCAR = 0xfff450ee
3887 M167_CYIER = 0xfff45011
3888 M167_CYLICR = 0xfff45026
3889 M167_CYTEOIR = 0xfff45085
3890 M167_CYTDR = 0xfff450f8
3891 M167_PCSCCTICR = 0xfff4201e
3892 M167_PCTPIACKR = 0xfff42025
3893 #endif
3895 #if defined (CONFIG_BVME6000)
3896 BVME_SCC_CTRL_A = 0xffb0000b
3897 BVME_SCC_DATA_A = 0xffb0000f
3898 #endif
3900 #if defined(CONFIG_MAC)
3901 L(mac_booter_data):
3902 .long 0
3903 L(mac_videobase):
3904 .long 0
3905 L(mac_videodepth):
3906 .long 0
3907 L(mac_dimensions):
3908 .long 0
3909 L(mac_rowbytes):
3910 .long 0
3911 #ifdef SERIAL_DEBUG
3912 L(mac_sccbase):
3913 .long 0
3914 #endif
3915 #endif /* CONFIG_MAC */
3917 #if defined (CONFIG_APOLLO)
3918 LSRB0 = 0x10412
3919 LTHRB0 = 0x10416
3920 LCPUCTRL = 0x10100
3921 #endif
3923 #if defined(CONFIG_HP300)
3924 DCADATA = 0x11
3925 DCALSR = 0x1b
3926 APCIDATA = 0x00
3927 APCILSR = 0x14
3928 L(uartbase):
3929 .long 0
3930 L(uart_scode):
3931 .long -1
3932 #endif
3934 __FINIT
3935 .data
3936 .align 4
3938 availmem:
3939 .long 0
3940 m68k_pgtable_cachemode:
3941 .long 0
3942 m68k_supervisor_cachemode:
3943 .long 0
3944 #if defined(CONFIG_MVME16x)
3945 mvme_bdid:
3946 .long 0,0,0,0,0,0,0,0
3947 #endif
3948 #if defined(CONFIG_Q40)
3949 q40_mem_cptr:
3950 .long 0
3951 L(q40_do_debug):
3952 .long 0
3953 #endif