mfd: wm8350-i2c: Make sure the i2c regmap functions are compiled
[linux/fpc-iii.git] / drivers / char / tpm / tpm_tis.c
blob7f85983877021a04208885774e8ffcc7e6fa119f
1 /*
2 * Copyright (C) 2005, 2006 IBM Corporation
4 * Authors:
5 * Leendert van Doorn <leendert@watson.ibm.com>
6 * Kylene Hall <kjhall@us.ibm.com>
8 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
10 * Device driver for TCG/TCPA TPM (trusted platform module).
11 * Specifications at www.trustedcomputinggroup.org
13 * This device driver implements the TPM interface as defined in
14 * the TCG TPM Interface Spec version 1.2, revision 1.0.
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation, version 2 of the
19 * License.
21 #include <linux/init.h>
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/pnp.h>
25 #include <linux/slab.h>
26 #include <linux/interrupt.h>
27 #include <linux/wait.h>
28 #include <linux/acpi.h>
29 #include <linux/freezer.h>
30 #include "tpm.h"
32 enum tis_access {
33 TPM_ACCESS_VALID = 0x80,
34 TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
35 TPM_ACCESS_REQUEST_PENDING = 0x04,
36 TPM_ACCESS_REQUEST_USE = 0x02,
39 enum tis_status {
40 TPM_STS_VALID = 0x80,
41 TPM_STS_COMMAND_READY = 0x40,
42 TPM_STS_GO = 0x20,
43 TPM_STS_DATA_AVAIL = 0x10,
44 TPM_STS_DATA_EXPECT = 0x08,
47 enum tis_int_flags {
48 TPM_GLOBAL_INT_ENABLE = 0x80000000,
49 TPM_INTF_BURST_COUNT_STATIC = 0x100,
50 TPM_INTF_CMD_READY_INT = 0x080,
51 TPM_INTF_INT_EDGE_FALLING = 0x040,
52 TPM_INTF_INT_EDGE_RISING = 0x020,
53 TPM_INTF_INT_LEVEL_LOW = 0x010,
54 TPM_INTF_INT_LEVEL_HIGH = 0x008,
55 TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
56 TPM_INTF_STS_VALID_INT = 0x002,
57 TPM_INTF_DATA_AVAIL_INT = 0x001,
60 enum tis_defaults {
61 TIS_MEM_BASE = 0xFED40000,
62 TIS_MEM_LEN = 0x5000,
63 TIS_SHORT_TIMEOUT = 750, /* ms */
64 TIS_LONG_TIMEOUT = 2000, /* 2 sec */
67 #define TPM_ACCESS(l) (0x0000 | ((l) << 12))
68 #define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12))
69 #define TPM_INT_VECTOR(l) (0x000C | ((l) << 12))
70 #define TPM_INT_STATUS(l) (0x0010 | ((l) << 12))
71 #define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12))
72 #define TPM_STS(l) (0x0018 | ((l) << 12))
73 #define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12))
75 #define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
76 #define TPM_RID(l) (0x0F04 | ((l) << 12))
78 struct priv_data {
79 bool irq_tested;
82 static LIST_HEAD(tis_chips);
83 static DEFINE_MUTEX(tis_lock);
85 #if defined(CONFIG_PNP) && defined(CONFIG_ACPI)
86 static int is_itpm(struct pnp_dev *dev)
88 struct acpi_device *acpi = pnp_acpi_device(dev);
89 struct acpi_hardware_id *id;
91 if (!acpi)
92 return 0;
94 list_for_each_entry(id, &acpi->pnp.ids, list) {
95 if (!strcmp("INTC0102", id->id))
96 return 1;
99 return 0;
101 #else
102 static inline int is_itpm(struct pnp_dev *dev)
104 return 0;
106 #endif
108 /* Before we attempt to access the TPM we must see that the valid bit is set.
109 * The specification says that this bit is 0 at reset and remains 0 until the
110 * 'TPM has gone through its self test and initialization and has established
111 * correct values in the other bits.' */
112 static int wait_startup(struct tpm_chip *chip, int l)
114 unsigned long stop = jiffies + chip->vendor.timeout_a;
115 do {
116 if (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
117 TPM_ACCESS_VALID)
118 return 0;
119 msleep(TPM_TIMEOUT);
120 } while (time_before(jiffies, stop));
121 return -1;
124 static int check_locality(struct tpm_chip *chip, int l)
126 if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
127 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
128 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
129 return chip->vendor.locality = l;
131 return -1;
134 static void release_locality(struct tpm_chip *chip, int l, int force)
136 if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
137 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
138 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
139 iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
140 chip->vendor.iobase + TPM_ACCESS(l));
143 static int request_locality(struct tpm_chip *chip, int l)
145 unsigned long stop, timeout;
146 long rc;
148 if (check_locality(chip, l) >= 0)
149 return l;
151 iowrite8(TPM_ACCESS_REQUEST_USE,
152 chip->vendor.iobase + TPM_ACCESS(l));
154 stop = jiffies + chip->vendor.timeout_a;
156 if (chip->vendor.irq) {
157 again:
158 timeout = stop - jiffies;
159 if ((long)timeout <= 0)
160 return -1;
161 rc = wait_event_interruptible_timeout(chip->vendor.int_queue,
162 (check_locality
163 (chip, l) >= 0),
164 timeout);
165 if (rc > 0)
166 return l;
167 if (rc == -ERESTARTSYS && freezing(current)) {
168 clear_thread_flag(TIF_SIGPENDING);
169 goto again;
171 } else {
172 /* wait for burstcount */
173 do {
174 if (check_locality(chip, l) >= 0)
175 return l;
176 msleep(TPM_TIMEOUT);
178 while (time_before(jiffies, stop));
180 return -1;
183 static u8 tpm_tis_status(struct tpm_chip *chip)
185 return ioread8(chip->vendor.iobase +
186 TPM_STS(chip->vendor.locality));
189 static void tpm_tis_ready(struct tpm_chip *chip)
191 /* this causes the current command to be aborted */
192 iowrite8(TPM_STS_COMMAND_READY,
193 chip->vendor.iobase + TPM_STS(chip->vendor.locality));
196 static int get_burstcount(struct tpm_chip *chip)
198 unsigned long stop;
199 int burstcnt;
201 /* wait for burstcount */
202 /* which timeout value, spec has 2 answers (c & d) */
203 stop = jiffies + chip->vendor.timeout_d;
204 do {
205 burstcnt = ioread8(chip->vendor.iobase +
206 TPM_STS(chip->vendor.locality) + 1);
207 burstcnt += ioread8(chip->vendor.iobase +
208 TPM_STS(chip->vendor.locality) +
209 2) << 8;
210 if (burstcnt)
211 return burstcnt;
212 msleep(TPM_TIMEOUT);
213 } while (time_before(jiffies, stop));
214 return -EBUSY;
217 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
219 int size = 0, burstcnt;
220 while (size < count &&
221 wait_for_tpm_stat(chip,
222 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
223 chip->vendor.timeout_c,
224 &chip->vendor.read_queue, true)
225 == 0) {
226 burstcnt = get_burstcount(chip);
227 for (; burstcnt > 0 && size < count; burstcnt--)
228 buf[size++] = ioread8(chip->vendor.iobase +
229 TPM_DATA_FIFO(chip->vendor.
230 locality));
232 return size;
235 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
237 int size = 0;
238 int expected, status;
240 if (count < TPM_HEADER_SIZE) {
241 size = -EIO;
242 goto out;
245 /* read first 10 bytes, including tag, paramsize, and result */
246 if ((size =
247 recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) {
248 dev_err(chip->dev, "Unable to read header\n");
249 goto out;
252 expected = be32_to_cpu(*(__be32 *) (buf + 2));
253 if (expected > count) {
254 size = -EIO;
255 goto out;
258 if ((size +=
259 recv_data(chip, &buf[TPM_HEADER_SIZE],
260 expected - TPM_HEADER_SIZE)) < expected) {
261 dev_err(chip->dev, "Unable to read remainder of result\n");
262 size = -ETIME;
263 goto out;
266 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
267 &chip->vendor.int_queue, false);
268 status = tpm_tis_status(chip);
269 if (status & TPM_STS_DATA_AVAIL) { /* retry? */
270 dev_err(chip->dev, "Error left over data\n");
271 size = -EIO;
272 goto out;
275 out:
276 tpm_tis_ready(chip);
277 release_locality(chip, chip->vendor.locality, 0);
278 return size;
281 static bool itpm;
282 module_param(itpm, bool, 0444);
283 MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
286 * If interrupts are used (signaled by an irq set in the vendor structure)
287 * tpm.c can skip polling for the data to be available as the interrupt is
288 * waited for here
290 static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
292 int rc, status, burstcnt;
293 size_t count = 0;
295 if (request_locality(chip, 0) < 0)
296 return -EBUSY;
298 status = tpm_tis_status(chip);
299 if ((status & TPM_STS_COMMAND_READY) == 0) {
300 tpm_tis_ready(chip);
301 if (wait_for_tpm_stat
302 (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b,
303 &chip->vendor.int_queue, false) < 0) {
304 rc = -ETIME;
305 goto out_err;
309 while (count < len - 1) {
310 burstcnt = get_burstcount(chip);
311 for (; burstcnt > 0 && count < len - 1; burstcnt--) {
312 iowrite8(buf[count], chip->vendor.iobase +
313 TPM_DATA_FIFO(chip->vendor.locality));
314 count++;
317 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
318 &chip->vendor.int_queue, false);
319 status = tpm_tis_status(chip);
320 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
321 rc = -EIO;
322 goto out_err;
326 /* write last byte */
327 iowrite8(buf[count],
328 chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality));
329 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
330 &chip->vendor.int_queue, false);
331 status = tpm_tis_status(chip);
332 if ((status & TPM_STS_DATA_EXPECT) != 0) {
333 rc = -EIO;
334 goto out_err;
337 return 0;
339 out_err:
340 tpm_tis_ready(chip);
341 release_locality(chip, chip->vendor.locality, 0);
342 return rc;
345 static void disable_interrupts(struct tpm_chip *chip)
347 u32 intmask;
349 intmask =
350 ioread32(chip->vendor.iobase +
351 TPM_INT_ENABLE(chip->vendor.locality));
352 intmask &= ~TPM_GLOBAL_INT_ENABLE;
353 iowrite32(intmask,
354 chip->vendor.iobase +
355 TPM_INT_ENABLE(chip->vendor.locality));
356 free_irq(chip->vendor.irq, chip);
357 chip->vendor.irq = 0;
361 * If interrupts are used (signaled by an irq set in the vendor structure)
362 * tpm.c can skip polling for the data to be available as the interrupt is
363 * waited for here
365 static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
367 int rc;
368 u32 ordinal;
370 rc = tpm_tis_send_data(chip, buf, len);
371 if (rc < 0)
372 return rc;
374 /* go and do it */
375 iowrite8(TPM_STS_GO,
376 chip->vendor.iobase + TPM_STS(chip->vendor.locality));
378 if (chip->vendor.irq) {
379 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
380 if (wait_for_tpm_stat
381 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID,
382 tpm_calc_ordinal_duration(chip, ordinal),
383 &chip->vendor.read_queue, false) < 0) {
384 rc = -ETIME;
385 goto out_err;
388 return len;
389 out_err:
390 tpm_tis_ready(chip);
391 release_locality(chip, chip->vendor.locality, 0);
392 return rc;
395 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
397 int rc, irq;
398 struct priv_data *priv = chip->vendor.priv;
400 if (!chip->vendor.irq || priv->irq_tested)
401 return tpm_tis_send_main(chip, buf, len);
403 /* Verify receipt of the expected IRQ */
404 irq = chip->vendor.irq;
405 chip->vendor.irq = 0;
406 rc = tpm_tis_send_main(chip, buf, len);
407 chip->vendor.irq = irq;
408 if (!priv->irq_tested)
409 msleep(1);
410 if (!priv->irq_tested) {
411 disable_interrupts(chip);
412 dev_err(chip->dev,
413 FW_BUG "TPM interrupt not working, polling instead\n");
415 priv->irq_tested = true;
416 return rc;
419 struct tis_vendor_timeout_override {
420 u32 did_vid;
421 unsigned long timeout_us[4];
424 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
425 /* Atmel 3204 */
426 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
427 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
430 static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
431 unsigned long *timeout_cap)
433 int i;
434 u32 did_vid;
436 did_vid = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
438 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
439 if (vendor_timeout_overrides[i].did_vid != did_vid)
440 continue;
441 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
442 sizeof(vendor_timeout_overrides[i].timeout_us));
443 return true;
446 return false;
450 * Early probing for iTPM with STS_DATA_EXPECT flaw.
451 * Try sending command without itpm flag set and if that
452 * fails, repeat with itpm flag set.
454 static int probe_itpm(struct tpm_chip *chip)
456 int rc = 0;
457 u8 cmd_getticks[] = {
458 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
459 0x00, 0x00, 0x00, 0xf1
461 size_t len = sizeof(cmd_getticks);
462 bool rem_itpm = itpm;
463 u16 vendor = ioread16(chip->vendor.iobase + TPM_DID_VID(0));
465 /* probe only iTPMS */
466 if (vendor != TPM_VID_INTEL)
467 return 0;
469 itpm = false;
471 rc = tpm_tis_send_data(chip, cmd_getticks, len);
472 if (rc == 0)
473 goto out;
475 tpm_tis_ready(chip);
476 release_locality(chip, chip->vendor.locality, 0);
478 itpm = true;
480 rc = tpm_tis_send_data(chip, cmd_getticks, len);
481 if (rc == 0) {
482 dev_info(chip->dev, "Detected an iTPM.\n");
483 rc = 1;
484 } else
485 rc = -EFAULT;
487 out:
488 itpm = rem_itpm;
489 tpm_tis_ready(chip);
490 release_locality(chip, chip->vendor.locality, 0);
492 return rc;
495 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
497 switch (chip->vendor.manufacturer_id) {
498 case TPM_VID_WINBOND:
499 return ((status == TPM_STS_VALID) ||
500 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
501 case TPM_VID_STM:
502 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
503 default:
504 return (status == TPM_STS_COMMAND_READY);
508 static const struct file_operations tis_ops = {
509 .owner = THIS_MODULE,
510 .llseek = no_llseek,
511 .open = tpm_open,
512 .read = tpm_read,
513 .write = tpm_write,
514 .release = tpm_release,
517 static DEVICE_ATTR(pubek, S_IRUGO, tpm_show_pubek, NULL);
518 static DEVICE_ATTR(pcrs, S_IRUGO, tpm_show_pcrs, NULL);
519 static DEVICE_ATTR(enabled, S_IRUGO, tpm_show_enabled, NULL);
520 static DEVICE_ATTR(active, S_IRUGO, tpm_show_active, NULL);
521 static DEVICE_ATTR(owned, S_IRUGO, tpm_show_owned, NULL);
522 static DEVICE_ATTR(temp_deactivated, S_IRUGO, tpm_show_temp_deactivated,
523 NULL);
524 static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL);
525 static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel);
526 static DEVICE_ATTR(durations, S_IRUGO, tpm_show_durations, NULL);
527 static DEVICE_ATTR(timeouts, S_IRUGO, tpm_show_timeouts, NULL);
529 static struct attribute *tis_attrs[] = {
530 &dev_attr_pubek.attr,
531 &dev_attr_pcrs.attr,
532 &dev_attr_enabled.attr,
533 &dev_attr_active.attr,
534 &dev_attr_owned.attr,
535 &dev_attr_temp_deactivated.attr,
536 &dev_attr_caps.attr,
537 &dev_attr_cancel.attr,
538 &dev_attr_durations.attr,
539 &dev_attr_timeouts.attr, NULL,
542 static struct attribute_group tis_attr_grp = {
543 .attrs = tis_attrs
546 static struct tpm_vendor_specific tpm_tis = {
547 .status = tpm_tis_status,
548 .recv = tpm_tis_recv,
549 .send = tpm_tis_send,
550 .cancel = tpm_tis_ready,
551 .update_timeouts = tpm_tis_update_timeouts,
552 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
553 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
554 .req_canceled = tpm_tis_req_canceled,
555 .attr_group = &tis_attr_grp,
556 .miscdev = {
557 .fops = &tis_ops,},
560 static irqreturn_t tis_int_probe(int irq, void *dev_id)
562 struct tpm_chip *chip = dev_id;
563 u32 interrupt;
565 interrupt = ioread32(chip->vendor.iobase +
566 TPM_INT_STATUS(chip->vendor.locality));
568 if (interrupt == 0)
569 return IRQ_NONE;
571 chip->vendor.probed_irq = irq;
573 /* Clear interrupts handled with TPM_EOI */
574 iowrite32(interrupt,
575 chip->vendor.iobase +
576 TPM_INT_STATUS(chip->vendor.locality));
577 return IRQ_HANDLED;
580 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
582 struct tpm_chip *chip = dev_id;
583 u32 interrupt;
584 int i;
586 interrupt = ioread32(chip->vendor.iobase +
587 TPM_INT_STATUS(chip->vendor.locality));
589 if (interrupt == 0)
590 return IRQ_NONE;
592 ((struct priv_data *)chip->vendor.priv)->irq_tested = true;
593 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
594 wake_up_interruptible(&chip->vendor.read_queue);
595 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
596 for (i = 0; i < 5; i++)
597 if (check_locality(chip, i) >= 0)
598 break;
599 if (interrupt &
600 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
601 TPM_INTF_CMD_READY_INT))
602 wake_up_interruptible(&chip->vendor.int_queue);
604 /* Clear interrupts handled with TPM_EOI */
605 iowrite32(interrupt,
606 chip->vendor.iobase +
607 TPM_INT_STATUS(chip->vendor.locality));
608 ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
609 return IRQ_HANDLED;
612 static bool interrupts = true;
613 module_param(interrupts, bool, 0444);
614 MODULE_PARM_DESC(interrupts, "Enable interrupts");
616 static int tpm_tis_init(struct device *dev, resource_size_t start,
617 resource_size_t len, unsigned int irq)
619 u32 vendor, intfcaps, intmask;
620 int rc, i, irq_s, irq_e, probe;
621 struct tpm_chip *chip;
622 struct priv_data *priv;
624 priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL);
625 if (priv == NULL)
626 return -ENOMEM;
627 if (!(chip = tpm_register_hardware(dev, &tpm_tis)))
628 return -ENODEV;
629 chip->vendor.priv = priv;
631 chip->vendor.iobase = ioremap(start, len);
632 if (!chip->vendor.iobase) {
633 rc = -EIO;
634 goto out_err;
637 /* Default timeouts */
638 chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
639 chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT);
640 chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
641 chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
643 if (wait_startup(chip, 0) != 0) {
644 rc = -ENODEV;
645 goto out_err;
648 if (request_locality(chip, 0) != 0) {
649 rc = -ENODEV;
650 goto out_err;
653 vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
654 chip->vendor.manufacturer_id = vendor;
656 dev_info(dev,
657 "1.2 TPM (device-id 0x%X, rev-id %d)\n",
658 vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0)));
660 if (!itpm) {
661 probe = probe_itpm(chip);
662 if (probe < 0) {
663 rc = -ENODEV;
664 goto out_err;
666 itpm = !!probe;
669 if (itpm)
670 dev_info(dev, "Intel iTPM workaround enabled\n");
673 /* Figure out the capabilities */
674 intfcaps =
675 ioread32(chip->vendor.iobase +
676 TPM_INTF_CAPS(chip->vendor.locality));
677 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
678 intfcaps);
679 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
680 dev_dbg(dev, "\tBurst Count Static\n");
681 if (intfcaps & TPM_INTF_CMD_READY_INT)
682 dev_dbg(dev, "\tCommand Ready Int Support\n");
683 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
684 dev_dbg(dev, "\tInterrupt Edge Falling\n");
685 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
686 dev_dbg(dev, "\tInterrupt Edge Rising\n");
687 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
688 dev_dbg(dev, "\tInterrupt Level Low\n");
689 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
690 dev_dbg(dev, "\tInterrupt Level High\n");
691 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
692 dev_dbg(dev, "\tLocality Change Int Support\n");
693 if (intfcaps & TPM_INTF_STS_VALID_INT)
694 dev_dbg(dev, "\tSts Valid Int Support\n");
695 if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
696 dev_dbg(dev, "\tData Avail Int Support\n");
698 /* INTERRUPT Setup */
699 init_waitqueue_head(&chip->vendor.read_queue);
700 init_waitqueue_head(&chip->vendor.int_queue);
702 intmask =
703 ioread32(chip->vendor.iobase +
704 TPM_INT_ENABLE(chip->vendor.locality));
706 intmask |= TPM_INTF_CMD_READY_INT
707 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
708 | TPM_INTF_STS_VALID_INT;
710 iowrite32(intmask,
711 chip->vendor.iobase +
712 TPM_INT_ENABLE(chip->vendor.locality));
713 if (interrupts)
714 chip->vendor.irq = irq;
715 if (interrupts && !chip->vendor.irq) {
716 irq_s =
717 ioread8(chip->vendor.iobase +
718 TPM_INT_VECTOR(chip->vendor.locality));
719 if (irq_s) {
720 irq_e = irq_s;
721 } else {
722 irq_s = 3;
723 irq_e = 15;
726 for (i = irq_s; i <= irq_e && chip->vendor.irq == 0; i++) {
727 iowrite8(i, chip->vendor.iobase +
728 TPM_INT_VECTOR(chip->vendor.locality));
729 if (request_irq
730 (i, tis_int_probe, IRQF_SHARED,
731 chip->vendor.miscdev.name, chip) != 0) {
732 dev_info(chip->dev,
733 "Unable to request irq: %d for probe\n",
735 continue;
738 /* Clear all existing */
739 iowrite32(ioread32
740 (chip->vendor.iobase +
741 TPM_INT_STATUS(chip->vendor.locality)),
742 chip->vendor.iobase +
743 TPM_INT_STATUS(chip->vendor.locality));
745 /* Turn on */
746 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
747 chip->vendor.iobase +
748 TPM_INT_ENABLE(chip->vendor.locality));
750 chip->vendor.probed_irq = 0;
752 /* Generate Interrupts */
753 tpm_gen_interrupt(chip);
755 chip->vendor.irq = chip->vendor.probed_irq;
757 /* free_irq will call into tis_int_probe;
758 clear all irqs we haven't seen while doing
759 tpm_gen_interrupt */
760 iowrite32(ioread32
761 (chip->vendor.iobase +
762 TPM_INT_STATUS(chip->vendor.locality)),
763 chip->vendor.iobase +
764 TPM_INT_STATUS(chip->vendor.locality));
766 /* Turn off */
767 iowrite32(intmask,
768 chip->vendor.iobase +
769 TPM_INT_ENABLE(chip->vendor.locality));
770 free_irq(i, chip);
773 if (chip->vendor.irq) {
774 iowrite8(chip->vendor.irq,
775 chip->vendor.iobase +
776 TPM_INT_VECTOR(chip->vendor.locality));
777 if (request_irq
778 (chip->vendor.irq, tis_int_handler, IRQF_SHARED,
779 chip->vendor.miscdev.name, chip) != 0) {
780 dev_info(chip->dev,
781 "Unable to request irq: %d for use\n",
782 chip->vendor.irq);
783 chip->vendor.irq = 0;
784 } else {
785 /* Clear all existing */
786 iowrite32(ioread32
787 (chip->vendor.iobase +
788 TPM_INT_STATUS(chip->vendor.locality)),
789 chip->vendor.iobase +
790 TPM_INT_STATUS(chip->vendor.locality));
792 /* Turn on */
793 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
794 chip->vendor.iobase +
795 TPM_INT_ENABLE(chip->vendor.locality));
799 if (tpm_get_timeouts(chip)) {
800 dev_err(dev, "Could not get TPM timeouts and durations\n");
801 rc = -ENODEV;
802 goto out_err;
805 if (tpm_do_selftest(chip)) {
806 dev_err(dev, "TPM self test failed\n");
807 rc = -ENODEV;
808 goto out_err;
811 INIT_LIST_HEAD(&chip->vendor.list);
812 mutex_lock(&tis_lock);
813 list_add(&chip->vendor.list, &tis_chips);
814 mutex_unlock(&tis_lock);
817 return 0;
818 out_err:
819 if (chip->vendor.iobase)
820 iounmap(chip->vendor.iobase);
821 tpm_remove_hardware(chip->dev);
822 return rc;
825 #if defined(CONFIG_PNP) || defined(CONFIG_PM_SLEEP)
826 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
828 u32 intmask;
830 /* reenable interrupts that device may have lost or
831 BIOS/firmware may have disabled */
832 iowrite8(chip->vendor.irq, chip->vendor.iobase +
833 TPM_INT_VECTOR(chip->vendor.locality));
835 intmask =
836 ioread32(chip->vendor.iobase +
837 TPM_INT_ENABLE(chip->vendor.locality));
839 intmask |= TPM_INTF_CMD_READY_INT
840 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
841 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
843 iowrite32(intmask,
844 chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
846 #endif
848 #ifdef CONFIG_PM_SLEEP
849 static int tpm_tis_resume(struct device *dev)
851 struct tpm_chip *chip = dev_get_drvdata(dev);
852 int ret;
854 if (chip->vendor.irq)
855 tpm_tis_reenable_interrupts(chip);
857 ret = tpm_pm_resume(dev);
858 if (!ret)
859 tpm_do_selftest(chip);
861 return ret;
863 #endif
865 static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_resume);
867 #ifdef CONFIG_PNP
868 static int tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
869 const struct pnp_device_id *pnp_id)
871 resource_size_t start, len;
872 unsigned int irq = 0;
874 start = pnp_mem_start(pnp_dev, 0);
875 len = pnp_mem_len(pnp_dev, 0);
877 if (pnp_irq_valid(pnp_dev, 0))
878 irq = pnp_irq(pnp_dev, 0);
879 else
880 interrupts = false;
882 if (is_itpm(pnp_dev))
883 itpm = true;
885 return tpm_tis_init(&pnp_dev->dev, start, len, irq);
888 static struct pnp_device_id tpm_pnp_tbl[] = {
889 {"PNP0C31", 0}, /* TPM */
890 {"ATM1200", 0}, /* Atmel */
891 {"IFX0102", 0}, /* Infineon */
892 {"BCM0101", 0}, /* Broadcom */
893 {"BCM0102", 0}, /* Broadcom */
894 {"NSC1200", 0}, /* National */
895 {"ICO0102", 0}, /* Intel */
896 /* Add new here */
897 {"", 0}, /* User Specified */
898 {"", 0} /* Terminator */
900 MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
902 static void tpm_tis_pnp_remove(struct pnp_dev *dev)
904 struct tpm_chip *chip = pnp_get_drvdata(dev);
906 tpm_dev_vendor_release(chip);
908 kfree(chip);
912 static struct pnp_driver tis_pnp_driver = {
913 .name = "tpm_tis",
914 .id_table = tpm_pnp_tbl,
915 .probe = tpm_tis_pnp_init,
916 .remove = tpm_tis_pnp_remove,
917 #ifdef CONFIG_PM_SLEEP
918 .driver = {
919 .pm = &tpm_tis_pm,
921 #endif
924 #define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2
925 module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id,
926 sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444);
927 MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe");
928 #endif
930 static struct platform_driver tis_drv = {
931 .driver = {
932 .name = "tpm_tis",
933 .owner = THIS_MODULE,
934 .pm = &tpm_tis_pm,
938 static struct platform_device *pdev;
940 static bool force;
941 module_param(force, bool, 0444);
942 MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry");
943 static int __init init_tis(void)
945 int rc;
946 #ifdef CONFIG_PNP
947 if (!force)
948 return pnp_register_driver(&tis_pnp_driver);
949 #endif
951 rc = platform_driver_register(&tis_drv);
952 if (rc < 0)
953 return rc;
954 pdev = platform_device_register_simple("tpm_tis", -1, NULL, 0);
955 if (IS_ERR(pdev)) {
956 rc = PTR_ERR(pdev);
957 goto err_dev;
959 rc = tpm_tis_init(&pdev->dev, TIS_MEM_BASE, TIS_MEM_LEN, 0);
960 if (rc)
961 goto err_init;
962 return 0;
963 err_init:
964 platform_device_unregister(pdev);
965 err_dev:
966 platform_driver_unregister(&tis_drv);
967 return rc;
970 static void __exit cleanup_tis(void)
972 struct tpm_vendor_specific *i, *j;
973 struct tpm_chip *chip;
974 mutex_lock(&tis_lock);
975 list_for_each_entry_safe(i, j, &tis_chips, list) {
976 chip = to_tpm_chip(i);
977 tpm_remove_hardware(chip->dev);
978 iowrite32(~TPM_GLOBAL_INT_ENABLE &
979 ioread32(chip->vendor.iobase +
980 TPM_INT_ENABLE(chip->vendor.
981 locality)),
982 chip->vendor.iobase +
983 TPM_INT_ENABLE(chip->vendor.locality));
984 release_locality(chip, chip->vendor.locality, 1);
985 if (chip->vendor.irq)
986 free_irq(chip->vendor.irq, chip);
987 iounmap(i->iobase);
988 list_del(&i->list);
990 mutex_unlock(&tis_lock);
991 #ifdef CONFIG_PNP
992 if (!force) {
993 pnp_unregister_driver(&tis_pnp_driver);
994 return;
996 #endif
997 platform_device_unregister(pdev);
998 platform_driver_unregister(&tis_drv);
1001 module_init(init_tis);
1002 module_exit(cleanup_tis);
1003 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
1004 MODULE_DESCRIPTION("TPM Driver");
1005 MODULE_VERSION("2.0");
1006 MODULE_LICENSE("GPL");