drivers/media/i2c/mt9v032.c

   1 /*
   2  * Driver for MT9V032 CMOS Image Sensor from Micron
   3  *
   4  * Copyright (C) 2010, Laurent Pinchart <laurent.pinchart@ideasonboard.com>
   5  *
   6  * Based on the MT9M001 driver,
   7  *
   8  * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/clk.h>
  16 #include <linux/delay.h>
  17 #include <linux/i2c.h>
  18 #include <linux/log2.h>
  19 #include <linux/mutex.h>
  20 #include <linux/slab.h>
  21 #include <linux/videodev2.h>
  22 #include <linux/v4l2-mediabus.h>
  23 #include <linux/module.h>
  24
  25 #include <media/mt9v032.h>
  26 #include <media/v4l2-ctrls.h>
  27 #include <media/v4l2-device.h>
  28 #include <media/v4l2-subdev.h>
  29
  30 #define MT9V032_PIXEL_ARRAY_HEIGHT                      492
  31 #define MT9V032_PIXEL_ARRAY_WIDTH                       782
  32
  33 #define MT9V032_SYSCLK_FREQ_DEF                         26600000
  34
  35 #define MT9V032_CHIP_VERSION                            0x00
  36 #define         MT9V032_CHIP_ID_REV1                    0x1311
  37 #define         MT9V032_CHIP_ID_REV3                    0x1313
  38 #define MT9V032_COLUMN_START                            0x01
  39 #define         MT9V032_COLUMN_START_MIN                1
  40 #define         MT9V032_COLUMN_START_DEF                1
  41 #define         MT9V032_COLUMN_START_MAX                752
  42 #define MT9V032_ROW_START                               0x02
  43 #define         MT9V032_ROW_START_MIN                   4
  44 #define         MT9V032_ROW_START_DEF                   5
  45 #define         MT9V032_ROW_START_MAX                   482
  46 #define MT9V032_WINDOW_HEIGHT                           0x03
  47 #define         MT9V032_WINDOW_HEIGHT_MIN               1
  48 #define         MT9V032_WINDOW_HEIGHT_DEF               480
  49 #define         MT9V032_WINDOW_HEIGHT_MAX               480
  50 #define MT9V032_WINDOW_WIDTH                            0x04
  51 #define         MT9V032_WINDOW_WIDTH_MIN                1
  52 #define         MT9V032_WINDOW_WIDTH_DEF                752
  53 #define         MT9V032_WINDOW_WIDTH_MAX                752
  54 #define MT9V032_HORIZONTAL_BLANKING                     0x05
  55 #define         MT9V032_HORIZONTAL_BLANKING_MIN         43
  56 #define         MT9V032_HORIZONTAL_BLANKING_DEF         94
  57 #define         MT9V032_HORIZONTAL_BLANKING_MAX         1023
  58 #define MT9V032_VERTICAL_BLANKING                       0x06
  59 #define         MT9V032_VERTICAL_BLANKING_MIN           4
  60 #define         MT9V032_VERTICAL_BLANKING_DEF           45
  61 #define         MT9V032_VERTICAL_BLANKING_MAX           3000
  62 #define MT9V032_CHIP_CONTROL                            0x07
  63 #define         MT9V032_CHIP_CONTROL_MASTER_MODE        (1 << 3)
  64 #define         MT9V032_CHIP_CONTROL_DOUT_ENABLE        (1 << 7)
  65 #define         MT9V032_CHIP_CONTROL_SEQUENTIAL         (1 << 8)
  66 #define MT9V032_SHUTTER_WIDTH1                          0x08
  67 #define MT9V032_SHUTTER_WIDTH2                          0x09
  68 #define MT9V032_SHUTTER_WIDTH_CONTROL                   0x0a
  69 #define MT9V032_TOTAL_SHUTTER_WIDTH                     0x0b
  70 #define         MT9V032_TOTAL_SHUTTER_WIDTH_MIN         1
  71 #define         MT9V032_TOTAL_SHUTTER_WIDTH_DEF         480
  72 #define         MT9V032_TOTAL_SHUTTER_WIDTH_MAX         32767
  73 #define MT9V032_RESET                                   0x0c
  74 #define MT9V032_READ_MODE                               0x0d
  75 #define         MT9V032_READ_MODE_ROW_BIN_MASK          (3 << 0)
  76 #define         MT9V032_READ_MODE_ROW_BIN_SHIFT         0
  77 #define         MT9V032_READ_MODE_COLUMN_BIN_MASK       (3 << 2)
  78 #define         MT9V032_READ_MODE_COLUMN_BIN_SHIFT      2
  79 #define         MT9V032_READ_MODE_ROW_FLIP              (1 << 4)
  80 #define         MT9V032_READ_MODE_COLUMN_FLIP           (1 << 5)
  81 #define         MT9V032_READ_MODE_DARK_COLUMNS          (1 << 6)
  82 #define         MT9V032_READ_MODE_DARK_ROWS             (1 << 7)
  83 #define MT9V032_PIXEL_OPERATION_MODE                    0x0f
  84 #define         MT9V032_PIXEL_OPERATION_MODE_COLOR      (1 << 2)
  85 #define         MT9V032_PIXEL_OPERATION_MODE_HDR        (1 << 6)
  86 #define MT9V032_ANALOG_GAIN                             0x35
  87 #define         MT9V032_ANALOG_GAIN_MIN                 16
  88 #define         MT9V032_ANALOG_GAIN_DEF                 16
  89 #define         MT9V032_ANALOG_GAIN_MAX                 64
  90 #define MT9V032_MAX_ANALOG_GAIN                         0x36
  91 #define         MT9V032_MAX_ANALOG_GAIN_MAX             127
  92 #define MT9V032_FRAME_DARK_AVERAGE                      0x42
  93 #define MT9V032_DARK_AVG_THRESH                         0x46
  94 #define         MT9V032_DARK_AVG_LOW_THRESH_MASK        (255 << 0)
  95 #define         MT9V032_DARK_AVG_LOW_THRESH_SHIFT       0
  96 #define         MT9V032_DARK_AVG_HIGH_THRESH_MASK       (255 << 8)
  97 #define         MT9V032_DARK_AVG_HIGH_THRESH_SHIFT      8
  98 #define MT9V032_ROW_NOISE_CORR_CONTROL                  0x70
  99 #define         MT9V032_ROW_NOISE_CORR_ENABLE           (1 << 5)
 100 #define         MT9V032_ROW_NOISE_CORR_USE_BLK_AVG      (1 << 7)
 101 #define MT9V032_PIXEL_CLOCK                             0x74
 102 #define         MT9V032_PIXEL_CLOCK_INV_LINE            (1 << 0)
 103 #define         MT9V032_PIXEL_CLOCK_INV_FRAME           (1 << 1)
 104 #define         MT9V032_PIXEL_CLOCK_XOR_LINE            (1 << 2)
 105 #define         MT9V032_PIXEL_CLOCK_CONT_LINE           (1 << 3)
 106 #define         MT9V032_PIXEL_CLOCK_INV_PXL_CLK         (1 << 4)
 107 #define MT9V032_TEST_PATTERN                            0x7f
 108 #define         MT9V032_TEST_PATTERN_DATA_MASK          (1023 << 0)
 109 #define         MT9V032_TEST_PATTERN_DATA_SHIFT         0
 110 #define         MT9V032_TEST_PATTERN_USE_DATA           (1 << 10)
 111 #define         MT9V032_TEST_PATTERN_GRAY_MASK          (3 << 11)
 112 #define         MT9V032_TEST_PATTERN_GRAY_NONE          (0 << 11)
 113 #define         MT9V032_TEST_PATTERN_GRAY_VERTICAL      (1 << 11)
 114 #define         MT9V032_TEST_PATTERN_GRAY_HORIZONTAL    (2 << 11)
 115 #define         MT9V032_TEST_PATTERN_GRAY_DIAGONAL      (3 << 11)
 116 #define         MT9V032_TEST_PATTERN_ENABLE             (1 << 13)
 117 #define         MT9V032_TEST_PATTERN_FLIP               (1 << 14)
 118 #define MT9V032_AEC_AGC_ENABLE                          0xaf
 119 #define         MT9V032_AEC_ENABLE                      (1 << 0)
 120 #define         MT9V032_AGC_ENABLE                      (1 << 1)
 121 #define MT9V032_THERMAL_INFO                            0xc1
 122
 123 struct mt9v032 {
 124         struct v4l2_subdev subdev;
 125         struct media_pad pad;
 126
 127         struct v4l2_mbus_framefmt format;
 128         struct v4l2_rect crop;
 129
 130         struct v4l2_ctrl_handler ctrls;
 131         struct {
 132                 struct v4l2_ctrl *link_freq;
 133                 struct v4l2_ctrl *pixel_rate;
 134         };
 135
 136         struct mutex power_lock;
 137         int power_count;
 138
 139         struct clk *clk;
 140
 141         struct mt9v032_platform_data *pdata;
 142
 143         u32 sysclk;
 144         u16 chip_control;
 145         u16 aec_agc;
 146         u16 hblank;
 147         struct {
 148                 struct v4l2_ctrl *test_pattern;
 149                 struct v4l2_ctrl *test_pattern_color;
 150         };
 151 };
 152
 153 static struct mt9v032 *to_mt9v032(struct v4l2_subdev *sd)
 154 {
 155         return container_of(sd, struct mt9v032, subdev);
 156 }
 157
 158 static int mt9v032_read(struct i2c_client *client, const u8 reg)
 159 {
 160         s32 data = i2c_smbus_read_word_swapped(client, reg);
 161         dev_dbg(&client->dev, "%s: read 0x%04x from 0x%02x\n", __func__,
 162                 data, reg);
 163         return data;
 164 }
 165
 166 static int mt9v032_write(struct i2c_client *client, const u8 reg,
 167                          const u16 data)
 168 {
 169         dev_dbg(&client->dev, "%s: writing 0x%04x to 0x%02x\n", __func__,
 170                 data, reg);
 171         return i2c_smbus_write_word_swapped(client, reg, data);
 172 }
 173
 174 static int mt9v032_set_chip_control(struct mt9v032 *mt9v032, u16 clear, u16 set)
 175 {
 176         struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
 177         u16 value = (mt9v032->chip_control & ~clear) | set;
 178         int ret;
 179
 180         ret = mt9v032_write(client, MT9V032_CHIP_CONTROL, value);
 181         if (ret < 0)
 182                 return ret;
 183
 184         mt9v032->chip_control = value;
 185         return 0;
 186 }
 187
 188 static int
 189 mt9v032_update_aec_agc(struct mt9v032 *mt9v032, u16 which, int enable)
 190 {
 191         struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
 192         u16 value = mt9v032->aec_agc;
 193         int ret;
 194
 195         if (enable)
 196                 value |= which;
 197         else
 198                 value &= ~which;
 199
 200         ret = mt9v032_write(client, MT9V032_AEC_AGC_ENABLE, value);
 201         if (ret < 0)
 202                 return ret;
 203
 204         mt9v032->aec_agc = value;
 205         return 0;
 206 }
 207
 208 static int
 209 mt9v032_update_hblank(struct mt9v032 *mt9v032)
 210 {
 211         struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
 212         struct v4l2_rect *crop = &mt9v032->crop;
 213
 214         return mt9v032_write(client, MT9V032_HORIZONTAL_BLANKING,
 215                              max_t(s32, mt9v032->hblank, 660 - crop->width));
 216 }
 217
 218 #define EXT_CLK         25000000
 219
 220 static int mt9v032_power_on(struct mt9v032 *mt9v032)
 221 {
 222         struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
 223         int ret;
 224
 225         clk_set_rate(mt9v032->clk, mt9v032->sysclk);
 226         clk_prepare_enable(mt9v032->clk);
 227         udelay(1);
 228
 229         /* Reset the chip and stop data read out */
 230         ret = mt9v032_write(client, MT9V032_RESET, 1);
 231         if (ret < 0)
 232                 return ret;
 233
 234         ret = mt9v032_write(client, MT9V032_RESET, 0);
 235         if (ret < 0)
 236                 return ret;
 237
 238         return mt9v032_write(client, MT9V032_CHIP_CONTROL, 0);
 239 }
 240
 241 static void mt9v032_power_off(struct mt9v032 *mt9v032)
 242 {
 243         clk_disable_unprepare(mt9v032->clk);
 244 }
 245
 246 static int __mt9v032_set_power(struct mt9v032 *mt9v032, bool on)
 247 {
 248         struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
 249         int ret;
 250
 251         if (!on) {
 252                 mt9v032_power_off(mt9v032);
 253                 return 0;
 254         }
 255
 256         ret = mt9v032_power_on(mt9v032);
 257         if (ret < 0)
 258                 return ret;
 259
 260         /* Configure the pixel clock polarity */
 261         if (mt9v032->pdata && mt9v032->pdata->clk_pol) {
 262                 ret = mt9v032_write(client, MT9V032_PIXEL_CLOCK,
 263                                 MT9V032_PIXEL_CLOCK_INV_PXL_CLK);
 264                 if (ret < 0)
 265                         return ret;
 266         }
 267
 268         /* Disable the noise correction algorithm and restore the controls. */
 269         ret = mt9v032_write(client, MT9V032_ROW_NOISE_CORR_CONTROL, 0);
 270         if (ret < 0)
 271                 return ret;
 272
 273         return v4l2_ctrl_handler_setup(&mt9v032->ctrls);
 274 }
 275
 276 /* -----------------------------------------------------------------------------
 277  * V4L2 subdev video operations
 278  */
 279
 280 static struct v4l2_mbus_framefmt *
 281 __mt9v032_get_pad_format(struct mt9v032 *mt9v032, struct v4l2_subdev_fh *fh,
 282                          unsigned int pad, enum v4l2_subdev_format_whence which)
 283 {
 284         switch (which) {
 285         case V4L2_SUBDEV_FORMAT_TRY:
 286                 return v4l2_subdev_get_try_format(fh, pad);
 287         case V4L2_SUBDEV_FORMAT_ACTIVE:
 288                 return &mt9v032->format;
 289         default:
 290                 return NULL;
 291         }
 292 }
 293
 294 static struct v4l2_rect *
 295 __mt9v032_get_pad_crop(struct mt9v032 *mt9v032, struct v4l2_subdev_fh *fh,
 296                        unsigned int pad, enum v4l2_subdev_format_whence which)
 297 {
 298         switch (which) {
 299         case V4L2_SUBDEV_FORMAT_TRY:
 300                 return v4l2_subdev_get_try_crop(fh, pad);
 301         case V4L2_SUBDEV_FORMAT_ACTIVE:
 302                 return &mt9v032->crop;
 303         default:
 304                 return NULL;
 305         }
 306 }
 307
 308 static int mt9v032_s_stream(struct v4l2_subdev *subdev, int enable)
 309 {
 310         const u16 mode = MT9V032_CHIP_CONTROL_MASTER_MODE
 311                        | MT9V032_CHIP_CONTROL_DOUT_ENABLE
 312                        | MT9V032_CHIP_CONTROL_SEQUENTIAL;
 313         struct i2c_client *client = v4l2_get_subdevdata(subdev);
 314         struct mt9v032 *mt9v032 = to_mt9v032(subdev);
 315         struct v4l2_mbus_framefmt *format = &mt9v032->format;
 316         struct v4l2_rect *crop = &mt9v032->crop;
 317         unsigned int hratio;
 318         unsigned int vratio;
 319         int ret;
 320
 321         if (!enable)
 322                 return mt9v032_set_chip_control(mt9v032, mode, 0);
 323
 324         /* Configure the window size and row/column bin */
 325         hratio = DIV_ROUND_CLOSEST(crop->width, format->width);
 326         vratio = DIV_ROUND_CLOSEST(crop->height, format->height);
 327
 328         ret = mt9v032_write(client, MT9V032_READ_MODE,
 329                     (hratio - 1) << MT9V032_READ_MODE_ROW_BIN_SHIFT |
 330                     (vratio - 1) << MT9V032_READ_MODE_COLUMN_BIN_SHIFT);
 331         if (ret < 0)
 332                 return ret;
 333
 334         ret = mt9v032_write(client, MT9V032_COLUMN_START, crop->left);
 335         if (ret < 0)
 336                 return ret;
 337
 338         ret = mt9v032_write(client, MT9V032_ROW_START, crop->top);
 339         if (ret < 0)
 340                 return ret;
 341
 342         ret = mt9v032_write(client, MT9V032_WINDOW_WIDTH, crop->width);
 343         if (ret < 0)
 344                 return ret;
 345
 346         ret = mt9v032_write(client, MT9V032_WINDOW_HEIGHT, crop->height);
 347         if (ret < 0)
 348                 return ret;
 349
 350         ret = mt9v032_update_hblank(mt9v032);
 351         if (ret < 0)
 352                 return ret;
 353
 354         /* Switch to master "normal" mode */
 355         return mt9v032_set_chip_control(mt9v032, 0, mode);
 356 }
 357
 358 static int mt9v032_enum_mbus_code(struct v4l2_subdev *subdev,
 359                                   struct v4l2_subdev_fh *fh,
 360                                   struct v4l2_subdev_mbus_code_enum *code)
 361 {
 362         if (code->index > 0)
 363                 return -EINVAL;
 364
 365         code->code = V4L2_MBUS_FMT_SGRBG10_1X10;
 366         return 0;
 367 }
 368
 369 static int mt9v032_enum_frame_size(struct v4l2_subdev *subdev,
 370                                    struct v4l2_subdev_fh *fh,
 371                                    struct v4l2_subdev_frame_size_enum *fse)
 372 {
 373         if (fse->index >= 8 || fse->code != V4L2_MBUS_FMT_SGRBG10_1X10)
 374                 return -EINVAL;
 375
 376         fse->min_width = MT9V032_WINDOW_WIDTH_DEF / fse->index;
 377         fse->max_width = fse->min_width;
 378         fse->min_height = MT9V032_WINDOW_HEIGHT_DEF / fse->index;
 379         fse->max_height = fse->min_height;
 380
 381         return 0;
 382 }
 383
 384 static int mt9v032_get_format(struct v4l2_subdev *subdev,
 385                               struct v4l2_subdev_fh *fh,
 386                               struct v4l2_subdev_format *format)
 387 {
 388         struct mt9v032 *mt9v032 = to_mt9v032(subdev);
 389
 390         format->format = *__mt9v032_get_pad_format(mt9v032, fh, format->pad,
 391                                                    format->which);
 392         return 0;
 393 }
 394
 395 static void mt9v032_configure_pixel_rate(struct mt9v032 *mt9v032,
 396                                          unsigned int hratio)
 397 {
 398         struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
 399         int ret;
 400
 401         ret = v4l2_ctrl_s_ctrl_int64(mt9v032->pixel_rate,
 402                                      mt9v032->sysclk / hratio);
 403         if (ret < 0)
 404                 dev_warn(&client->dev, "failed to set pixel rate (%d)\n", ret);
 405 }
 406
 407 static int mt9v032_set_format(struct v4l2_subdev *subdev,
 408                               struct v4l2_subdev_fh *fh,
 409                               struct v4l2_subdev_format *format)
 410 {
 411         struct mt9v032 *mt9v032 = to_mt9v032(subdev);
 412         struct v4l2_mbus_framefmt *__format;
 413         struct v4l2_rect *__crop;
 414         unsigned int width;
 415         unsigned int height;
 416         unsigned int hratio;
 417         unsigned int vratio;
 418
 419         __crop = __mt9v032_get_pad_crop(mt9v032, fh, format->pad,
 420                                         format->which);
 421
 422         /* Clamp the width and height to avoid dividing by zero. */
 423         width = clamp_t(unsigned int, ALIGN(format->format.width, 2),
 424                         max(__crop->width / 8, MT9V032_WINDOW_WIDTH_MIN),
 425                         __crop->width);
 426         height = clamp_t(unsigned int, ALIGN(format->format.height, 2),
 427                          max(__crop->height / 8, MT9V032_WINDOW_HEIGHT_MIN),
 428                          __crop->height);
 429
 430         hratio = DIV_ROUND_CLOSEST(__crop->width, width);
 431         vratio = DIV_ROUND_CLOSEST(__crop->height, height);
 432
 433         __format = __mt9v032_get_pad_format(mt9v032, fh, format->pad,
 434                                             format->which);
 435         __format->width = __crop->width / hratio;
 436         __format->height = __crop->height / vratio;
 437         if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE)
 438                 mt9v032_configure_pixel_rate(mt9v032, hratio);
 439
 440         format->format = *__format;
 441
 442         return 0;
 443 }
 444
 445 static int mt9v032_get_crop(struct v4l2_subdev *subdev,
 446                             struct v4l2_subdev_fh *fh,
 447                             struct v4l2_subdev_crop *crop)
 448 {
 449         struct mt9v032 *mt9v032 = to_mt9v032(subdev);
 450
 451         crop->rect = *__mt9v032_get_pad_crop(mt9v032, fh, crop->pad,
 452                                              crop->which);
 453         return 0;
 454 }
 455
 456 static int mt9v032_set_crop(struct v4l2_subdev *subdev,
 457                             struct v4l2_subdev_fh *fh,
 458                             struct v4l2_subdev_crop *crop)
 459 {
 460         struct mt9v032 *mt9v032 = to_mt9v032(subdev);
 461         struct v4l2_mbus_framefmt *__format;
 462         struct v4l2_rect *__crop;
 463         struct v4l2_rect rect;
 464
 465         /* Clamp the crop rectangle boundaries and align them to a non multiple
 466          * of 2 pixels to ensure a GRBG Bayer pattern.
 467          */
 468         rect.left = clamp(ALIGN(crop->rect.left + 1, 2) - 1,
 469                           MT9V032_COLUMN_START_MIN,
 470                           MT9V032_COLUMN_START_MAX);
 471         rect.top = clamp(ALIGN(crop->rect.top + 1, 2) - 1,
 472                          MT9V032_ROW_START_MIN,
 473                          MT9V032_ROW_START_MAX);
 474         rect.width = clamp(ALIGN(crop->rect.width, 2),
 475                            MT9V032_WINDOW_WIDTH_MIN,
 476                            MT9V032_WINDOW_WIDTH_MAX);
 477         rect.height = clamp(ALIGN(crop->rect.height, 2),
 478                             MT9V032_WINDOW_HEIGHT_MIN,
 479                             MT9V032_WINDOW_HEIGHT_MAX);
 480
 481         rect.width = min(rect.width, MT9V032_PIXEL_ARRAY_WIDTH - rect.left);
 482         rect.height = min(rect.height, MT9V032_PIXEL_ARRAY_HEIGHT - rect.top);
 483
 484         __crop = __mt9v032_get_pad_crop(mt9v032, fh, crop->pad, crop->which);
 485
 486         if (rect.width != __crop->width || rect.height != __crop->height) {
 487                 /* Reset the output image size if the crop rectangle size has
 488                  * been modified.
 489                  */
 490                 __format = __mt9v032_get_pad_format(mt9v032, fh, crop->pad,
 491                                                     crop->which);
 492                 __format->width = rect.width;
 493                 __format->height = rect.height;
 494                 if (crop->which == V4L2_SUBDEV_FORMAT_ACTIVE)
 495                         mt9v032_configure_pixel_rate(mt9v032, 1);
 496         }
 497
 498         *__crop = rect;
 499         crop->rect = rect;
 500
 501         return 0;
 502 }
 503
 504 /* -----------------------------------------------------------------------------
 505  * V4L2 subdev control operations
 506  */
 507
 508 #define V4L2_CID_TEST_PATTERN_COLOR     (V4L2_CID_USER_BASE | 0x1001)
 509
 510 static int mt9v032_s_ctrl(struct v4l2_ctrl *ctrl)
 511 {
 512         struct mt9v032 *mt9v032 =
 513                         container_of(ctrl->handler, struct mt9v032, ctrls);
 514         struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
 515         u32 freq;
 516         u16 data;
 517
 518         switch (ctrl->id) {
 519         case V4L2_CID_AUTOGAIN:
 520                 return mt9v032_update_aec_agc(mt9v032, MT9V032_AGC_ENABLE,
 521                                               ctrl->val);
 522
 523         case V4L2_CID_GAIN:
 524                 return mt9v032_write(client, MT9V032_ANALOG_GAIN, ctrl->val);
 525
 526         case V4L2_CID_EXPOSURE_AUTO:
 527                 return mt9v032_update_aec_agc(mt9v032, MT9V032_AEC_ENABLE,
 528                                               !ctrl->val);
 529
 530         case V4L2_CID_EXPOSURE:
 531                 return mt9v032_write(client, MT9V032_TOTAL_SHUTTER_WIDTH,
 532                                      ctrl->val);
 533
 534         case V4L2_CID_HBLANK:
 535                 mt9v032->hblank = ctrl->val;
 536                 return mt9v032_update_hblank(mt9v032);
 537
 538         case V4L2_CID_VBLANK:
 539                 return mt9v032_write(client, MT9V032_VERTICAL_BLANKING,
 540                                      ctrl->val);
 541
 542         case V4L2_CID_PIXEL_RATE:
 543         case V4L2_CID_LINK_FREQ:
 544                 if (mt9v032->link_freq == NULL)
 545                         break;
 546
 547                 freq = mt9v032->pdata->link_freqs[mt9v032->link_freq->val];
 548                 mt9v032->pixel_rate->val64 = freq;
 549                 mt9v032->sysclk = freq;
 550                 break;
 551
 552         case V4L2_CID_TEST_PATTERN:
 553                 switch (mt9v032->test_pattern->val) {
 554                 case 0:
 555                         data = 0;
 556                         break;
 557                 case 1:
 558                         data = MT9V032_TEST_PATTERN_GRAY_VERTICAL
 559                              | MT9V032_TEST_PATTERN_ENABLE;
 560                         break;
 561                 case 2:
 562                         data = MT9V032_TEST_PATTERN_GRAY_HORIZONTAL
 563                              | MT9V032_TEST_PATTERN_ENABLE;
 564                         break;
 565                 case 3:
 566                         data = MT9V032_TEST_PATTERN_GRAY_DIAGONAL
 567                              | MT9V032_TEST_PATTERN_ENABLE;
 568                         break;
 569                 default:
 570                         data = (mt9v032->test_pattern_color->val <<
 571                                 MT9V032_TEST_PATTERN_DATA_SHIFT)
 572                              | MT9V032_TEST_PATTERN_USE_DATA
 573                              | MT9V032_TEST_PATTERN_ENABLE
 574                              | MT9V032_TEST_PATTERN_FLIP;
 575                         break;
 576                 }
 577                 return mt9v032_write(client, MT9V032_TEST_PATTERN, data);
 578         }
 579
 580         return 0;
 581 }
 582
 583 static struct v4l2_ctrl_ops mt9v032_ctrl_ops = {
 584         .s_ctrl = mt9v032_s_ctrl,
 585 };
 586
 587 static const char * const mt9v032_test_pattern_menu[] = {
 588         "Disabled",
 589         "Gray Vertical Shade",
 590         "Gray Horizontal Shade",
 591         "Gray Diagonal Shade",
 592         "Plain",
 593 };
 594
 595 static const struct v4l2_ctrl_config mt9v032_test_pattern_color = {
 596         .ops            = &mt9v032_ctrl_ops,
 597         .id             = V4L2_CID_TEST_PATTERN_COLOR,
 598         .type           = V4L2_CTRL_TYPE_INTEGER,
 599         .name           = "Test Pattern Color",
 600         .min            = 0,
 601         .max            = 1023,
 602         .step           = 1,
 603         .def            = 0,
 604         .flags          = 0,
 605 };
 606
 607 /* -----------------------------------------------------------------------------
 608  * V4L2 subdev core operations
 609  */
 610
 611 static int mt9v032_set_power(struct v4l2_subdev *subdev, int on)
 612 {
 613         struct mt9v032 *mt9v032 = to_mt9v032(subdev);
 614         int ret = 0;
 615
 616         mutex_lock(&mt9v032->power_lock);
 617
 618         /* If the power count is modified from 0 to != 0 or from != 0 to 0,
 619          * update the power state.
 620          */
 621         if (mt9v032->power_count == !on) {
 622                 ret = __mt9v032_set_power(mt9v032, !!on);
 623                 if (ret < 0)
 624                         goto done;
 625         }
 626
 627         /* Update the power count. */
 628         mt9v032->power_count += on ? 1 : -1;
 629         WARN_ON(mt9v032->power_count < 0);
 630
 631 done:
 632         mutex_unlock(&mt9v032->power_lock);
 633         return ret;
 634 }
 635
 636 /* -----------------------------------------------------------------------------
 637  * V4L2 subdev internal operations
 638  */
 639
 640 static int mt9v032_registered(struct v4l2_subdev *subdev)
 641 {
 642         struct i2c_client *client = v4l2_get_subdevdata(subdev);
 643         struct mt9v032 *mt9v032 = to_mt9v032(subdev);
 644         s32 data;
 645         int ret;
 646
 647         dev_info(&client->dev, "Probing MT9V032 at address 0x%02x\n",
 648                         client->addr);
 649
 650         ret = mt9v032_power_on(mt9v032);
 651         if (ret < 0) {
 652                 dev_err(&client->dev, "MT9V032 power up failed\n");
 653                 return ret;
 654         }
 655
 656         /* Read and check the sensor version */
 657         data = mt9v032_read(client, MT9V032_CHIP_VERSION);
 658         if (data != MT9V032_CHIP_ID_REV1 && data != MT9V032_CHIP_ID_REV3) {
 659                 dev_err(&client->dev, "MT9V032 not detected, wrong version "
 660                                 "0x%04x\n", data);
 661                 return -ENODEV;
 662         }
 663
 664         mt9v032_power_off(mt9v032);
 665
 666         dev_info(&client->dev, "MT9V032 detected at address 0x%02x\n",
 667                         client->addr);
 668
 669         mt9v032_configure_pixel_rate(mt9v032, 1);
 670
 671         return ret;
 672 }
 673
 674 static int mt9v032_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
 675 {
 676         struct v4l2_mbus_framefmt *format;
 677         struct v4l2_rect *crop;
 678
 679         crop = v4l2_subdev_get_try_crop(fh, 0);
 680         crop->left = MT9V032_COLUMN_START_DEF;
 681         crop->top = MT9V032_ROW_START_DEF;
 682         crop->width = MT9V032_WINDOW_WIDTH_DEF;
 683         crop->height = MT9V032_WINDOW_HEIGHT_DEF;
 684
 685         format = v4l2_subdev_get_try_format(fh, 0);
 686         format->code = V4L2_MBUS_FMT_SGRBG10_1X10;
 687         format->width = MT9V032_WINDOW_WIDTH_DEF;
 688         format->height = MT9V032_WINDOW_HEIGHT_DEF;
 689         format->field = V4L2_FIELD_NONE;
 690         format->colorspace = V4L2_COLORSPACE_SRGB;
 691
 692         return mt9v032_set_power(subdev, 1);
 693 }
 694
 695 static int mt9v032_close(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
 696 {
 697         return mt9v032_set_power(subdev, 0);
 698 }
 699
 700 static struct v4l2_subdev_core_ops mt9v032_subdev_core_ops = {
 701         .s_power        = mt9v032_set_power,
 702 };
 703
 704 static struct v4l2_subdev_video_ops mt9v032_subdev_video_ops = {
 705         .s_stream       = mt9v032_s_stream,
 706 };
 707
 708 static struct v4l2_subdev_pad_ops mt9v032_subdev_pad_ops = {
 709         .enum_mbus_code = mt9v032_enum_mbus_code,
 710         .enum_frame_size = mt9v032_enum_frame_size,
 711         .get_fmt = mt9v032_get_format,
 712         .set_fmt = mt9v032_set_format,
 713         .get_crop = mt9v032_get_crop,
 714         .set_crop = mt9v032_set_crop,
 715 };
 716
 717 static struct v4l2_subdev_ops mt9v032_subdev_ops = {
 718         .core   = &mt9v032_subdev_core_ops,
 719         .video  = &mt9v032_subdev_video_ops,
 720         .pad    = &mt9v032_subdev_pad_ops,
 721 };
 722
 723 static const struct v4l2_subdev_internal_ops mt9v032_subdev_internal_ops = {
 724         .registered = mt9v032_registered,
 725         .open = mt9v032_open,
 726         .close = mt9v032_close,
 727 };
 728
 729 /* -----------------------------------------------------------------------------
 730  * Driver initialization and probing
 731  */
 732
 733 static int mt9v032_probe(struct i2c_client *client,
 734                 const struct i2c_device_id *did)
 735 {
 736         struct mt9v032_platform_data *pdata = client->dev.platform_data;
 737         struct mt9v032 *mt9v032;
 738         unsigned int i;
 739         int ret;
 740
 741         if (!i2c_check_functionality(client->adapter,
 742                                      I2C_FUNC_SMBUS_WORD_DATA)) {
 743                 dev_warn(&client->adapter->dev,
 744                          "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
 745                 return -EIO;
 746         }
 747
 748         mt9v032 = devm_kzalloc(&client->dev, sizeof(*mt9v032), GFP_KERNEL);
 749         if (!mt9v032)
 750                 return -ENOMEM;
 751
 752         mt9v032->clk = devm_clk_get(&client->dev, NULL);
 753         if (IS_ERR(mt9v032->clk))
 754                 return PTR_ERR(mt9v032->clk);
 755
 756         mutex_init(&mt9v032->power_lock);
 757         mt9v032->pdata = pdata;
 758
 759         v4l2_ctrl_handler_init(&mt9v032->ctrls, 10);
 760
 761         v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
 762                           V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
 763         v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
 764                           V4L2_CID_GAIN, MT9V032_ANALOG_GAIN_MIN,
 765                           MT9V032_ANALOG_GAIN_MAX, 1, MT9V032_ANALOG_GAIN_DEF);
 766         v4l2_ctrl_new_std_menu(&mt9v032->ctrls, &mt9v032_ctrl_ops,
 767                                V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL, 0,
 768                                V4L2_EXPOSURE_AUTO);
 769         v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
 770                           V4L2_CID_EXPOSURE, MT9V032_TOTAL_SHUTTER_WIDTH_MIN,
 771                           MT9V032_TOTAL_SHUTTER_WIDTH_MAX, 1,
 772                           MT9V032_TOTAL_SHUTTER_WIDTH_DEF);
 773         v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
 774                           V4L2_CID_HBLANK, MT9V032_HORIZONTAL_BLANKING_MIN,
 775                           MT9V032_HORIZONTAL_BLANKING_MAX, 1,
 776                           MT9V032_HORIZONTAL_BLANKING_DEF);
 777         v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
 778                           V4L2_CID_VBLANK, MT9V032_VERTICAL_BLANKING_MIN,
 779                           MT9V032_VERTICAL_BLANKING_MAX, 1,
 780                           MT9V032_VERTICAL_BLANKING_DEF);
 781         mt9v032->test_pattern = v4l2_ctrl_new_std_menu_items(&mt9v032->ctrls,
 782                                 &mt9v032_ctrl_ops, V4L2_CID_TEST_PATTERN,
 783                                 ARRAY_SIZE(mt9v032_test_pattern_menu) - 1, 0, 0,
 784                                 mt9v032_test_pattern_menu);
 785         mt9v032->test_pattern_color = v4l2_ctrl_new_custom(&mt9v032->ctrls,
 786                                       &mt9v032_test_pattern_color, NULL);
 787
 788         v4l2_ctrl_cluster(2, &mt9v032->test_pattern);
 789
 790         mt9v032->pixel_rate =
 791                 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
 792                                   V4L2_CID_PIXEL_RATE, 0, 0, 1, 0);
 793
 794         if (pdata && pdata->link_freqs) {
 795                 unsigned int def = 0;
 796
 797                 for (i = 0; pdata->link_freqs[i]; ++i) {
 798                         if (pdata->link_freqs[i] == pdata->link_def_freq)
 799                                 def = i;
 800                 }
 801
 802                 mt9v032->link_freq =
 803                         v4l2_ctrl_new_int_menu(&mt9v032->ctrls,
 804                                                &mt9v032_ctrl_ops,
 805                                                V4L2_CID_LINK_FREQ, i - 1, def,
 806                                                pdata->link_freqs);
 807                 v4l2_ctrl_cluster(2, &mt9v032->link_freq);
 808         }
 809
 810
 811         mt9v032->subdev.ctrl_handler = &mt9v032->ctrls;
 812
 813         if (mt9v032->ctrls.error)
 814                 printk(KERN_INFO "%s: control initialization error %d\n",
 815                        __func__, mt9v032->ctrls.error);
 816
 817         mt9v032->crop.left = MT9V032_COLUMN_START_DEF;
 818         mt9v032->crop.top = MT9V032_ROW_START_DEF;
 819         mt9v032->crop.width = MT9V032_WINDOW_WIDTH_DEF;
 820         mt9v032->crop.height = MT9V032_WINDOW_HEIGHT_DEF;
 821
 822         mt9v032->format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
 823         mt9v032->format.width = MT9V032_WINDOW_WIDTH_DEF;
 824         mt9v032->format.height = MT9V032_WINDOW_HEIGHT_DEF;
 825         mt9v032->format.field = V4L2_FIELD_NONE;
 826         mt9v032->format.colorspace = V4L2_COLORSPACE_SRGB;
 827
 828         mt9v032->aec_agc = MT9V032_AEC_ENABLE | MT9V032_AGC_ENABLE;
 829         mt9v032->hblank = MT9V032_HORIZONTAL_BLANKING_DEF;
 830         mt9v032->sysclk = MT9V032_SYSCLK_FREQ_DEF;
 831
 832         v4l2_i2c_subdev_init(&mt9v032->subdev, client, &mt9v032_subdev_ops);
 833         mt9v032->subdev.internal_ops = &mt9v032_subdev_internal_ops;
 834         mt9v032->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 835
 836         mt9v032->pad.flags = MEDIA_PAD_FL_SOURCE;
 837         ret = media_entity_init(&mt9v032->subdev.entity, 1, &mt9v032->pad, 0);
 838
 839         if (ret < 0)
 840                 v4l2_ctrl_handler_free(&mt9v032->ctrls);
 841
 842         return ret;
 843 }
 844
 845 static int mt9v032_remove(struct i2c_client *client)
 846 {
 847         struct v4l2_subdev *subdev = i2c_get_clientdata(client);
 848         struct mt9v032 *mt9v032 = to_mt9v032(subdev);
 849
 850         v4l2_ctrl_handler_free(&mt9v032->ctrls);
 851         v4l2_device_unregister_subdev(subdev);
 852         media_entity_cleanup(&subdev->entity);
 853
 854         return 0;
 855 }
 856
 857 static const struct i2c_device_id mt9v032_id[] = {
 858         { "mt9v032", 0 },
 859         { }
 860 };
 861 MODULE_DEVICE_TABLE(i2c, mt9v032_id);
 862
 863 static struct i2c_driver mt9v032_driver = {
 864         .driver = {
 865                 .name = "mt9v032",
 866         },
 867         .probe          = mt9v032_probe,
 868         .remove         = mt9v032_remove,
 869         .id_table       = mt9v032_id,
 870 };
 871
 872 module_i2c_driver(mt9v032_driver);
 873
 874 MODULE_DESCRIPTION("Aptina MT9V032 Camera driver");
 875 MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
 876 MODULE_LICENSE("GPL");