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mfd: wm8350-i2c: Make sure the i2c regmap functions are compiled
[linux/fpc-iii.git] / drivers / memstick / host / r592.c
blob1b6e91345222f7aa3e41bb4c7066fad833feae94
1 /*
2 * Copyright (C) 2010 - Maxim Levitsky
3 * driver for Ricoh memstick readers
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/freezer.h>
13 #include <linux/jiffies.h>
14 #include <linux/interrupt.h>
15 #include <linux/pci.h>
16 #include <linux/pci_ids.h>
17 #include <linux/delay.h>
18 #include <linux/slab.h>
19 #include <linux/kthread.h>
20 #include <linux/sched.h>
21 #include <linux/highmem.h>
22 #include <asm/byteorder.h>
23 #include <linux/swab.h>
24 #include "r592.h"
25
26 static bool r592_enable_dma = 1;
27 static int debug;
28
29 static const char *tpc_names[] = {
30 "MS_TPC_READ_MG_STATUS",
31 "MS_TPC_READ_LONG_DATA",
32 "MS_TPC_READ_SHORT_DATA",
33 "MS_TPC_READ_REG",
34 "MS_TPC_READ_QUAD_DATA",
35 "INVALID",
36 "MS_TPC_GET_INT",
37 "MS_TPC_SET_RW_REG_ADRS",
38 "MS_TPC_EX_SET_CMD",
39 "MS_TPC_WRITE_QUAD_DATA",
40 "MS_TPC_WRITE_REG",
41 "MS_TPC_WRITE_SHORT_DATA",
42 "MS_TPC_WRITE_LONG_DATA",
43 "MS_TPC_SET_CMD",
44 };
45
46 /**
47 * memstick_debug_get_tpc_name - debug helper that returns string for
48 * a TPC number
49 */
50 const char *memstick_debug_get_tpc_name(int tpc)
51 {
52 return tpc_names[tpc-1];
53 }
54 EXPORT_SYMBOL(memstick_debug_get_tpc_name);
55
56
57 /* Read a register*/
58 static inline u32 r592_read_reg(struct r592_device *dev, int address)
59 {
60 u32 value = readl(dev->mmio + address);
61 dbg_reg("reg #%02d == 0x%08x", address, value);
62 return value;
63 }
64
65 /* Write a register */
66 static inline void r592_write_reg(struct r592_device *dev,
67 int address, u32 value)
68 {
69 dbg_reg("reg #%02d <- 0x%08x", address, value);
70 writel(value, dev->mmio + address);
71 }
72
73 /* Reads a big endian DWORD register */
74 static inline u32 r592_read_reg_raw_be(struct r592_device *dev, int address)
75 {
76 u32 value = __raw_readl(dev->mmio + address);
77 dbg_reg("reg #%02d == 0x%08x", address, value);
78 return be32_to_cpu(value);
79 }
80
81 /* Writes a big endian DWORD register */
82 static inline void r592_write_reg_raw_be(struct r592_device *dev,
83 int address, u32 value)
84 {
85 dbg_reg("reg #%02d <- 0x%08x", address, value);
86 __raw_writel(cpu_to_be32(value), dev->mmio + address);
87 }
88
89 /* Set specific bits in a register (little endian) */
90 static inline void r592_set_reg_mask(struct r592_device *dev,
91 int address, u32 mask)
92 {
93 u32 reg = readl(dev->mmio + address);
94 dbg_reg("reg #%02d |= 0x%08x (old =0x%08x)", address, mask, reg);
95 writel(reg | mask , dev->mmio + address);
96 }
97
98 /* Clear specific bits in a register (little endian) */
99 static inline void r592_clear_reg_mask(struct r592_device *dev,
100 int address, u32 mask)
101 {
102 u32 reg = readl(dev->mmio + address);
103 dbg_reg("reg #%02d &= 0x%08x (old = 0x%08x, mask = 0x%08x)",
104 address, ~mask, reg, mask);
105 writel(reg & ~mask, dev->mmio + address);
106 }
107
108
109 /* Wait for status bits while checking for errors */
110 static int r592_wait_status(struct r592_device *dev, u32 mask, u32 wanted_mask)
111 {
112 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
113 u32 reg = r592_read_reg(dev, R592_STATUS);
114
115 if ((reg & mask) == wanted_mask)
116 return 0;
117
118 while (time_before(jiffies, timeout)) {
119
120 reg = r592_read_reg(dev, R592_STATUS);
121
122 if ((reg & mask) == wanted_mask)
123 return 0;
124
125 if (reg & (R592_STATUS_SEND_ERR | R592_STATUS_RECV_ERR))
126 return -EIO;
127
128 cpu_relax();
129 }
130 return -ETIME;
131 }
132
133
134 /* Enable/disable device */
135 static int r592_enable_device(struct r592_device *dev, bool enable)
136 {
137 dbg("%sabling the device", enable ? "en" : "dis");
138
139 if (enable) {
140
141 /* Power up the card */
142 r592_write_reg(dev, R592_POWER, R592_POWER_0 | R592_POWER_1);
143
144 /* Perform a reset */
145 r592_set_reg_mask(dev, R592_IO, R592_IO_RESET);
146
147 msleep(100);
148 } else
149 /* Power down the card */
150 r592_write_reg(dev, R592_POWER, 0);
151
152 return 0;
153 }
154
155 /* Set serial/parallel mode */
156 static int r592_set_mode(struct r592_device *dev, bool parallel_mode)
157 {
158 if (!parallel_mode) {
159 dbg("switching to serial mode");
160
161 /* Set serial mode */
162 r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_SERIAL);
163
164 r592_clear_reg_mask(dev, R592_POWER, R592_POWER_20);
165
166 } else {
167 dbg("switching to parallel mode");
168
169 /* This setting should be set _before_ switch TPC */
170 r592_set_reg_mask(dev, R592_POWER, R592_POWER_20);
171
172 r592_clear_reg_mask(dev, R592_IO,
173 R592_IO_SERIAL1 | R592_IO_SERIAL2);
174
175 /* Set the parallel mode now */
176 r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_PARALLEL);
177 }
178
179 dev->parallel_mode = parallel_mode;
180 return 0;
181 }
182
183 /* Perform a controller reset without powering down the card */
184 static void r592_host_reset(struct r592_device *dev)
185 {
186 r592_set_reg_mask(dev, R592_IO, R592_IO_RESET);
187 msleep(100);
188 r592_set_mode(dev, dev->parallel_mode);
189 }
190
191 /* Disable all hardware interrupts */
192 static void r592_clear_interrupts(struct r592_device *dev)
193 {
194 /* Disable & ACK all interrupts */
195 r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_ACK_MASK);
196 r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_EN_MASK);
197 }
198
199 /* Tests if there is an CRC error */
200 static int r592_test_io_error(struct r592_device *dev)
201 {
202 if (!(r592_read_reg(dev, R592_STATUS) &
203 (R592_STATUS_SEND_ERR | R592_STATUS_RECV_ERR)))
204 return 0;
205
206 return -EIO;
207 }
208
209 /* Ensure that FIFO is ready for use */
210 static int r592_test_fifo_empty(struct r592_device *dev)
211 {
212 if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY)
213 return 0;
214
215 dbg("FIFO not ready, trying to reset the device");
216 r592_host_reset(dev);
217
218 if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY)
219 return 0;
220
221 message("FIFO still not ready, giving up");
222 return -EIO;
223 }
224
225 /* Activates the DMA transfer from to FIFO */
226 static void r592_start_dma(struct r592_device *dev, bool is_write)
227 {
228 unsigned long flags;
229 u32 reg;
230 spin_lock_irqsave(&dev->irq_lock, flags);
231
232 /* Ack interrupts (just in case) + enable them */
233 r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK);
234 r592_set_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK);
235
236 /* Set DMA address */
237 r592_write_reg(dev, R592_FIFO_DMA, sg_dma_address(&dev->req->sg));
238
239 /* Enable the DMA */
240 reg = r592_read_reg(dev, R592_FIFO_DMA_SETTINGS);
241 reg |= R592_FIFO_DMA_SETTINGS_EN;
242
243 if (!is_write)
244 reg |= R592_FIFO_DMA_SETTINGS_DIR;
245 else
246 reg &= ~R592_FIFO_DMA_SETTINGS_DIR;
247 r592_write_reg(dev, R592_FIFO_DMA_SETTINGS, reg);
248
249 spin_unlock_irqrestore(&dev->irq_lock, flags);
250 }
251
252 /* Cleanups DMA related settings */
253 static void r592_stop_dma(struct r592_device *dev, int error)
254 {
255 r592_clear_reg_mask(dev, R592_FIFO_DMA_SETTINGS,
256 R592_FIFO_DMA_SETTINGS_EN);
257
258 /* This is only a precation */
259 r592_write_reg(dev, R592_FIFO_DMA,
260 dev->dummy_dma_page_physical_address);
261
262 r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK);
263 r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK);
264 dev->dma_error = error;
265 }
266
267 /* Test if hardware supports DMA */
268 static void r592_check_dma(struct r592_device *dev)
269 {
270 dev->dma_capable = r592_enable_dma &&
271 (r592_read_reg(dev, R592_FIFO_DMA_SETTINGS) &
272 R592_FIFO_DMA_SETTINGS_CAP);
273 }
274
275 /* Transfers fifo contents in/out using DMA */
276 static int r592_transfer_fifo_dma(struct r592_device *dev)
277 {
278 int len, sg_count;
279 bool is_write;
280
281 if (!dev->dma_capable || !dev->req->long_data)
282 return -EINVAL;
283
284 len = dev->req->sg.length;
285 is_write = dev->req->data_dir == WRITE;
286
287 if (len != R592_LFIFO_SIZE)
288 return -EINVAL;
289
290 dbg_verbose("doing dma transfer");
291
292 dev->dma_error = 0;
293 INIT_COMPLETION(dev->dma_done);
294
295 /* TODO: hidden assumption about nenth beeing always 1 */
296 sg_count = dma_map_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ?
297 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
298
299 if (sg_count != 1 ||
300 (sg_dma_len(&dev->req->sg) < dev->req->sg.length)) {
301 message("problem in dma_map_sg");
302 return -EIO;
303 }
304
305 r592_start_dma(dev, is_write);
306
307 /* Wait for DMA completion */
308 if (!wait_for_completion_timeout(
309 &dev->dma_done, msecs_to_jiffies(1000))) {
310 message("DMA timeout");
311 r592_stop_dma(dev, -ETIMEDOUT);
312 }
313
314 dma_unmap_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ?
315 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
316
317
318 return dev->dma_error;
319 }
320
321 /*
322 * Writes the FIFO in 4 byte chunks.
323 * If length isn't 4 byte aligned, rest of the data if put to a fifo
324 * to be written later
325 * Use r592_flush_fifo_write to flush that fifo when writing for the
326 * last time
327 */
328 static void r592_write_fifo_pio(struct r592_device *dev,
329 unsigned char *buffer, int len)
330 {
331 /* flush spill from former write */
332 if (!kfifo_is_empty(&dev->pio_fifo)) {
333
334 u8 tmp[4] = {0};
335 int copy_len = kfifo_in(&dev->pio_fifo, buffer, len);
336
337 if (!kfifo_is_full(&dev->pio_fifo))
338 return;
339 len -= copy_len;
340 buffer += copy_len;
341
342 copy_len = kfifo_out(&dev->pio_fifo, tmp, 4);
343 WARN_ON(copy_len != 4);
344 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)tmp);
345 }
346
347 WARN_ON(!kfifo_is_empty(&dev->pio_fifo));
348
349 /* write full dwords */
350 while (len >= 4) {
351 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)buffer);
352 buffer += 4;
353 len -= 4;
354 }
355
356 /* put remaining bytes to the spill */
357 if (len)
358 kfifo_in(&dev->pio_fifo, buffer, len);
359 }
360
361 /* Flushes the temporary FIFO used to make aligned DWORD writes */
362 static void r592_flush_fifo_write(struct r592_device *dev)
363 {
364 u8 buffer[4] = { 0 };
365 int len;
366
367 if (kfifo_is_empty(&dev->pio_fifo))
368 return;
369
370 len = kfifo_out(&dev->pio_fifo, buffer, 4);
371 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)buffer);
372 }
373
374 /*
375 * Read a fifo in 4 bytes chunks.
376 * If input doesn't fit the buffer, it places bytes of last dword in spill
377 * buffer, so that they don't get lost on last read, just throw these away.
378 */
379 static void r592_read_fifo_pio(struct r592_device *dev,
380 unsigned char *buffer, int len)
381 {
382 u8 tmp[4];
383
384 /* Read from last spill */
385 if (!kfifo_is_empty(&dev->pio_fifo)) {
386 int bytes_copied =
387 kfifo_out(&dev->pio_fifo, buffer, min(4, len));
388 buffer += bytes_copied;
389 len -= bytes_copied;
390
391 if (!kfifo_is_empty(&dev->pio_fifo))
392 return;
393 }
394
395 /* Reads dwords from FIFO */
396 while (len >= 4) {
397 *(u32 *)buffer = r592_read_reg_raw_be(dev, R592_FIFO_PIO);
398 buffer += 4;
399 len -= 4;
400 }
401
402 if (len) {
403 *(u32 *)tmp = r592_read_reg_raw_be(dev, R592_FIFO_PIO);
404 kfifo_in(&dev->pio_fifo, tmp, 4);
405 len -= kfifo_out(&dev->pio_fifo, buffer, len);
406 }
407
408 WARN_ON(len);
409 return;
410 }
411
412 /* Transfers actual data using PIO. */
413 static int r592_transfer_fifo_pio(struct r592_device *dev)
414 {
415 unsigned long flags;
416
417 bool is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS;
418 struct sg_mapping_iter miter;
419
420 kfifo_reset(&dev->pio_fifo);
421
422 if (!dev->req->long_data) {
423 if (is_write) {
424 r592_write_fifo_pio(dev, dev->req->data,
425 dev->req->data_len);
426 r592_flush_fifo_write(dev);
427 } else
428 r592_read_fifo_pio(dev, dev->req->data,
429 dev->req->data_len);
430 return 0;
431 }
432
433 local_irq_save(flags);
434 sg_miter_start(&miter, &dev->req->sg, 1, SG_MITER_ATOMIC |
435 (is_write ? SG_MITER_FROM_SG : SG_MITER_TO_SG));
436
437 /* Do the transfer fifo<->memory*/
438 while (sg_miter_next(&miter))
439 if (is_write)
440 r592_write_fifo_pio(dev, miter.addr, miter.length);
441 else
442 r592_read_fifo_pio(dev, miter.addr, miter.length);
443
444
445 /* Write last few non aligned bytes*/
446 if (is_write)
447 r592_flush_fifo_write(dev);
448
449 sg_miter_stop(&miter);
450 local_irq_restore(flags);
451 return 0;
452 }
453
454 /* Executes one TPC (data is read/written from small or large fifo) */
455 static void r592_execute_tpc(struct r592_device *dev)
456 {
457 bool is_write;
458 int len, error;
459 u32 status, reg;
460
461 if (!dev->req) {
462 message("BUG: tpc execution without request!");
463 return;
464 }
465
466 is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS;
467 len = dev->req->long_data ?
468 dev->req->sg.length : dev->req->data_len;
469
470 /* Ensure that FIFO can hold the input data */
471 if (len > R592_LFIFO_SIZE) {
472 message("IO: hardware doesn't support TPCs longer that 512");
473 error = -ENOSYS;
474 goto out;
475 }
476
477 if (!(r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_PRSNT)) {
478 dbg("IO: refusing to send TPC because card is absent");
479 error = -ENODEV;
480 goto out;
481 }
482
483 dbg("IO: executing %s LEN=%d",
484 memstick_debug_get_tpc_name(dev->req->tpc), len);
485
486 /* Set IO direction */
487 if (is_write)
488 r592_set_reg_mask(dev, R592_IO, R592_IO_DIRECTION);
489 else
490 r592_clear_reg_mask(dev, R592_IO, R592_IO_DIRECTION);
491
492
493 error = r592_test_fifo_empty(dev);
494 if (error)
495 goto out;
496
497 /* Transfer write data */
498 if (is_write) {
499 error = r592_transfer_fifo_dma(dev);
500 if (error == -EINVAL)
501 error = r592_transfer_fifo_pio(dev);
502 }
503
504 if (error)
505 goto out;
506
507 /* Trigger the TPC */
508 reg = (len << R592_TPC_EXEC_LEN_SHIFT) |
509 (dev->req->tpc << R592_TPC_EXEC_TPC_SHIFT) |
510 R592_TPC_EXEC_BIG_FIFO;
511
512 r592_write_reg(dev, R592_TPC_EXEC, reg);
513
514 /* Wait for TPC completion */
515 status = R592_STATUS_RDY;
516 if (dev->req->need_card_int)
517 status |= R592_STATUS_CED;
518
519 error = r592_wait_status(dev, status, status);
520 if (error) {
521 message("card didn't respond");
522 goto out;
523 }
524
525 /* Test IO errors */
526 error = r592_test_io_error(dev);
527 if (error) {
528 dbg("IO error");
529 goto out;
530 }
531
532 /* Read data from FIFO */
533 if (!is_write) {
534 error = r592_transfer_fifo_dma(dev);
535 if (error == -EINVAL)
536 error = r592_transfer_fifo_pio(dev);
537 }
538
539 /* read INT reg. This can be shortened with shifts, but that way
540 its more readable */
541 if (dev->parallel_mode && dev->req->need_card_int) {
542
543 dev->req->int_reg = 0;
544 status = r592_read_reg(dev, R592_STATUS);
545
546 if (status & R592_STATUS_P_CMDNACK)
547 dev->req->int_reg |= MEMSTICK_INT_CMDNAK;
548 if (status & R592_STATUS_P_BREQ)
549 dev->req->int_reg |= MEMSTICK_INT_BREQ;
550 if (status & R592_STATUS_P_INTERR)
551 dev->req->int_reg |= MEMSTICK_INT_ERR;
552 if (status & R592_STATUS_P_CED)
553 dev->req->int_reg |= MEMSTICK_INT_CED;
554 }
555
556 if (error)
557 dbg("FIFO read error");
558 out:
559 dev->req->error = error;
560 r592_clear_reg_mask(dev, R592_REG_MSC, R592_REG_MSC_LED);
561 return;
562 }
563
564 /* Main request processing thread */
565 static int r592_process_thread(void *data)
566 {
567 int error;
568 struct r592_device *dev = (struct r592_device *)data;
569 unsigned long flags;
570
571 while (!kthread_should_stop()) {
572 spin_lock_irqsave(&dev->io_thread_lock, flags);
573 set_current_state(TASK_INTERRUPTIBLE);
574 error = memstick_next_req(dev->host, &dev->req);
575 spin_unlock_irqrestore(&dev->io_thread_lock, flags);
576
577 if (error) {
578 if (error == -ENXIO || error == -EAGAIN) {
579 dbg_verbose("IO: done IO, sleeping");
580 } else {
581 dbg("IO: unknown error from "
582 "memstick_next_req %d", error);
583 }
584
585 if (kthread_should_stop())
586 set_current_state(TASK_RUNNING);
587
588 schedule();
589 } else {
590 set_current_state(TASK_RUNNING);
591 r592_execute_tpc(dev);
592 }
593 }
594 return 0;
595 }
596
597 /* Reprogram chip to detect change in card state */
598 /* eg, if card is detected, arm it to detect removal, and vice versa */
599 static void r592_update_card_detect(struct r592_device *dev)
600 {
601 u32 reg = r592_read_reg(dev, R592_REG_MSC);
602 bool card_detected = reg & R592_REG_MSC_PRSNT;
603
604 dbg("update card detect. card state: %s", card_detected ?
605 "present" : "absent");
606
607 reg &= ~((R592_REG_MSC_IRQ_REMOVE | R592_REG_MSC_IRQ_INSERT) << 16);
608
609 if (card_detected)
610 reg |= (R592_REG_MSC_IRQ_REMOVE << 16);
611 else
612 reg |= (R592_REG_MSC_IRQ_INSERT << 16);
613
614 r592_write_reg(dev, R592_REG_MSC, reg);
615 }
616
617 /* Timer routine that fires 1 second after last card detection event, */
618 static void r592_detect_timer(long unsigned int data)
619 {
620 struct r592_device *dev = (struct r592_device *)data;
621 r592_update_card_detect(dev);
622 memstick_detect_change(dev->host);
623 }
624
625 /* Interrupt handler */
626 static irqreturn_t r592_irq(int irq, void *data)
627 {
628 struct r592_device *dev = (struct r592_device *)data;
629 irqreturn_t ret = IRQ_NONE;
630 u32 reg;
631 u16 irq_enable, irq_status;
632 unsigned long flags;
633 int error;
634
635 spin_lock_irqsave(&dev->irq_lock, flags);
636
637 reg = r592_read_reg(dev, R592_REG_MSC);
638 irq_enable = reg >> 16;
639 irq_status = reg & 0xFFFF;
640
641 /* Ack the interrupts */
642 reg &= ~irq_status;
643 r592_write_reg(dev, R592_REG_MSC, reg);
644
645 /* Get the IRQ status minus bits that aren't enabled */
646 irq_status &= (irq_enable);
647
648 /* Due to limitation of memstick core, we don't look at bits that
649 indicate that card was removed/inserted and/or present */
650 if (irq_status & (R592_REG_MSC_IRQ_INSERT | R592_REG_MSC_IRQ_REMOVE)) {
651
652 bool card_was_added = irq_status & R592_REG_MSC_IRQ_INSERT;
653 ret = IRQ_HANDLED;
654
655 message("IRQ: card %s", card_was_added ? "added" : "removed");
656
657 mod_timer(&dev->detect_timer,
658 jiffies + msecs_to_jiffies(card_was_added ? 500 : 50));
659 }
660
661 if (irq_status &
662 (R592_REG_MSC_FIFO_DMA_DONE | R592_REG_MSC_FIFO_DMA_ERR)) {
663 ret = IRQ_HANDLED;
664
665 if (irq_status & R592_REG_MSC_FIFO_DMA_ERR) {
666 message("IRQ: DMA error");
667 error = -EIO;
668 } else {
669 dbg_verbose("IRQ: dma done");
670 error = 0;
671 }
672
673 r592_stop_dma(dev, error);
674 complete(&dev->dma_done);
675 }
676
677 spin_unlock_irqrestore(&dev->irq_lock, flags);
678 return ret;
679 }
680
681 /* External inteface: set settings */
682 static int r592_set_param(struct memstick_host *host,
683 enum memstick_param param, int value)
684 {
685 struct r592_device *dev = memstick_priv(host);
686
687 switch (param) {
688 case MEMSTICK_POWER:
689 switch (value) {
690 case MEMSTICK_POWER_ON:
691 return r592_enable_device(dev, true);
692 case MEMSTICK_POWER_OFF:
693 return r592_enable_device(dev, false);
694 default:
695 return -EINVAL;
696 }
697 case MEMSTICK_INTERFACE:
698 switch (value) {
699 case MEMSTICK_SERIAL:
700 return r592_set_mode(dev, 0);
701 case MEMSTICK_PAR4:
702 return r592_set_mode(dev, 1);
703 default:
704 return -EINVAL;
705 }
706 default:
707 return -EINVAL;
708 }
709 }
710
711 /* External interface: submit requests */
712 static void r592_submit_req(struct memstick_host *host)
713 {
714 struct r592_device *dev = memstick_priv(host);
715 unsigned long flags;
716
717 if (dev->req)
718 return;
719
720 spin_lock_irqsave(&dev->io_thread_lock, flags);
721 if (wake_up_process(dev->io_thread))
722 dbg_verbose("IO thread woken to process requests");
723 spin_unlock_irqrestore(&dev->io_thread_lock, flags);
724 }
725
726 static const struct pci_device_id r592_pci_id_tbl[] = {
727
728 { PCI_VDEVICE(RICOH, 0x0592), },
729 { },
730 };
731
732 /* Main entry */
733 static int r592_probe(struct pci_dev *pdev, const struct pci_device_id *id)
734 {
735 int error = -ENOMEM;
736 struct memstick_host *host;
737 struct r592_device *dev;
738
739 /* Allocate memory */
740 host = memstick_alloc_host(sizeof(struct r592_device), &pdev->dev);
741 if (!host)
742 goto error1;
743
744 dev = memstick_priv(host);
745 dev->host = host;
746 dev->pci_dev = pdev;
747 pci_set_drvdata(pdev, dev);
748
749 /* pci initialization */
750 error = pci_enable_device(pdev);
751 if (error)
752 goto error2;
753
754 pci_set_master(pdev);
755 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
756 if (error)
757 goto error3;
758
759 error = pci_request_regions(pdev, DRV_NAME);
760 if (error)
761 goto error3;
762
763 dev->mmio = pci_ioremap_bar(pdev, 0);
764 if (!dev->mmio)
765 goto error4;
766
767 dev->irq = pdev->irq;
768 spin_lock_init(&dev->irq_lock);
769 spin_lock_init(&dev->io_thread_lock);
770 init_completion(&dev->dma_done);
771 INIT_KFIFO(dev->pio_fifo);
772 setup_timer(&dev->detect_timer,
773 r592_detect_timer, (long unsigned int)dev);
774
775 /* Host initialization */
776 host->caps = MEMSTICK_CAP_PAR4;
777 host->request = r592_submit_req;
778 host->set_param = r592_set_param;
779 r592_check_dma(dev);
780
781 dev->io_thread = kthread_run(r592_process_thread, dev, "r592_io");
782 if (IS_ERR(dev->io_thread)) {
783 error = PTR_ERR(dev->io_thread);
784 goto error5;
785 }
786
787 /* This is just a precation, so don't fail */
788 dev->dummy_dma_page = pci_alloc_consistent(pdev, PAGE_SIZE,
789 &dev->dummy_dma_page_physical_address);
790 r592_stop_dma(dev , 0);
791
792 if (request_irq(dev->irq, &r592_irq, IRQF_SHARED,
793 DRV_NAME, dev))
794 goto error6;
795
796 r592_update_card_detect(dev);
797 if (memstick_add_host(host))
798 goto error7;
799
800 message("driver successfully loaded");
801 return 0;
802 error7:
803 free_irq(dev->irq, dev);
804 error6:
805 if (dev->dummy_dma_page)
806 pci_free_consistent(pdev, PAGE_SIZE, dev->dummy_dma_page,
807 dev->dummy_dma_page_physical_address);
808
809 kthread_stop(dev->io_thread);
810 error5:
811 iounmap(dev->mmio);
812 error4:
813 pci_release_regions(pdev);
814 error3:
815 pci_disable_device(pdev);
816 error2:
817 memstick_free_host(host);
818 error1:
819 return error;
820 }
821
822 static void r592_remove(struct pci_dev *pdev)
823 {
824 int error = 0;
825 struct r592_device *dev = pci_get_drvdata(pdev);
826
827 /* Stop the processing thread.
828 That ensures that we won't take any more requests */
829 kthread_stop(dev->io_thread);
830
831 r592_enable_device(dev, false);
832
833 while (!error && dev->req) {
834 dev->req->error = -ETIME;
835 error = memstick_next_req(dev->host, &dev->req);
836 }
837 memstick_remove_host(dev->host);
838
839 free_irq(dev->irq, dev);
840 iounmap(dev->mmio);
841 pci_release_regions(pdev);
842 pci_disable_device(pdev);
843 memstick_free_host(dev->host);
844
845 if (dev->dummy_dma_page)
846 pci_free_consistent(pdev, PAGE_SIZE, dev->dummy_dma_page,
847 dev->dummy_dma_page_physical_address);
848 }
849
850 #ifdef CONFIG_PM_SLEEP
851 static int r592_suspend(struct device *core_dev)
852 {
853 struct pci_dev *pdev = to_pci_dev(core_dev);
854 struct r592_device *dev = pci_get_drvdata(pdev);
855
856 r592_clear_interrupts(dev);
857 memstick_suspend_host(dev->host);
858 del_timer_sync(&dev->detect_timer);
859 return 0;
860 }
861
862 static int r592_resume(struct device *core_dev)
863 {
864 struct pci_dev *pdev = to_pci_dev(core_dev);
865 struct r592_device *dev = pci_get_drvdata(pdev);
866
867 r592_clear_interrupts(dev);
868 r592_enable_device(dev, false);
869 memstick_resume_host(dev->host);
870 r592_update_card_detect(dev);
871 return 0;
872 }
873 #endif
874
875 static SIMPLE_DEV_PM_OPS(r592_pm_ops, r592_suspend, r592_resume);
876
877 MODULE_DEVICE_TABLE(pci, r592_pci_id_tbl);
878
879 static struct pci_driver r852_pci_driver = {
880 .name = DRV_NAME,
881 .id_table = r592_pci_id_tbl,
882 .probe = r592_probe,
883 .remove = r592_remove,
884 .driver.pm = &r592_pm_ops,
885 };
886
887 module_pci_driver(r852_pci_driver);
888
889 module_param_named(enable_dma, r592_enable_dma, bool, S_IRUGO);
890 MODULE_PARM_DESC(enable_dma, "Enable usage of the DMA (default)");
891 module_param(debug, int, S_IRUGO | S_IWUSR);
892 MODULE_PARM_DESC(debug, "Debug level (0-3)");
893
894 MODULE_LICENSE("GPL");
895 MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>");
896 MODULE_DESCRIPTION("Ricoh R5C592 Memstick/Memstick PRO card reader driver");
Linux with added FPC-III support