mfd: wm8350-i2c: Make sure the i2c regmap functions are compiled
[linux/fpc-iii.git] / drivers / net / can / janz-ican3.c
blobdb2ff03403884b77acfbdd3e683aefed9ae81f6e
1 /*
2 * Janz MODULbus VMOD-ICAN3 CAN Interface Driver
4 * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/interrupt.h>
16 #include <linux/delay.h>
17 #include <linux/platform_device.h>
19 #include <linux/netdevice.h>
20 #include <linux/can.h>
21 #include <linux/can/dev.h>
22 #include <linux/can/skb.h>
23 #include <linux/can/error.h>
25 #include <linux/mfd/janz.h>
26 #include <asm/io.h>
28 /* the DPM has 64k of memory, organized into 256x 256 byte pages */
29 #define DPM_NUM_PAGES 256
30 #define DPM_PAGE_SIZE 256
31 #define DPM_PAGE_ADDR(p) ((p) * DPM_PAGE_SIZE)
33 /* JANZ ICAN3 "old-style" host interface queue page numbers */
34 #define QUEUE_OLD_CONTROL 0
35 #define QUEUE_OLD_RB0 1
36 #define QUEUE_OLD_RB1 2
37 #define QUEUE_OLD_WB0 3
38 #define QUEUE_OLD_WB1 4
40 /* Janz ICAN3 "old-style" host interface control registers */
41 #define MSYNC_PEER 0x00 /* ICAN only */
42 #define MSYNC_LOCL 0x01 /* host only */
43 #define TARGET_RUNNING 0x02
45 #define MSYNC_RB0 0x01
46 #define MSYNC_RB1 0x02
47 #define MSYNC_RBLW 0x04
48 #define MSYNC_RB_MASK (MSYNC_RB0 | MSYNC_RB1)
50 #define MSYNC_WB0 0x10
51 #define MSYNC_WB1 0x20
52 #define MSYNC_WBLW 0x40
53 #define MSYNC_WB_MASK (MSYNC_WB0 | MSYNC_WB1)
55 /* Janz ICAN3 "new-style" host interface queue page numbers */
56 #define QUEUE_TOHOST 5
57 #define QUEUE_FROMHOST_MID 6
58 #define QUEUE_FROMHOST_HIGH 7
59 #define QUEUE_FROMHOST_LOW 8
61 /* The first free page in the DPM is #9 */
62 #define DPM_FREE_START 9
64 /* Janz ICAN3 "new-style" and "fast" host interface descriptor flags */
65 #define DESC_VALID 0x80
66 #define DESC_WRAP 0x40
67 #define DESC_INTERRUPT 0x20
68 #define DESC_IVALID 0x10
69 #define DESC_LEN(len) (len)
71 /* Janz ICAN3 Firmware Messages */
72 #define MSG_CONNECTI 0x02
73 #define MSG_DISCONNECT 0x03
74 #define MSG_IDVERS 0x04
75 #define MSG_MSGLOST 0x05
76 #define MSG_NEWHOSTIF 0x08
77 #define MSG_INQUIRY 0x0a
78 #define MSG_SETAFILMASK 0x10
79 #define MSG_INITFDPMQUEUE 0x11
80 #define MSG_HWCONF 0x12
81 #define MSG_FMSGLOST 0x15
82 #define MSG_CEVTIND 0x37
83 #define MSG_CBTRREQ 0x41
84 #define MSG_COFFREQ 0x42
85 #define MSG_CONREQ 0x43
86 #define MSG_CCONFREQ 0x47
89 * Janz ICAN3 CAN Inquiry Message Types
91 * NOTE: there appears to be a firmware bug here. You must send
92 * NOTE: INQUIRY_STATUS and expect to receive an INQUIRY_EXTENDED
93 * NOTE: response. The controller never responds to a message with
94 * NOTE: the INQUIRY_EXTENDED subspec :(
96 #define INQUIRY_STATUS 0x00
97 #define INQUIRY_TERMINATION 0x01
98 #define INQUIRY_EXTENDED 0x04
100 /* Janz ICAN3 CAN Set Acceptance Filter Mask Message Types */
101 #define SETAFILMASK_REJECT 0x00
102 #define SETAFILMASK_FASTIF 0x02
104 /* Janz ICAN3 CAN Hardware Configuration Message Types */
105 #define HWCONF_TERMINATE_ON 0x01
106 #define HWCONF_TERMINATE_OFF 0x00
108 /* Janz ICAN3 CAN Event Indication Message Types */
109 #define CEVTIND_EI 0x01
110 #define CEVTIND_DOI 0x02
111 #define CEVTIND_LOST 0x04
112 #define CEVTIND_FULL 0x08
113 #define CEVTIND_BEI 0x10
115 #define CEVTIND_CHIP_SJA1000 0x02
117 #define ICAN3_BUSERR_QUOTA_MAX 255
119 /* Janz ICAN3 CAN Frame Conversion */
120 #define ICAN3_SNGL 0x02
121 #define ICAN3_ECHO 0x10
122 #define ICAN3_EFF_RTR 0x40
123 #define ICAN3_SFF_RTR 0x10
124 #define ICAN3_EFF 0x80
126 #define ICAN3_CAN_TYPE_MASK 0x0f
127 #define ICAN3_CAN_TYPE_SFF 0x00
128 #define ICAN3_CAN_TYPE_EFF 0x01
130 #define ICAN3_CAN_DLC_MASK 0x0f
133 * SJA1000 Status and Error Register Definitions
135 * Copied from drivers/net/can/sja1000/sja1000.h
138 /* status register content */
139 #define SR_BS 0x80
140 #define SR_ES 0x40
141 #define SR_TS 0x20
142 #define SR_RS 0x10
143 #define SR_TCS 0x08
144 #define SR_TBS 0x04
145 #define SR_DOS 0x02
146 #define SR_RBS 0x01
148 #define SR_CRIT (SR_BS|SR_ES)
150 /* ECC register */
151 #define ECC_SEG 0x1F
152 #define ECC_DIR 0x20
153 #define ECC_ERR 6
154 #define ECC_BIT 0x00
155 #define ECC_FORM 0x40
156 #define ECC_STUFF 0x80
157 #define ECC_MASK 0xc0
159 /* Number of buffers for use in the "new-style" host interface */
160 #define ICAN3_NEW_BUFFERS 16
162 /* Number of buffers for use in the "fast" host interface */
163 #define ICAN3_TX_BUFFERS 512
164 #define ICAN3_RX_BUFFERS 1024
166 /* SJA1000 Clock Input */
167 #define ICAN3_CAN_CLOCK 8000000
169 /* Driver Name */
170 #define DRV_NAME "janz-ican3"
172 /* DPM Control Registers -- starts at offset 0x100 in the MODULbus registers */
173 struct ican3_dpm_control {
174 /* window address register */
175 u8 window_address;
176 u8 unused1;
179 * Read access: clear interrupt from microcontroller
180 * Write access: send interrupt to microcontroller
182 u8 interrupt;
183 u8 unused2;
185 /* write-only: reset all hardware on the module */
186 u8 hwreset;
187 u8 unused3;
189 /* write-only: generate an interrupt to the TPU */
190 u8 tpuinterrupt;
193 struct ican3_dev {
195 /* must be the first member */
196 struct can_priv can;
198 /* CAN network device */
199 struct net_device *ndev;
200 struct napi_struct napi;
202 /* Device for printing */
203 struct device *dev;
205 /* module number */
206 unsigned int num;
208 /* base address of registers and IRQ */
209 struct janz_cmodio_onboard_regs __iomem *ctrl;
210 struct ican3_dpm_control __iomem *dpmctrl;
211 void __iomem *dpm;
212 int irq;
214 /* CAN bus termination status */
215 struct completion termination_comp;
216 bool termination_enabled;
218 /* CAN bus error status registers */
219 struct completion buserror_comp;
220 struct can_berr_counter bec;
222 /* old and new style host interface */
223 unsigned int iftype;
225 /* queue for echo packets */
226 struct sk_buff_head echoq;
229 * Any function which changes the current DPM page must hold this
230 * lock while it is performing data accesses. This ensures that the
231 * function will not be preempted and end up reading data from a
232 * different DPM page than it expects.
234 spinlock_t lock;
236 /* new host interface */
237 unsigned int rx_int;
238 unsigned int rx_num;
239 unsigned int tx_num;
241 /* fast host interface */
242 unsigned int fastrx_start;
243 unsigned int fastrx_num;
244 unsigned int fasttx_start;
245 unsigned int fasttx_num;
247 /* first free DPM page */
248 unsigned int free_page;
251 struct ican3_msg {
252 u8 control;
253 u8 spec;
254 __le16 len;
255 u8 data[252];
258 struct ican3_new_desc {
259 u8 control;
260 u8 pointer;
263 struct ican3_fast_desc {
264 u8 control;
265 u8 command;
266 u8 data[14];
269 /* write to the window basic address register */
270 static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page)
272 BUG_ON(page >= DPM_NUM_PAGES);
273 iowrite8(page, &mod->dpmctrl->window_address);
277 * ICAN3 "old-style" host interface
281 * Receive a message from the ICAN3 "old-style" firmware interface
283 * LOCKING: must hold mod->lock
285 * returns 0 on success, -ENOMEM when no message exists
287 static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
289 unsigned int mbox, mbox_page;
290 u8 locl, peer, xord;
292 /* get the MSYNC registers */
293 ican3_set_page(mod, QUEUE_OLD_CONTROL);
294 peer = ioread8(mod->dpm + MSYNC_PEER);
295 locl = ioread8(mod->dpm + MSYNC_LOCL);
296 xord = locl ^ peer;
298 if ((xord & MSYNC_RB_MASK) == 0x00) {
299 dev_dbg(mod->dev, "no mbox for reading\n");
300 return -ENOMEM;
303 /* find the first free mbox to read */
304 if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK)
305 mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1;
306 else
307 mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1;
309 /* copy the message */
310 mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1;
311 ican3_set_page(mod, mbox_page);
312 memcpy_fromio(msg, mod->dpm, sizeof(*msg));
315 * notify the firmware that the read buffer is available
316 * for it to fill again
318 locl ^= mbox;
320 ican3_set_page(mod, QUEUE_OLD_CONTROL);
321 iowrite8(locl, mod->dpm + MSYNC_LOCL);
322 return 0;
326 * Send a message through the "old-style" firmware interface
328 * LOCKING: must hold mod->lock
330 * returns 0 on success, -ENOMEM when no free space exists
332 static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
334 unsigned int mbox, mbox_page;
335 u8 locl, peer, xord;
337 /* get the MSYNC registers */
338 ican3_set_page(mod, QUEUE_OLD_CONTROL);
339 peer = ioread8(mod->dpm + MSYNC_PEER);
340 locl = ioread8(mod->dpm + MSYNC_LOCL);
341 xord = locl ^ peer;
343 if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) {
344 dev_err(mod->dev, "no mbox for writing\n");
345 return -ENOMEM;
348 /* calculate a free mbox to use */
349 mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0;
351 /* copy the message to the DPM */
352 mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1;
353 ican3_set_page(mod, mbox_page);
354 memcpy_toio(mod->dpm, msg, sizeof(*msg));
356 locl ^= mbox;
357 if (mbox == MSYNC_WB1)
358 locl |= MSYNC_WBLW;
360 ican3_set_page(mod, QUEUE_OLD_CONTROL);
361 iowrite8(locl, mod->dpm + MSYNC_LOCL);
362 return 0;
366 * ICAN3 "new-style" Host Interface Setup
369 static void ican3_init_new_host_interface(struct ican3_dev *mod)
371 struct ican3_new_desc desc;
372 unsigned long flags;
373 void __iomem *dst;
374 int i;
376 spin_lock_irqsave(&mod->lock, flags);
378 /* setup the internal datastructures for RX */
379 mod->rx_num = 0;
380 mod->rx_int = 0;
382 /* tohost queue descriptors are in page 5 */
383 ican3_set_page(mod, QUEUE_TOHOST);
384 dst = mod->dpm;
386 /* initialize the tohost (rx) queue descriptors: pages 9-24 */
387 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
388 desc.control = DESC_INTERRUPT | DESC_LEN(1); /* I L=1 */
389 desc.pointer = mod->free_page;
391 /* set wrap flag on last buffer */
392 if (i == ICAN3_NEW_BUFFERS - 1)
393 desc.control |= DESC_WRAP;
395 memcpy_toio(dst, &desc, sizeof(desc));
396 dst += sizeof(desc);
397 mod->free_page++;
400 /* fromhost (tx) mid queue descriptors are in page 6 */
401 ican3_set_page(mod, QUEUE_FROMHOST_MID);
402 dst = mod->dpm;
404 /* setup the internal datastructures for TX */
405 mod->tx_num = 0;
407 /* initialize the fromhost mid queue descriptors: pages 25-40 */
408 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
409 desc.control = DESC_VALID | DESC_LEN(1); /* V L=1 */
410 desc.pointer = mod->free_page;
412 /* set wrap flag on last buffer */
413 if (i == ICAN3_NEW_BUFFERS - 1)
414 desc.control |= DESC_WRAP;
416 memcpy_toio(dst, &desc, sizeof(desc));
417 dst += sizeof(desc);
418 mod->free_page++;
421 /* fromhost hi queue descriptors are in page 7 */
422 ican3_set_page(mod, QUEUE_FROMHOST_HIGH);
423 dst = mod->dpm;
425 /* initialize only a single buffer in the fromhost hi queue (unused) */
426 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
427 desc.pointer = mod->free_page;
428 memcpy_toio(dst, &desc, sizeof(desc));
429 mod->free_page++;
431 /* fromhost low queue descriptors are in page 8 */
432 ican3_set_page(mod, QUEUE_FROMHOST_LOW);
433 dst = mod->dpm;
435 /* initialize only a single buffer in the fromhost low queue (unused) */
436 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
437 desc.pointer = mod->free_page;
438 memcpy_toio(dst, &desc, sizeof(desc));
439 mod->free_page++;
441 spin_unlock_irqrestore(&mod->lock, flags);
445 * ICAN3 Fast Host Interface Setup
448 static void ican3_init_fast_host_interface(struct ican3_dev *mod)
450 struct ican3_fast_desc desc;
451 unsigned long flags;
452 unsigned int addr;
453 void __iomem *dst;
454 int i;
456 spin_lock_irqsave(&mod->lock, flags);
458 /* save the start recv page */
459 mod->fastrx_start = mod->free_page;
460 mod->fastrx_num = 0;
462 /* build a single fast tohost queue descriptor */
463 memset(&desc, 0, sizeof(desc));
464 desc.control = 0x00;
465 desc.command = 1;
467 /* build the tohost queue descriptor ring in memory */
468 addr = 0;
469 for (i = 0; i < ICAN3_RX_BUFFERS; i++) {
471 /* set the wrap bit on the last buffer */
472 if (i == ICAN3_RX_BUFFERS - 1)
473 desc.control |= DESC_WRAP;
475 /* switch to the correct page */
476 ican3_set_page(mod, mod->free_page);
478 /* copy the descriptor to the DPM */
479 dst = mod->dpm + addr;
480 memcpy_toio(dst, &desc, sizeof(desc));
481 addr += sizeof(desc);
483 /* move to the next page if necessary */
484 if (addr >= DPM_PAGE_SIZE) {
485 addr = 0;
486 mod->free_page++;
490 /* make sure we page-align the next queue */
491 if (addr != 0)
492 mod->free_page++;
494 /* save the start xmit page */
495 mod->fasttx_start = mod->free_page;
496 mod->fasttx_num = 0;
498 /* build a single fast fromhost queue descriptor */
499 memset(&desc, 0, sizeof(desc));
500 desc.control = DESC_VALID;
501 desc.command = 1;
503 /* build the fromhost queue descriptor ring in memory */
504 addr = 0;
505 for (i = 0; i < ICAN3_TX_BUFFERS; i++) {
507 /* set the wrap bit on the last buffer */
508 if (i == ICAN3_TX_BUFFERS - 1)
509 desc.control |= DESC_WRAP;
511 /* switch to the correct page */
512 ican3_set_page(mod, mod->free_page);
514 /* copy the descriptor to the DPM */
515 dst = mod->dpm + addr;
516 memcpy_toio(dst, &desc, sizeof(desc));
517 addr += sizeof(desc);
519 /* move to the next page if necessary */
520 if (addr >= DPM_PAGE_SIZE) {
521 addr = 0;
522 mod->free_page++;
526 spin_unlock_irqrestore(&mod->lock, flags);
530 * ICAN3 "new-style" Host Interface Message Helpers
534 * LOCKING: must hold mod->lock
536 static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
538 struct ican3_new_desc desc;
539 void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc));
541 /* switch to the fromhost mid queue, and read the buffer descriptor */
542 ican3_set_page(mod, QUEUE_FROMHOST_MID);
543 memcpy_fromio(&desc, desc_addr, sizeof(desc));
545 if (!(desc.control & DESC_VALID)) {
546 dev_dbg(mod->dev, "%s: no free buffers\n", __func__);
547 return -ENOMEM;
550 /* switch to the data page, copy the data */
551 ican3_set_page(mod, desc.pointer);
552 memcpy_toio(mod->dpm, msg, sizeof(*msg));
554 /* switch back to the descriptor, set the valid bit, write it back */
555 ican3_set_page(mod, QUEUE_FROMHOST_MID);
556 desc.control ^= DESC_VALID;
557 memcpy_toio(desc_addr, &desc, sizeof(desc));
559 /* update the tx number */
560 mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1);
561 return 0;
565 * LOCKING: must hold mod->lock
567 static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
569 struct ican3_new_desc desc;
570 void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc));
572 /* switch to the tohost queue, and read the buffer descriptor */
573 ican3_set_page(mod, QUEUE_TOHOST);
574 memcpy_fromio(&desc, desc_addr, sizeof(desc));
576 if (!(desc.control & DESC_VALID)) {
577 dev_dbg(mod->dev, "%s: no buffers to recv\n", __func__);
578 return -ENOMEM;
581 /* switch to the data page, copy the data */
582 ican3_set_page(mod, desc.pointer);
583 memcpy_fromio(msg, mod->dpm, sizeof(*msg));
585 /* switch back to the descriptor, toggle the valid bit, write it back */
586 ican3_set_page(mod, QUEUE_TOHOST);
587 desc.control ^= DESC_VALID;
588 memcpy_toio(desc_addr, &desc, sizeof(desc));
590 /* update the rx number */
591 mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1);
592 return 0;
596 * Message Send / Recv Helpers
599 static int ican3_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
601 unsigned long flags;
602 int ret;
604 spin_lock_irqsave(&mod->lock, flags);
606 if (mod->iftype == 0)
607 ret = ican3_old_send_msg(mod, msg);
608 else
609 ret = ican3_new_send_msg(mod, msg);
611 spin_unlock_irqrestore(&mod->lock, flags);
612 return ret;
615 static int ican3_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
617 unsigned long flags;
618 int ret;
620 spin_lock_irqsave(&mod->lock, flags);
622 if (mod->iftype == 0)
623 ret = ican3_old_recv_msg(mod, msg);
624 else
625 ret = ican3_new_recv_msg(mod, msg);
627 spin_unlock_irqrestore(&mod->lock, flags);
628 return ret;
632 * Quick Pre-constructed Messages
635 static int ican3_msg_connect(struct ican3_dev *mod)
637 struct ican3_msg msg;
639 memset(&msg, 0, sizeof(msg));
640 msg.spec = MSG_CONNECTI;
641 msg.len = cpu_to_le16(0);
643 return ican3_send_msg(mod, &msg);
646 static int ican3_msg_disconnect(struct ican3_dev *mod)
648 struct ican3_msg msg;
650 memset(&msg, 0, sizeof(msg));
651 msg.spec = MSG_DISCONNECT;
652 msg.len = cpu_to_le16(0);
654 return ican3_send_msg(mod, &msg);
657 static int ican3_msg_newhostif(struct ican3_dev *mod)
659 struct ican3_msg msg;
660 int ret;
662 memset(&msg, 0, sizeof(msg));
663 msg.spec = MSG_NEWHOSTIF;
664 msg.len = cpu_to_le16(0);
666 /* If we're not using the old interface, switching seems bogus */
667 WARN_ON(mod->iftype != 0);
669 ret = ican3_send_msg(mod, &msg);
670 if (ret)
671 return ret;
673 /* mark the module as using the new host interface */
674 mod->iftype = 1;
675 return 0;
678 static int ican3_msg_fasthostif(struct ican3_dev *mod)
680 struct ican3_msg msg;
681 unsigned int addr;
683 memset(&msg, 0, sizeof(msg));
684 msg.spec = MSG_INITFDPMQUEUE;
685 msg.len = cpu_to_le16(8);
687 /* write the tohost queue start address */
688 addr = DPM_PAGE_ADDR(mod->fastrx_start);
689 msg.data[0] = addr & 0xff;
690 msg.data[1] = (addr >> 8) & 0xff;
691 msg.data[2] = (addr >> 16) & 0xff;
692 msg.data[3] = (addr >> 24) & 0xff;
694 /* write the fromhost queue start address */
695 addr = DPM_PAGE_ADDR(mod->fasttx_start);
696 msg.data[4] = addr & 0xff;
697 msg.data[5] = (addr >> 8) & 0xff;
698 msg.data[6] = (addr >> 16) & 0xff;
699 msg.data[7] = (addr >> 24) & 0xff;
701 /* If we're not using the new interface yet, we cannot do this */
702 WARN_ON(mod->iftype != 1);
704 return ican3_send_msg(mod, &msg);
708 * Setup the CAN filter to either accept or reject all
709 * messages from the CAN bus.
711 static int ican3_set_id_filter(struct ican3_dev *mod, bool accept)
713 struct ican3_msg msg;
714 int ret;
716 /* Standard Frame Format */
717 memset(&msg, 0, sizeof(msg));
718 msg.spec = MSG_SETAFILMASK;
719 msg.len = cpu_to_le16(5);
720 msg.data[0] = 0x00; /* IDLo LSB */
721 msg.data[1] = 0x00; /* IDLo MSB */
722 msg.data[2] = 0xff; /* IDHi LSB */
723 msg.data[3] = 0x07; /* IDHi MSB */
725 /* accept all frames for fast host if, or reject all frames */
726 msg.data[4] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
728 ret = ican3_send_msg(mod, &msg);
729 if (ret)
730 return ret;
732 /* Extended Frame Format */
733 memset(&msg, 0, sizeof(msg));
734 msg.spec = MSG_SETAFILMASK;
735 msg.len = cpu_to_le16(13);
736 msg.data[0] = 0; /* MUX = 0 */
737 msg.data[1] = 0x00; /* IDLo LSB */
738 msg.data[2] = 0x00;
739 msg.data[3] = 0x00;
740 msg.data[4] = 0x20; /* IDLo MSB */
741 msg.data[5] = 0xff; /* IDHi LSB */
742 msg.data[6] = 0xff;
743 msg.data[7] = 0xff;
744 msg.data[8] = 0x3f; /* IDHi MSB */
746 /* accept all frames for fast host if, or reject all frames */
747 msg.data[9] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
749 return ican3_send_msg(mod, &msg);
753 * Bring the CAN bus online or offline
755 static int ican3_set_bus_state(struct ican3_dev *mod, bool on)
757 struct ican3_msg msg;
759 memset(&msg, 0, sizeof(msg));
760 msg.spec = on ? MSG_CONREQ : MSG_COFFREQ;
761 msg.len = cpu_to_le16(0);
763 return ican3_send_msg(mod, &msg);
766 static int ican3_set_termination(struct ican3_dev *mod, bool on)
768 struct ican3_msg msg;
770 memset(&msg, 0, sizeof(msg));
771 msg.spec = MSG_HWCONF;
772 msg.len = cpu_to_le16(2);
773 msg.data[0] = 0x00;
774 msg.data[1] = on ? HWCONF_TERMINATE_ON : HWCONF_TERMINATE_OFF;
776 return ican3_send_msg(mod, &msg);
779 static int ican3_send_inquiry(struct ican3_dev *mod, u8 subspec)
781 struct ican3_msg msg;
783 memset(&msg, 0, sizeof(msg));
784 msg.spec = MSG_INQUIRY;
785 msg.len = cpu_to_le16(2);
786 msg.data[0] = subspec;
787 msg.data[1] = 0x00;
789 return ican3_send_msg(mod, &msg);
792 static int ican3_set_buserror(struct ican3_dev *mod, u8 quota)
794 struct ican3_msg msg;
796 memset(&msg, 0, sizeof(msg));
797 msg.spec = MSG_CCONFREQ;
798 msg.len = cpu_to_le16(2);
799 msg.data[0] = 0x00;
800 msg.data[1] = quota;
802 return ican3_send_msg(mod, &msg);
806 * ICAN3 to Linux CAN Frame Conversion
809 static void ican3_to_can_frame(struct ican3_dev *mod,
810 struct ican3_fast_desc *desc,
811 struct can_frame *cf)
813 if ((desc->command & ICAN3_CAN_TYPE_MASK) == ICAN3_CAN_TYPE_SFF) {
814 if (desc->data[1] & ICAN3_SFF_RTR)
815 cf->can_id |= CAN_RTR_FLAG;
817 cf->can_id |= desc->data[0] << 3;
818 cf->can_id |= (desc->data[1] & 0xe0) >> 5;
819 cf->can_dlc = get_can_dlc(desc->data[1] & ICAN3_CAN_DLC_MASK);
820 memcpy(cf->data, &desc->data[2], cf->can_dlc);
821 } else {
822 cf->can_dlc = get_can_dlc(desc->data[0] & ICAN3_CAN_DLC_MASK);
823 if (desc->data[0] & ICAN3_EFF_RTR)
824 cf->can_id |= CAN_RTR_FLAG;
826 if (desc->data[0] & ICAN3_EFF) {
827 cf->can_id |= CAN_EFF_FLAG;
828 cf->can_id |= desc->data[2] << 21; /* 28-21 */
829 cf->can_id |= desc->data[3] << 13; /* 20-13 */
830 cf->can_id |= desc->data[4] << 5; /* 12-5 */
831 cf->can_id |= (desc->data[5] & 0xf8) >> 3;
832 } else {
833 cf->can_id |= desc->data[2] << 3; /* 10-3 */
834 cf->can_id |= desc->data[3] >> 5; /* 2-0 */
837 memcpy(cf->data, &desc->data[6], cf->can_dlc);
841 static void can_frame_to_ican3(struct ican3_dev *mod,
842 struct can_frame *cf,
843 struct ican3_fast_desc *desc)
845 /* clear out any stale data in the descriptor */
846 memset(desc->data, 0, sizeof(desc->data));
848 /* we always use the extended format, with the ECHO flag set */
849 desc->command = ICAN3_CAN_TYPE_EFF;
850 desc->data[0] |= cf->can_dlc;
851 desc->data[1] |= ICAN3_ECHO;
853 /* support single transmission (no retries) mode */
854 if (mod->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT)
855 desc->data[1] |= ICAN3_SNGL;
857 if (cf->can_id & CAN_RTR_FLAG)
858 desc->data[0] |= ICAN3_EFF_RTR;
860 /* pack the id into the correct places */
861 if (cf->can_id & CAN_EFF_FLAG) {
862 desc->data[0] |= ICAN3_EFF;
863 desc->data[2] = (cf->can_id & 0x1fe00000) >> 21; /* 28-21 */
864 desc->data[3] = (cf->can_id & 0x001fe000) >> 13; /* 20-13 */
865 desc->data[4] = (cf->can_id & 0x00001fe0) >> 5; /* 12-5 */
866 desc->data[5] = (cf->can_id & 0x0000001f) << 3; /* 4-0 */
867 } else {
868 desc->data[2] = (cf->can_id & 0x7F8) >> 3; /* bits 10-3 */
869 desc->data[3] = (cf->can_id & 0x007) << 5; /* bits 2-0 */
872 /* copy the data bits into the descriptor */
873 memcpy(&desc->data[6], cf->data, cf->can_dlc);
877 * Interrupt Handling
881 * Handle an ID + Version message response from the firmware. We never generate
882 * this message in production code, but it is very useful when debugging to be
883 * able to display this message.
885 static void ican3_handle_idvers(struct ican3_dev *mod, struct ican3_msg *msg)
887 dev_dbg(mod->dev, "IDVERS response: %s\n", msg->data);
890 static void ican3_handle_msglost(struct ican3_dev *mod, struct ican3_msg *msg)
892 struct net_device *dev = mod->ndev;
893 struct net_device_stats *stats = &dev->stats;
894 struct can_frame *cf;
895 struct sk_buff *skb;
898 * Report that communication messages with the microcontroller firmware
899 * are being lost. These are never CAN frames, so we do not generate an
900 * error frame for userspace
902 if (msg->spec == MSG_MSGLOST) {
903 dev_err(mod->dev, "lost %d control messages\n", msg->data[0]);
904 return;
908 * Oops, this indicates that we have lost messages in the fast queue,
909 * which are exclusively CAN messages. Our driver isn't reading CAN
910 * frames fast enough.
912 * We'll pretend that the SJA1000 told us that it ran out of buffer
913 * space, because there is not a better message for this.
915 skb = alloc_can_err_skb(dev, &cf);
916 if (skb) {
917 cf->can_id |= CAN_ERR_CRTL;
918 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
919 stats->rx_over_errors++;
920 stats->rx_errors++;
921 netif_rx(skb);
926 * Handle CAN Event Indication Messages from the firmware
928 * The ICAN3 firmware provides the values of some SJA1000 registers when it
929 * generates this message. The code below is largely copied from the
930 * drivers/net/can/sja1000/sja1000.c file, and adapted as necessary
932 static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg)
934 struct net_device *dev = mod->ndev;
935 struct net_device_stats *stats = &dev->stats;
936 enum can_state state = mod->can.state;
937 u8 isrc, ecc, status, rxerr, txerr;
938 struct can_frame *cf;
939 struct sk_buff *skb;
941 /* we can only handle the SJA1000 part */
942 if (msg->data[1] != CEVTIND_CHIP_SJA1000) {
943 dev_err(mod->dev, "unable to handle errors on non-SJA1000\n");
944 return -ENODEV;
947 /* check the message length for sanity */
948 if (le16_to_cpu(msg->len) < 6) {
949 dev_err(mod->dev, "error message too short\n");
950 return -EINVAL;
953 isrc = msg->data[0];
954 ecc = msg->data[2];
955 status = msg->data[3];
956 rxerr = msg->data[4];
957 txerr = msg->data[5];
960 * This hardware lacks any support other than bus error messages to
961 * determine if packet transmission has failed.
963 * When TX errors happen, one echo skb needs to be dropped from the
964 * front of the queue.
966 * A small bit of code is duplicated here and below, to avoid error
967 * skb allocation when it will just be freed immediately.
969 if (isrc == CEVTIND_BEI) {
970 int ret;
971 dev_dbg(mod->dev, "bus error interrupt\n");
973 /* TX error */
974 if (!(ecc & ECC_DIR)) {
975 kfree_skb(skb_dequeue(&mod->echoq));
976 stats->tx_errors++;
977 } else {
978 stats->rx_errors++;
982 * The controller automatically disables bus-error interrupts
983 * and therefore we must re-enable them.
985 ret = ican3_set_buserror(mod, 1);
986 if (ret) {
987 dev_err(mod->dev, "unable to re-enable bus-error\n");
988 return ret;
991 /* bus error reporting is off, return immediately */
992 if (!(mod->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
993 return 0;
996 skb = alloc_can_err_skb(dev, &cf);
997 if (skb == NULL)
998 return -ENOMEM;
1000 /* data overrun interrupt */
1001 if (isrc == CEVTIND_DOI || isrc == CEVTIND_LOST) {
1002 dev_dbg(mod->dev, "data overrun interrupt\n");
1003 cf->can_id |= CAN_ERR_CRTL;
1004 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
1005 stats->rx_over_errors++;
1006 stats->rx_errors++;
1009 /* error warning + passive interrupt */
1010 if (isrc == CEVTIND_EI) {
1011 dev_dbg(mod->dev, "error warning + passive interrupt\n");
1012 if (status & SR_BS) {
1013 state = CAN_STATE_BUS_OFF;
1014 cf->can_id |= CAN_ERR_BUSOFF;
1015 can_bus_off(dev);
1016 } else if (status & SR_ES) {
1017 if (rxerr >= 128 || txerr >= 128)
1018 state = CAN_STATE_ERROR_PASSIVE;
1019 else
1020 state = CAN_STATE_ERROR_WARNING;
1021 } else {
1022 state = CAN_STATE_ERROR_ACTIVE;
1026 /* bus error interrupt */
1027 if (isrc == CEVTIND_BEI) {
1028 mod->can.can_stats.bus_error++;
1029 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
1031 switch (ecc & ECC_MASK) {
1032 case ECC_BIT:
1033 cf->data[2] |= CAN_ERR_PROT_BIT;
1034 break;
1035 case ECC_FORM:
1036 cf->data[2] |= CAN_ERR_PROT_FORM;
1037 break;
1038 case ECC_STUFF:
1039 cf->data[2] |= CAN_ERR_PROT_STUFF;
1040 break;
1041 default:
1042 cf->data[2] |= CAN_ERR_PROT_UNSPEC;
1043 cf->data[3] = ecc & ECC_SEG;
1044 break;
1047 if (!(ecc & ECC_DIR))
1048 cf->data[2] |= CAN_ERR_PROT_TX;
1050 cf->data[6] = txerr;
1051 cf->data[7] = rxerr;
1054 if (state != mod->can.state && (state == CAN_STATE_ERROR_WARNING ||
1055 state == CAN_STATE_ERROR_PASSIVE)) {
1056 cf->can_id |= CAN_ERR_CRTL;
1057 if (state == CAN_STATE_ERROR_WARNING) {
1058 mod->can.can_stats.error_warning++;
1059 cf->data[1] = (txerr > rxerr) ?
1060 CAN_ERR_CRTL_TX_WARNING :
1061 CAN_ERR_CRTL_RX_WARNING;
1062 } else {
1063 mod->can.can_stats.error_passive++;
1064 cf->data[1] = (txerr > rxerr) ?
1065 CAN_ERR_CRTL_TX_PASSIVE :
1066 CAN_ERR_CRTL_RX_PASSIVE;
1069 cf->data[6] = txerr;
1070 cf->data[7] = rxerr;
1073 mod->can.state = state;
1074 netif_rx(skb);
1075 return 0;
1078 static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg)
1080 switch (msg->data[0]) {
1081 case INQUIRY_STATUS:
1082 case INQUIRY_EXTENDED:
1083 mod->bec.rxerr = msg->data[5];
1084 mod->bec.txerr = msg->data[6];
1085 complete(&mod->buserror_comp);
1086 break;
1087 case INQUIRY_TERMINATION:
1088 mod->termination_enabled = msg->data[6] & HWCONF_TERMINATE_ON;
1089 complete(&mod->termination_comp);
1090 break;
1091 default:
1092 dev_err(mod->dev, "received an unknown inquiry response\n");
1093 break;
1097 static void ican3_handle_unknown_message(struct ican3_dev *mod,
1098 struct ican3_msg *msg)
1100 dev_warn(mod->dev, "received unknown message: spec 0x%.2x length %d\n",
1101 msg->spec, le16_to_cpu(msg->len));
1105 * Handle a control message from the firmware
1107 static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg)
1109 dev_dbg(mod->dev, "%s: modno %d spec 0x%.2x len %d bytes\n", __func__,
1110 mod->num, msg->spec, le16_to_cpu(msg->len));
1112 switch (msg->spec) {
1113 case MSG_IDVERS:
1114 ican3_handle_idvers(mod, msg);
1115 break;
1116 case MSG_MSGLOST:
1117 case MSG_FMSGLOST:
1118 ican3_handle_msglost(mod, msg);
1119 break;
1120 case MSG_CEVTIND:
1121 ican3_handle_cevtind(mod, msg);
1122 break;
1123 case MSG_INQUIRY:
1124 ican3_handle_inquiry(mod, msg);
1125 break;
1126 default:
1127 ican3_handle_unknown_message(mod, msg);
1128 break;
1133 * The ican3 needs to store all echo skbs, and therefore cannot
1134 * use the generic infrastructure for this.
1136 static void ican3_put_echo_skb(struct ican3_dev *mod, struct sk_buff *skb)
1138 skb = can_create_echo_skb(skb);
1139 if (!skb)
1140 return;
1142 /* save this skb for tx interrupt echo handling */
1143 skb_queue_tail(&mod->echoq, skb);
1146 static unsigned int ican3_get_echo_skb(struct ican3_dev *mod)
1148 struct sk_buff *skb = skb_dequeue(&mod->echoq);
1149 struct can_frame *cf;
1150 u8 dlc;
1152 /* this should never trigger unless there is a driver bug */
1153 if (!skb) {
1154 netdev_err(mod->ndev, "BUG: echo skb not occupied\n");
1155 return 0;
1158 cf = (struct can_frame *)skb->data;
1159 dlc = cf->can_dlc;
1161 /* check flag whether this packet has to be looped back */
1162 if (skb->pkt_type != PACKET_LOOPBACK) {
1163 kfree_skb(skb);
1164 return dlc;
1167 skb->protocol = htons(ETH_P_CAN);
1168 skb->pkt_type = PACKET_BROADCAST;
1169 skb->ip_summed = CHECKSUM_UNNECESSARY;
1170 skb->dev = mod->ndev;
1171 netif_receive_skb(skb);
1172 return dlc;
1176 * Compare an skb with an existing echo skb
1178 * This function will be used on devices which have a hardware loopback.
1179 * On these devices, this function can be used to compare a received skb
1180 * with the saved echo skbs so that the hardware echo skb can be dropped.
1182 * Returns true if the skb's are identical, false otherwise.
1184 static bool ican3_echo_skb_matches(struct ican3_dev *mod, struct sk_buff *skb)
1186 struct can_frame *cf = (struct can_frame *)skb->data;
1187 struct sk_buff *echo_skb = skb_peek(&mod->echoq);
1188 struct can_frame *echo_cf;
1190 if (!echo_skb)
1191 return false;
1193 echo_cf = (struct can_frame *)echo_skb->data;
1194 if (cf->can_id != echo_cf->can_id)
1195 return false;
1197 if (cf->can_dlc != echo_cf->can_dlc)
1198 return false;
1200 return memcmp(cf->data, echo_cf->data, cf->can_dlc) == 0;
1204 * Check that there is room in the TX ring to transmit another skb
1206 * LOCKING: must hold mod->lock
1208 static bool ican3_txok(struct ican3_dev *mod)
1210 struct ican3_fast_desc __iomem *desc;
1211 u8 control;
1213 /* check that we have echo queue space */
1214 if (skb_queue_len(&mod->echoq) >= ICAN3_TX_BUFFERS)
1215 return false;
1217 /* copy the control bits of the descriptor */
1218 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1219 desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc));
1220 control = ioread8(&desc->control);
1222 /* if the control bits are not valid, then we have no more space */
1223 if (!(control & DESC_VALID))
1224 return false;
1226 return true;
1230 * Receive one CAN frame from the hardware
1232 * CONTEXT: must be called from user context
1234 static int ican3_recv_skb(struct ican3_dev *mod)
1236 struct net_device *ndev = mod->ndev;
1237 struct net_device_stats *stats = &ndev->stats;
1238 struct ican3_fast_desc desc;
1239 void __iomem *desc_addr;
1240 struct can_frame *cf;
1241 struct sk_buff *skb;
1242 unsigned long flags;
1244 spin_lock_irqsave(&mod->lock, flags);
1246 /* copy the whole descriptor */
1247 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1248 desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc));
1249 memcpy_fromio(&desc, desc_addr, sizeof(desc));
1251 spin_unlock_irqrestore(&mod->lock, flags);
1253 /* check that we actually have a CAN frame */
1254 if (!(desc.control & DESC_VALID))
1255 return -ENOBUFS;
1257 /* allocate an skb */
1258 skb = alloc_can_skb(ndev, &cf);
1259 if (unlikely(skb == NULL)) {
1260 stats->rx_dropped++;
1261 goto err_noalloc;
1264 /* convert the ICAN3 frame into Linux CAN format */
1265 ican3_to_can_frame(mod, &desc, cf);
1268 * If this is an ECHO frame received from the hardware loopback
1269 * feature, use the skb saved in the ECHO stack instead. This allows
1270 * the Linux CAN core to support CAN_RAW_RECV_OWN_MSGS correctly.
1272 * Since this is a confirmation of a successfully transmitted packet
1273 * sent from this host, update the transmit statistics.
1275 * Also, the netdevice queue needs to be allowed to send packets again.
1277 if (ican3_echo_skb_matches(mod, skb)) {
1278 stats->tx_packets++;
1279 stats->tx_bytes += ican3_get_echo_skb(mod);
1280 kfree_skb(skb);
1281 goto err_noalloc;
1284 /* update statistics, receive the skb */
1285 stats->rx_packets++;
1286 stats->rx_bytes += cf->can_dlc;
1287 netif_receive_skb(skb);
1289 err_noalloc:
1290 /* toggle the valid bit and return the descriptor to the ring */
1291 desc.control ^= DESC_VALID;
1293 spin_lock_irqsave(&mod->lock, flags);
1295 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1296 memcpy_toio(desc_addr, &desc, 1);
1298 /* update the next buffer pointer */
1299 mod->fastrx_num = (desc.control & DESC_WRAP) ? 0
1300 : (mod->fastrx_num + 1);
1302 /* there are still more buffers to process */
1303 spin_unlock_irqrestore(&mod->lock, flags);
1304 return 0;
1307 static int ican3_napi(struct napi_struct *napi, int budget)
1309 struct ican3_dev *mod = container_of(napi, struct ican3_dev, napi);
1310 unsigned long flags;
1311 int received = 0;
1312 int ret;
1314 /* process all communication messages */
1315 while (true) {
1316 struct ican3_msg msg;
1317 ret = ican3_recv_msg(mod, &msg);
1318 if (ret)
1319 break;
1321 ican3_handle_message(mod, &msg);
1324 /* process all CAN frames from the fast interface */
1325 while (received < budget) {
1326 ret = ican3_recv_skb(mod);
1327 if (ret)
1328 break;
1330 received++;
1333 /* We have processed all packets that the adapter had, but it
1334 * was less than our budget, stop polling */
1335 if (received < budget)
1336 napi_complete(napi);
1338 spin_lock_irqsave(&mod->lock, flags);
1340 /* Wake up the transmit queue if necessary */
1341 if (netif_queue_stopped(mod->ndev) && ican3_txok(mod))
1342 netif_wake_queue(mod->ndev);
1344 spin_unlock_irqrestore(&mod->lock, flags);
1346 /* re-enable interrupt generation */
1347 iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1348 return received;
1351 static irqreturn_t ican3_irq(int irq, void *dev_id)
1353 struct ican3_dev *mod = dev_id;
1354 u8 stat;
1357 * The interrupt status register on this device reports interrupts
1358 * as zeroes instead of using ones like most other devices
1360 stat = ioread8(&mod->ctrl->int_disable) & (1 << mod->num);
1361 if (stat == (1 << mod->num))
1362 return IRQ_NONE;
1364 /* clear the MODULbus interrupt from the microcontroller */
1365 ioread8(&mod->dpmctrl->interrupt);
1367 /* disable interrupt generation, schedule the NAPI poller */
1368 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1369 napi_schedule(&mod->napi);
1370 return IRQ_HANDLED;
1374 * Firmware reset, startup, and shutdown
1378 * Reset an ICAN module to its power-on state
1380 * CONTEXT: no network device registered
1382 static int ican3_reset_module(struct ican3_dev *mod)
1384 unsigned long start;
1385 u8 runold, runnew;
1387 /* disable interrupts so no more work is scheduled */
1388 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1390 /* the first unallocated page in the DPM is #9 */
1391 mod->free_page = DPM_FREE_START;
1393 ican3_set_page(mod, QUEUE_OLD_CONTROL);
1394 runold = ioread8(mod->dpm + TARGET_RUNNING);
1396 /* reset the module */
1397 iowrite8(0x00, &mod->dpmctrl->hwreset);
1399 /* wait until the module has finished resetting and is running */
1400 start = jiffies;
1401 do {
1402 ican3_set_page(mod, QUEUE_OLD_CONTROL);
1403 runnew = ioread8(mod->dpm + TARGET_RUNNING);
1404 if (runnew == (runold ^ 0xff))
1405 return 0;
1407 msleep(10);
1408 } while (time_before(jiffies, start + HZ / 4));
1410 dev_err(mod->dev, "failed to reset CAN module\n");
1411 return -ETIMEDOUT;
1414 static void ican3_shutdown_module(struct ican3_dev *mod)
1416 ican3_msg_disconnect(mod);
1417 ican3_reset_module(mod);
1421 * Startup an ICAN module, bringing it into fast mode
1423 static int ican3_startup_module(struct ican3_dev *mod)
1425 int ret;
1427 ret = ican3_reset_module(mod);
1428 if (ret) {
1429 dev_err(mod->dev, "unable to reset module\n");
1430 return ret;
1433 /* re-enable interrupts so we can send messages */
1434 iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1436 ret = ican3_msg_connect(mod);
1437 if (ret) {
1438 dev_err(mod->dev, "unable to connect to module\n");
1439 return ret;
1442 ican3_init_new_host_interface(mod);
1443 ret = ican3_msg_newhostif(mod);
1444 if (ret) {
1445 dev_err(mod->dev, "unable to switch to new-style interface\n");
1446 return ret;
1449 /* default to "termination on" */
1450 ret = ican3_set_termination(mod, true);
1451 if (ret) {
1452 dev_err(mod->dev, "unable to enable termination\n");
1453 return ret;
1456 /* default to "bus errors enabled" */
1457 ret = ican3_set_buserror(mod, 1);
1458 if (ret) {
1459 dev_err(mod->dev, "unable to set bus-error\n");
1460 return ret;
1463 ican3_init_fast_host_interface(mod);
1464 ret = ican3_msg_fasthostif(mod);
1465 if (ret) {
1466 dev_err(mod->dev, "unable to switch to fast host interface\n");
1467 return ret;
1470 ret = ican3_set_id_filter(mod, true);
1471 if (ret) {
1472 dev_err(mod->dev, "unable to set acceptance filter\n");
1473 return ret;
1476 return 0;
1480 * CAN Network Device
1483 static int ican3_open(struct net_device *ndev)
1485 struct ican3_dev *mod = netdev_priv(ndev);
1486 int ret;
1488 /* open the CAN layer */
1489 ret = open_candev(ndev);
1490 if (ret) {
1491 dev_err(mod->dev, "unable to start CAN layer\n");
1492 return ret;
1495 /* bring the bus online */
1496 ret = ican3_set_bus_state(mod, true);
1497 if (ret) {
1498 dev_err(mod->dev, "unable to set bus-on\n");
1499 close_candev(ndev);
1500 return ret;
1503 /* start up the network device */
1504 mod->can.state = CAN_STATE_ERROR_ACTIVE;
1505 netif_start_queue(ndev);
1507 return 0;
1510 static int ican3_stop(struct net_device *ndev)
1512 struct ican3_dev *mod = netdev_priv(ndev);
1513 int ret;
1515 /* stop the network device xmit routine */
1516 netif_stop_queue(ndev);
1517 mod->can.state = CAN_STATE_STOPPED;
1519 /* bring the bus offline, stop receiving packets */
1520 ret = ican3_set_bus_state(mod, false);
1521 if (ret) {
1522 dev_err(mod->dev, "unable to set bus-off\n");
1523 return ret;
1526 /* drop all outstanding echo skbs */
1527 skb_queue_purge(&mod->echoq);
1529 /* close the CAN layer */
1530 close_candev(ndev);
1531 return 0;
1534 static int ican3_xmit(struct sk_buff *skb, struct net_device *ndev)
1536 struct ican3_dev *mod = netdev_priv(ndev);
1537 struct can_frame *cf = (struct can_frame *)skb->data;
1538 struct ican3_fast_desc desc;
1539 void __iomem *desc_addr;
1540 unsigned long flags;
1542 if (can_dropped_invalid_skb(ndev, skb))
1543 return NETDEV_TX_OK;
1545 spin_lock_irqsave(&mod->lock, flags);
1547 /* check that we can actually transmit */
1548 if (!ican3_txok(mod)) {
1549 dev_err(mod->dev, "BUG: no free descriptors\n");
1550 spin_unlock_irqrestore(&mod->lock, flags);
1551 return NETDEV_TX_BUSY;
1554 /* copy the control bits of the descriptor */
1555 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1556 desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc));
1557 memset(&desc, 0, sizeof(desc));
1558 memcpy_fromio(&desc, desc_addr, 1);
1560 /* convert the Linux CAN frame into ICAN3 format */
1561 can_frame_to_ican3(mod, cf, &desc);
1564 * This hardware doesn't have TX-done notifications, so we'll try and
1565 * emulate it the best we can using ECHO skbs. Add the skb to the ECHO
1566 * stack. Upon packet reception, check if the ECHO skb and received
1567 * skb match, and use that to wake the queue.
1569 ican3_put_echo_skb(mod, skb);
1572 * the programming manual says that you must set the IVALID bit, then
1573 * interrupt, then set the valid bit. Quite weird, but it seems to be
1574 * required for this to work
1576 desc.control |= DESC_IVALID;
1577 memcpy_toio(desc_addr, &desc, sizeof(desc));
1579 /* generate a MODULbus interrupt to the microcontroller */
1580 iowrite8(0x01, &mod->dpmctrl->interrupt);
1582 desc.control ^= DESC_VALID;
1583 memcpy_toio(desc_addr, &desc, sizeof(desc));
1585 /* update the next buffer pointer */
1586 mod->fasttx_num = (desc.control & DESC_WRAP) ? 0
1587 : (mod->fasttx_num + 1);
1589 /* if there is no free descriptor space, stop the transmit queue */
1590 if (!ican3_txok(mod))
1591 netif_stop_queue(ndev);
1593 spin_unlock_irqrestore(&mod->lock, flags);
1594 return NETDEV_TX_OK;
1597 static const struct net_device_ops ican3_netdev_ops = {
1598 .ndo_open = ican3_open,
1599 .ndo_stop = ican3_stop,
1600 .ndo_start_xmit = ican3_xmit,
1604 * Low-level CAN Device
1607 /* This structure was stolen from drivers/net/can/sja1000/sja1000.c */
1608 static const struct can_bittiming_const ican3_bittiming_const = {
1609 .name = DRV_NAME,
1610 .tseg1_min = 1,
1611 .tseg1_max = 16,
1612 .tseg2_min = 1,
1613 .tseg2_max = 8,
1614 .sjw_max = 4,
1615 .brp_min = 1,
1616 .brp_max = 64,
1617 .brp_inc = 1,
1621 * This routine was stolen from drivers/net/can/sja1000/sja1000.c
1623 * The bittiming register command for the ICAN3 just sets the bit timing
1624 * registers on the SJA1000 chip directly
1626 static int ican3_set_bittiming(struct net_device *ndev)
1628 struct ican3_dev *mod = netdev_priv(ndev);
1629 struct can_bittiming *bt = &mod->can.bittiming;
1630 struct ican3_msg msg;
1631 u8 btr0, btr1;
1633 btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
1634 btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
1635 (((bt->phase_seg2 - 1) & 0x7) << 4);
1636 if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
1637 btr1 |= 0x80;
1639 memset(&msg, 0, sizeof(msg));
1640 msg.spec = MSG_CBTRREQ;
1641 msg.len = cpu_to_le16(4);
1642 msg.data[0] = 0x00;
1643 msg.data[1] = 0x00;
1644 msg.data[2] = btr0;
1645 msg.data[3] = btr1;
1647 return ican3_send_msg(mod, &msg);
1650 static int ican3_set_mode(struct net_device *ndev, enum can_mode mode)
1652 struct ican3_dev *mod = netdev_priv(ndev);
1653 int ret;
1655 if (mode != CAN_MODE_START)
1656 return -ENOTSUPP;
1658 /* bring the bus online */
1659 ret = ican3_set_bus_state(mod, true);
1660 if (ret) {
1661 dev_err(mod->dev, "unable to set bus-on\n");
1662 return ret;
1665 /* start up the network device */
1666 mod->can.state = CAN_STATE_ERROR_ACTIVE;
1668 if (netif_queue_stopped(ndev))
1669 netif_wake_queue(ndev);
1671 return 0;
1674 static int ican3_get_berr_counter(const struct net_device *ndev,
1675 struct can_berr_counter *bec)
1677 struct ican3_dev *mod = netdev_priv(ndev);
1678 int ret;
1680 ret = ican3_send_inquiry(mod, INQUIRY_STATUS);
1681 if (ret)
1682 return ret;
1684 ret = wait_for_completion_timeout(&mod->buserror_comp, HZ);
1685 if (ret == 0) {
1686 dev_info(mod->dev, "%s timed out\n", __func__);
1687 return -ETIMEDOUT;
1690 bec->rxerr = mod->bec.rxerr;
1691 bec->txerr = mod->bec.txerr;
1692 return 0;
1696 * Sysfs Attributes
1699 static ssize_t ican3_sysfs_show_term(struct device *dev,
1700 struct device_attribute *attr,
1701 char *buf)
1703 struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1704 int ret;
1706 ret = ican3_send_inquiry(mod, INQUIRY_TERMINATION);
1707 if (ret)
1708 return ret;
1710 ret = wait_for_completion_timeout(&mod->termination_comp, HZ);
1711 if (ret == 0) {
1712 dev_info(mod->dev, "%s timed out\n", __func__);
1713 return -ETIMEDOUT;
1716 return snprintf(buf, PAGE_SIZE, "%u\n", mod->termination_enabled);
1719 static ssize_t ican3_sysfs_set_term(struct device *dev,
1720 struct device_attribute *attr,
1721 const char *buf, size_t count)
1723 struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1724 unsigned long enable;
1725 int ret;
1727 if (kstrtoul(buf, 0, &enable))
1728 return -EINVAL;
1730 ret = ican3_set_termination(mod, enable);
1731 if (ret)
1732 return ret;
1734 return count;
1737 static DEVICE_ATTR(termination, S_IWUSR | S_IRUGO, ican3_sysfs_show_term,
1738 ican3_sysfs_set_term);
1740 static struct attribute *ican3_sysfs_attrs[] = {
1741 &dev_attr_termination.attr,
1742 NULL,
1745 static struct attribute_group ican3_sysfs_attr_group = {
1746 .attrs = ican3_sysfs_attrs,
1750 * PCI Subsystem
1753 static int ican3_probe(struct platform_device *pdev)
1755 struct janz_platform_data *pdata;
1756 struct net_device *ndev;
1757 struct ican3_dev *mod;
1758 struct resource *res;
1759 struct device *dev;
1760 int ret;
1762 pdata = pdev->dev.platform_data;
1763 if (!pdata)
1764 return -ENXIO;
1766 dev_dbg(&pdev->dev, "probe: module number %d\n", pdata->modno);
1768 /* save the struct device for printing */
1769 dev = &pdev->dev;
1771 /* allocate the CAN device and private data */
1772 ndev = alloc_candev(sizeof(*mod), 0);
1773 if (!ndev) {
1774 dev_err(dev, "unable to allocate CANdev\n");
1775 ret = -ENOMEM;
1776 goto out_return;
1779 platform_set_drvdata(pdev, ndev);
1780 mod = netdev_priv(ndev);
1781 mod->ndev = ndev;
1782 mod->dev = &pdev->dev;
1783 mod->num = pdata->modno;
1784 netif_napi_add(ndev, &mod->napi, ican3_napi, ICAN3_RX_BUFFERS);
1785 skb_queue_head_init(&mod->echoq);
1786 spin_lock_init(&mod->lock);
1787 init_completion(&mod->termination_comp);
1788 init_completion(&mod->buserror_comp);
1790 /* setup device-specific sysfs attributes */
1791 ndev->sysfs_groups[0] = &ican3_sysfs_attr_group;
1793 /* the first unallocated page in the DPM is 9 */
1794 mod->free_page = DPM_FREE_START;
1796 ndev->netdev_ops = &ican3_netdev_ops;
1797 ndev->flags |= IFF_ECHO;
1798 SET_NETDEV_DEV(ndev, &pdev->dev);
1800 mod->can.clock.freq = ICAN3_CAN_CLOCK;
1801 mod->can.bittiming_const = &ican3_bittiming_const;
1802 mod->can.do_set_bittiming = ican3_set_bittiming;
1803 mod->can.do_set_mode = ican3_set_mode;
1804 mod->can.do_get_berr_counter = ican3_get_berr_counter;
1805 mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES
1806 | CAN_CTRLMODE_BERR_REPORTING
1807 | CAN_CTRLMODE_ONE_SHOT;
1809 /* find our IRQ number */
1810 mod->irq = platform_get_irq(pdev, 0);
1811 if (mod->irq < 0) {
1812 dev_err(dev, "IRQ line not found\n");
1813 ret = -ENODEV;
1814 goto out_free_ndev;
1817 ndev->irq = mod->irq;
1819 /* get access to the MODULbus registers for this module */
1820 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1821 if (!res) {
1822 dev_err(dev, "MODULbus registers not found\n");
1823 ret = -ENODEV;
1824 goto out_free_ndev;
1827 mod->dpm = ioremap(res->start, resource_size(res));
1828 if (!mod->dpm) {
1829 dev_err(dev, "MODULbus registers not ioremap\n");
1830 ret = -ENOMEM;
1831 goto out_free_ndev;
1834 mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE;
1836 /* get access to the control registers for this module */
1837 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1838 if (!res) {
1839 dev_err(dev, "CONTROL registers not found\n");
1840 ret = -ENODEV;
1841 goto out_iounmap_dpm;
1844 mod->ctrl = ioremap(res->start, resource_size(res));
1845 if (!mod->ctrl) {
1846 dev_err(dev, "CONTROL registers not ioremap\n");
1847 ret = -ENOMEM;
1848 goto out_iounmap_dpm;
1851 /* disable our IRQ, then hookup the IRQ handler */
1852 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1853 ret = request_irq(mod->irq, ican3_irq, IRQF_SHARED, DRV_NAME, mod);
1854 if (ret) {
1855 dev_err(dev, "unable to request IRQ\n");
1856 goto out_iounmap_ctrl;
1859 /* reset and initialize the CAN controller into fast mode */
1860 napi_enable(&mod->napi);
1861 ret = ican3_startup_module(mod);
1862 if (ret) {
1863 dev_err(dev, "%s: unable to start CANdev\n", __func__);
1864 goto out_free_irq;
1867 /* register with the Linux CAN layer */
1868 ret = register_candev(ndev);
1869 if (ret) {
1870 dev_err(dev, "%s: unable to register CANdev\n", __func__);
1871 goto out_free_irq;
1874 dev_info(dev, "module %d: registered CAN device\n", pdata->modno);
1875 return 0;
1877 out_free_irq:
1878 napi_disable(&mod->napi);
1879 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1880 free_irq(mod->irq, mod);
1881 out_iounmap_ctrl:
1882 iounmap(mod->ctrl);
1883 out_iounmap_dpm:
1884 iounmap(mod->dpm);
1885 out_free_ndev:
1886 free_candev(ndev);
1887 out_return:
1888 return ret;
1891 static int ican3_remove(struct platform_device *pdev)
1893 struct net_device *ndev = platform_get_drvdata(pdev);
1894 struct ican3_dev *mod = netdev_priv(ndev);
1896 /* unregister the netdevice, stop interrupts */
1897 unregister_netdev(ndev);
1898 napi_disable(&mod->napi);
1899 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1900 free_irq(mod->irq, mod);
1902 /* put the module into reset */
1903 ican3_shutdown_module(mod);
1905 /* unmap all registers */
1906 iounmap(mod->ctrl);
1907 iounmap(mod->dpm);
1909 free_candev(ndev);
1911 return 0;
1914 static struct platform_driver ican3_driver = {
1915 .driver = {
1916 .name = DRV_NAME,
1917 .owner = THIS_MODULE,
1919 .probe = ican3_probe,
1920 .remove = ican3_remove,
1923 module_platform_driver(ican3_driver);
1925 MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
1926 MODULE_DESCRIPTION("Janz MODULbus VMOD-ICAN3 Driver");
1927 MODULE_LICENSE("GPL");
1928 MODULE_ALIAS("platform:janz-ican3");