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mfd: wm8350-i2c: Make sure the i2c regmap functions are compiled
[linux/fpc-iii.git] / drivers / net / usb / asix_devices.c
blob31e607afb1d07c3450db2ce7c6f2c735dd8bbdb2
1 /*
2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23 #include "asix.h"
24
25 #define PHY_MODE_MARVELL 0x0000
26 #define MII_MARVELL_LED_CTRL 0x0018
27 #define MII_MARVELL_STATUS 0x001b
28 #define MII_MARVELL_CTRL 0x0014
29
30 #define MARVELL_LED_MANUAL 0x0019
31
32 #define MARVELL_STATUS_HWCFG 0x0004
33
34 #define MARVELL_CTRL_TXDELAY 0x0002
35 #define MARVELL_CTRL_RXDELAY 0x0080
36
37 #define PHY_MODE_RTL8211CL 0x000C
38
39 struct ax88172_int_data {
40 __le16 res1;
41 u8 link;
42 __le16 res2;
43 u8 status;
44 __le16 res3;
45 } __packed;
46
47 static void asix_status(struct usbnet *dev, struct urb *urb)
48 {
49 struct ax88172_int_data *event;
50 int link;
51
52 if (urb->actual_length < 8)
53 return;
54
55 event = urb->transfer_buffer;
56 link = event->link & 0x01;
57 if (netif_carrier_ok(dev->net) != link) {
58 usbnet_link_change(dev, link, 1);
59 netdev_dbg(dev->net, "Link Status is: %d\n", link);
60 }
61 }
62
63 static void asix_set_netdev_dev_addr(struct usbnet *dev, u8 *addr)
64 {
65 if (is_valid_ether_addr(addr)) {
66 memcpy(dev->net->dev_addr, addr, ETH_ALEN);
67 } else {
68 netdev_info(dev->net, "invalid hw address, using random\n");
69 eth_hw_addr_random(dev->net);
70 }
71 }
72
73 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
74 static u32 asix_get_phyid(struct usbnet *dev)
75 {
76 int phy_reg;
77 u32 phy_id;
78 int i;
79
80 /* Poll for the rare case the FW or phy isn't ready yet. */
81 for (i = 0; i < 100; i++) {
82 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
83 if (phy_reg != 0 && phy_reg != 0xFFFF)
84 break;
85 mdelay(1);
86 }
87
88 if (phy_reg <= 0 || phy_reg == 0xFFFF)
89 return 0;
90
91 phy_id = (phy_reg & 0xffff) << 16;
92
93 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
94 if (phy_reg < 0)
95 return 0;
96
97 phy_id |= (phy_reg & 0xffff);
98
99 return phy_id;
100 }
101
102 static u32 asix_get_link(struct net_device *net)
103 {
104 struct usbnet *dev = netdev_priv(net);
105
106 return mii_link_ok(&dev->mii);
107 }
108
109 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
110 {
111 struct usbnet *dev = netdev_priv(net);
112
113 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
114 }
115
116 /* We need to override some ethtool_ops so we require our
117 own structure so we don't interfere with other usbnet
118 devices that may be connected at the same time. */
119 static const struct ethtool_ops ax88172_ethtool_ops = {
120 .get_drvinfo = asix_get_drvinfo,
121 .get_link = asix_get_link,
122 .get_msglevel = usbnet_get_msglevel,
123 .set_msglevel = usbnet_set_msglevel,
124 .get_wol = asix_get_wol,
125 .set_wol = asix_set_wol,
126 .get_eeprom_len = asix_get_eeprom_len,
127 .get_eeprom = asix_get_eeprom,
128 .set_eeprom = asix_set_eeprom,
129 .get_settings = usbnet_get_settings,
130 .set_settings = usbnet_set_settings,
131 .nway_reset = usbnet_nway_reset,
132 };
133
134 static void ax88172_set_multicast(struct net_device *net)
135 {
136 struct usbnet *dev = netdev_priv(net);
137 struct asix_data *data = (struct asix_data *)&dev->data;
138 u8 rx_ctl = 0x8c;
139
140 if (net->flags & IFF_PROMISC) {
141 rx_ctl |= 0x01;
142 } else if (net->flags & IFF_ALLMULTI ||
143 netdev_mc_count(net) > AX_MAX_MCAST) {
144 rx_ctl |= 0x02;
145 } else if (netdev_mc_empty(net)) {
146 /* just broadcast and directed */
147 } else {
148 /* We use the 20 byte dev->data
149 * for our 8 byte filter buffer
150 * to avoid allocating memory that
151 * is tricky to free later */
152 struct netdev_hw_addr *ha;
153 u32 crc_bits;
154
155 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
156
157 /* Build the multicast hash filter. */
158 netdev_for_each_mc_addr(ha, net) {
159 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
160 data->multi_filter[crc_bits >> 3] |=
161 1 << (crc_bits & 7);
162 }
163
164 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
165 AX_MCAST_FILTER_SIZE, data->multi_filter);
166
167 rx_ctl |= 0x10;
168 }
169
170 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
171 }
172
173 static int ax88172_link_reset(struct usbnet *dev)
174 {
175 u8 mode;
176 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
177
178 mii_check_media(&dev->mii, 1, 1);
179 mii_ethtool_gset(&dev->mii, &ecmd);
180 mode = AX88172_MEDIUM_DEFAULT;
181
182 if (ecmd.duplex != DUPLEX_FULL)
183 mode |= ~AX88172_MEDIUM_FD;
184
185 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
186 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
187
188 asix_write_medium_mode(dev, mode);
189
190 return 0;
191 }
192
193 static const struct net_device_ops ax88172_netdev_ops = {
194 .ndo_open = usbnet_open,
195 .ndo_stop = usbnet_stop,
196 .ndo_start_xmit = usbnet_start_xmit,
197 .ndo_tx_timeout = usbnet_tx_timeout,
198 .ndo_change_mtu = usbnet_change_mtu,
199 .ndo_set_mac_address = eth_mac_addr,
200 .ndo_validate_addr = eth_validate_addr,
201 .ndo_do_ioctl = asix_ioctl,
202 .ndo_set_rx_mode = ax88172_set_multicast,
203 };
204
205 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
206 {
207 int ret = 0;
208 u8 buf[ETH_ALEN];
209 int i;
210 unsigned long gpio_bits = dev->driver_info->data;
211
212 usbnet_get_endpoints(dev,intf);
213
214 /* Toggle the GPIOs in a manufacturer/model specific way */
215 for (i = 2; i >= 0; i--) {
216 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
217 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL);
218 if (ret < 0)
219 goto out;
220 msleep(5);
221 }
222
223 ret = asix_write_rx_ctl(dev, 0x80);
224 if (ret < 0)
225 goto out;
226
227 /* Get the MAC address */
228 ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
229 if (ret < 0) {
230 netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n",
231 ret);
232 goto out;
233 }
234
235 asix_set_netdev_dev_addr(dev, buf);
236
237 /* Initialize MII structure */
238 dev->mii.dev = dev->net;
239 dev->mii.mdio_read = asix_mdio_read;
240 dev->mii.mdio_write = asix_mdio_write;
241 dev->mii.phy_id_mask = 0x3f;
242 dev->mii.reg_num_mask = 0x1f;
243 dev->mii.phy_id = asix_get_phy_addr(dev);
244
245 dev->net->netdev_ops = &ax88172_netdev_ops;
246 dev->net->ethtool_ops = &ax88172_ethtool_ops;
247 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
248 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
249
250 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
251 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
252 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
253 mii_nway_restart(&dev->mii);
254
255 return 0;
256
257 out:
258 return ret;
259 }
260
261 static const struct ethtool_ops ax88772_ethtool_ops = {
262 .get_drvinfo = asix_get_drvinfo,
263 .get_link = asix_get_link,
264 .get_msglevel = usbnet_get_msglevel,
265 .set_msglevel = usbnet_set_msglevel,
266 .get_wol = asix_get_wol,
267 .set_wol = asix_set_wol,
268 .get_eeprom_len = asix_get_eeprom_len,
269 .get_eeprom = asix_get_eeprom,
270 .set_eeprom = asix_set_eeprom,
271 .get_settings = usbnet_get_settings,
272 .set_settings = usbnet_set_settings,
273 .nway_reset = usbnet_nway_reset,
274 };
275
276 static int ax88772_link_reset(struct usbnet *dev)
277 {
278 u16 mode;
279 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
280
281 mii_check_media(&dev->mii, 1, 1);
282 mii_ethtool_gset(&dev->mii, &ecmd);
283 mode = AX88772_MEDIUM_DEFAULT;
284
285 if (ethtool_cmd_speed(&ecmd) != SPEED_100)
286 mode &= ~AX_MEDIUM_PS;
287
288 if (ecmd.duplex != DUPLEX_FULL)
289 mode &= ~AX_MEDIUM_FD;
290
291 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
292 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
293
294 asix_write_medium_mode(dev, mode);
295
296 return 0;
297 }
298
299 static int ax88772_reset(struct usbnet *dev)
300 {
301 struct asix_data *data = (struct asix_data *)&dev->data;
302 int ret, embd_phy;
303 u16 rx_ctl;
304
305 ret = asix_write_gpio(dev,
306 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5);
307 if (ret < 0)
308 goto out;
309
310 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
311
312 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
313 if (ret < 0) {
314 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
315 goto out;
316 }
317
318 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
319 if (ret < 0)
320 goto out;
321
322 msleep(150);
323
324 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
325 if (ret < 0)
326 goto out;
327
328 msleep(150);
329
330 if (embd_phy) {
331 ret = asix_sw_reset(dev, AX_SWRESET_IPRL);
332 if (ret < 0)
333 goto out;
334 } else {
335 ret = asix_sw_reset(dev, AX_SWRESET_PRTE);
336 if (ret < 0)
337 goto out;
338 }
339
340 msleep(150);
341 rx_ctl = asix_read_rx_ctl(dev);
342 netdev_dbg(dev->net, "RX_CTL is 0x%04x after software reset\n", rx_ctl);
343 ret = asix_write_rx_ctl(dev, 0x0000);
344 if (ret < 0)
345 goto out;
346
347 rx_ctl = asix_read_rx_ctl(dev);
348 netdev_dbg(dev->net, "RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl);
349
350 ret = asix_sw_reset(dev, AX_SWRESET_PRL);
351 if (ret < 0)
352 goto out;
353
354 msleep(150);
355
356 ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL);
357 if (ret < 0)
358 goto out;
359
360 msleep(150);
361
362 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
363 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
364 ADVERTISE_ALL | ADVERTISE_CSMA);
365 mii_nway_restart(&dev->mii);
366
367 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT);
368 if (ret < 0)
369 goto out;
370
371 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
372 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
373 AX88772_IPG2_DEFAULT, 0, NULL);
374 if (ret < 0) {
375 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
376 goto out;
377 }
378
379 /* Rewrite MAC address */
380 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
381 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
382 data->mac_addr);
383 if (ret < 0)
384 goto out;
385
386 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
387 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
388 if (ret < 0)
389 goto out;
390
391 rx_ctl = asix_read_rx_ctl(dev);
392 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
393 rx_ctl);
394
395 rx_ctl = asix_read_medium_status(dev);
396 netdev_dbg(dev->net,
397 "Medium Status is 0x%04x after all initializations\n",
398 rx_ctl);
399
400 return 0;
401
402 out:
403 return ret;
404
405 }
406
407 static const struct net_device_ops ax88772_netdev_ops = {
408 .ndo_open = usbnet_open,
409 .ndo_stop = usbnet_stop,
410 .ndo_start_xmit = usbnet_start_xmit,
411 .ndo_tx_timeout = usbnet_tx_timeout,
412 .ndo_change_mtu = usbnet_change_mtu,
413 .ndo_set_mac_address = asix_set_mac_address,
414 .ndo_validate_addr = eth_validate_addr,
415 .ndo_do_ioctl = asix_ioctl,
416 .ndo_set_rx_mode = asix_set_multicast,
417 };
418
419 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
420 {
421 int ret, embd_phy, i;
422 u8 buf[ETH_ALEN];
423 u32 phyid;
424
425 usbnet_get_endpoints(dev,intf);
426
427 /* Get the MAC address */
428 if (dev->driver_info->data & FLAG_EEPROM_MAC) {
429 for (i = 0; i < (ETH_ALEN >> 1); i++) {
430 ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x04 + i,
431 0, 2, buf + i * 2);
432 if (ret < 0)
433 break;
434 }
435 } else {
436 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
437 0, 0, ETH_ALEN, buf);
438 }
439
440 if (ret < 0) {
441 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
442 return ret;
443 }
444
445 asix_set_netdev_dev_addr(dev, buf);
446
447 /* Initialize MII structure */
448 dev->mii.dev = dev->net;
449 dev->mii.mdio_read = asix_mdio_read;
450 dev->mii.mdio_write = asix_mdio_write;
451 dev->mii.phy_id_mask = 0x1f;
452 dev->mii.reg_num_mask = 0x1f;
453 dev->mii.phy_id = asix_get_phy_addr(dev);
454
455 dev->net->netdev_ops = &ax88772_netdev_ops;
456 dev->net->ethtool_ops = &ax88772_ethtool_ops;
457 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
458 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
459
460 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
461
462 /* Reset the PHY to normal operation mode */
463 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
464 if (ret < 0) {
465 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
466 return ret;
467 }
468
469 ax88772_reset(dev);
470
471 /* Read PHYID register *AFTER* the PHY was reset properly */
472 phyid = asix_get_phyid(dev);
473 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
474
475 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
476 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
477 /* hard_mtu is still the default - the device does not support
478 jumbo eth frames */
479 dev->rx_urb_size = 2048;
480 }
481
482 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
483 if (!dev->driver_priv)
484 return -ENOMEM;
485
486 return 0;
487 }
488
489 static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf)
490 {
491 if (dev->driver_priv)
492 kfree(dev->driver_priv);
493 }
494
495 static const struct ethtool_ops ax88178_ethtool_ops = {
496 .get_drvinfo = asix_get_drvinfo,
497 .get_link = asix_get_link,
498 .get_msglevel = usbnet_get_msglevel,
499 .set_msglevel = usbnet_set_msglevel,
500 .get_wol = asix_get_wol,
501 .set_wol = asix_set_wol,
502 .get_eeprom_len = asix_get_eeprom_len,
503 .get_eeprom = asix_get_eeprom,
504 .set_eeprom = asix_set_eeprom,
505 .get_settings = usbnet_get_settings,
506 .set_settings = usbnet_set_settings,
507 .nway_reset = usbnet_nway_reset,
508 };
509
510 static int marvell_phy_init(struct usbnet *dev)
511 {
512 struct asix_data *data = (struct asix_data *)&dev->data;
513 u16 reg;
514
515 netdev_dbg(dev->net, "marvell_phy_init()\n");
516
517 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
518 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
519
520 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
521 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
522
523 if (data->ledmode) {
524 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
525 MII_MARVELL_LED_CTRL);
526 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
527
528 reg &= 0xf8ff;
529 reg |= (1 + 0x0100);
530 asix_mdio_write(dev->net, dev->mii.phy_id,
531 MII_MARVELL_LED_CTRL, reg);
532
533 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
534 MII_MARVELL_LED_CTRL);
535 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
536 reg &= 0xfc0f;
537 }
538
539 return 0;
540 }
541
542 static int rtl8211cl_phy_init(struct usbnet *dev)
543 {
544 struct asix_data *data = (struct asix_data *)&dev->data;
545
546 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
547
548 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
549 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
550 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
551 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
552 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
553
554 if (data->ledmode == 12) {
555 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
556 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
557 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
558 }
559
560 return 0;
561 }
562
563 static int marvell_led_status(struct usbnet *dev, u16 speed)
564 {
565 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
566
567 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
568
569 /* Clear out the center LED bits - 0x03F0 */
570 reg &= 0xfc0f;
571
572 switch (speed) {
573 case SPEED_1000:
574 reg |= 0x03e0;
575 break;
576 case SPEED_100:
577 reg |= 0x03b0;
578 break;
579 default:
580 reg |= 0x02f0;
581 }
582
583 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
584 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
585
586 return 0;
587 }
588
589 static int ax88178_reset(struct usbnet *dev)
590 {
591 struct asix_data *data = (struct asix_data *)&dev->data;
592 int ret;
593 __le16 eeprom;
594 u8 status;
595 int gpio0 = 0;
596 u32 phyid;
597
598 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
599 netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status);
600
601 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
602 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
603 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
604
605 netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom);
606
607 if (eeprom == cpu_to_le16(0xffff)) {
608 data->phymode = PHY_MODE_MARVELL;
609 data->ledmode = 0;
610 gpio0 = 1;
611 } else {
612 data->phymode = le16_to_cpu(eeprom) & 0x7F;
613 data->ledmode = le16_to_cpu(eeprom) >> 8;
614 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
615 }
616 netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode);
617
618 /* Power up external GigaPHY through AX88178 GPIO pin */
619 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
620 if ((le16_to_cpu(eeprom) >> 8) != 1) {
621 asix_write_gpio(dev, 0x003c, 30);
622 asix_write_gpio(dev, 0x001c, 300);
623 asix_write_gpio(dev, 0x003c, 30);
624 } else {
625 netdev_dbg(dev->net, "gpio phymode == 1 path\n");
626 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
627 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
628 }
629
630 /* Read PHYID register *AFTER* powering up PHY */
631 phyid = asix_get_phyid(dev);
632 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
633
634 /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
635 asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL);
636
637 asix_sw_reset(dev, 0);
638 msleep(150);
639
640 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
641 msleep(150);
642
643 asix_write_rx_ctl(dev, 0);
644
645 if (data->phymode == PHY_MODE_MARVELL) {
646 marvell_phy_init(dev);
647 msleep(60);
648 } else if (data->phymode == PHY_MODE_RTL8211CL)
649 rtl8211cl_phy_init(dev);
650
651 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
652 BMCR_RESET | BMCR_ANENABLE);
653 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
654 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
655 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
656 ADVERTISE_1000FULL);
657
658 mii_nway_restart(&dev->mii);
659
660 ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT);
661 if (ret < 0)
662 return ret;
663
664 /* Rewrite MAC address */
665 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
666 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
667 data->mac_addr);
668 if (ret < 0)
669 return ret;
670
671 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
672 if (ret < 0)
673 return ret;
674
675 return 0;
676 }
677
678 static int ax88178_link_reset(struct usbnet *dev)
679 {
680 u16 mode;
681 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
682 struct asix_data *data = (struct asix_data *)&dev->data;
683 u32 speed;
684
685 netdev_dbg(dev->net, "ax88178_link_reset()\n");
686
687 mii_check_media(&dev->mii, 1, 1);
688 mii_ethtool_gset(&dev->mii, &ecmd);
689 mode = AX88178_MEDIUM_DEFAULT;
690 speed = ethtool_cmd_speed(&ecmd);
691
692 if (speed == SPEED_1000)
693 mode |= AX_MEDIUM_GM;
694 else if (speed == SPEED_100)
695 mode |= AX_MEDIUM_PS;
696 else
697 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
698
699 mode |= AX_MEDIUM_ENCK;
700
701 if (ecmd.duplex == DUPLEX_FULL)
702 mode |= AX_MEDIUM_FD;
703 else
704 mode &= ~AX_MEDIUM_FD;
705
706 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
707 speed, ecmd.duplex, mode);
708
709 asix_write_medium_mode(dev, mode);
710
711 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
712 marvell_led_status(dev, speed);
713
714 return 0;
715 }
716
717 static void ax88178_set_mfb(struct usbnet *dev)
718 {
719 u16 mfb = AX_RX_CTL_MFB_16384;
720 u16 rxctl;
721 u16 medium;
722 int old_rx_urb_size = dev->rx_urb_size;
723
724 if (dev->hard_mtu < 2048) {
725 dev->rx_urb_size = 2048;
726 mfb = AX_RX_CTL_MFB_2048;
727 } else if (dev->hard_mtu < 4096) {
728 dev->rx_urb_size = 4096;
729 mfb = AX_RX_CTL_MFB_4096;
730 } else if (dev->hard_mtu < 8192) {
731 dev->rx_urb_size = 8192;
732 mfb = AX_RX_CTL_MFB_8192;
733 } else if (dev->hard_mtu < 16384) {
734 dev->rx_urb_size = 16384;
735 mfb = AX_RX_CTL_MFB_16384;
736 }
737
738 rxctl = asix_read_rx_ctl(dev);
739 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
740
741 medium = asix_read_medium_status(dev);
742 if (dev->net->mtu > 1500)
743 medium |= AX_MEDIUM_JFE;
744 else
745 medium &= ~AX_MEDIUM_JFE;
746 asix_write_medium_mode(dev, medium);
747
748 if (dev->rx_urb_size > old_rx_urb_size)
749 usbnet_unlink_rx_urbs(dev);
750 }
751
752 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
753 {
754 struct usbnet *dev = netdev_priv(net);
755 int ll_mtu = new_mtu + net->hard_header_len + 4;
756
757 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
758
759 if (new_mtu <= 0 || ll_mtu > 16384)
760 return -EINVAL;
761
762 if ((ll_mtu % dev->maxpacket) == 0)
763 return -EDOM;
764
765 net->mtu = new_mtu;
766 dev->hard_mtu = net->mtu + net->hard_header_len;
767 ax88178_set_mfb(dev);
768
769 /* max qlen depend on hard_mtu and rx_urb_size */
770 usbnet_update_max_qlen(dev);
771
772 return 0;
773 }
774
775 static const struct net_device_ops ax88178_netdev_ops = {
776 .ndo_open = usbnet_open,
777 .ndo_stop = usbnet_stop,
778 .ndo_start_xmit = usbnet_start_xmit,
779 .ndo_tx_timeout = usbnet_tx_timeout,
780 .ndo_set_mac_address = asix_set_mac_address,
781 .ndo_validate_addr = eth_validate_addr,
782 .ndo_set_rx_mode = asix_set_multicast,
783 .ndo_do_ioctl = asix_ioctl,
784 .ndo_change_mtu = ax88178_change_mtu,
785 };
786
787 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
788 {
789 int ret;
790 u8 buf[ETH_ALEN];
791
792 usbnet_get_endpoints(dev,intf);
793
794 /* Get the MAC address */
795 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
796 if (ret < 0) {
797 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
798 return ret;
799 }
800
801 asix_set_netdev_dev_addr(dev, buf);
802
803 /* Initialize MII structure */
804 dev->mii.dev = dev->net;
805 dev->mii.mdio_read = asix_mdio_read;
806 dev->mii.mdio_write = asix_mdio_write;
807 dev->mii.phy_id_mask = 0x1f;
808 dev->mii.reg_num_mask = 0xff;
809 dev->mii.supports_gmii = 1;
810 dev->mii.phy_id = asix_get_phy_addr(dev);
811
812 dev->net->netdev_ops = &ax88178_netdev_ops;
813 dev->net->ethtool_ops = &ax88178_ethtool_ops;
814
815 /* Blink LEDS so users know driver saw dongle */
816 asix_sw_reset(dev, 0);
817 msleep(150);
818
819 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
820 msleep(150);
821
822 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
823 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
824 /* hard_mtu is still the default - the device does not support
825 jumbo eth frames */
826 dev->rx_urb_size = 2048;
827 }
828
829 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
830 if (!dev->driver_priv)
831 return -ENOMEM;
832
833 return 0;
834 }
835
836 static const struct driver_info ax8817x_info = {
837 .description = "ASIX AX8817x USB 2.0 Ethernet",
838 .bind = ax88172_bind,
839 .status = asix_status,
840 .link_reset = ax88172_link_reset,
841 .reset = ax88172_link_reset,
842 .flags = FLAG_ETHER | FLAG_LINK_INTR,
843 .data = 0x00130103,
844 };
845
846 static const struct driver_info dlink_dub_e100_info = {
847 .description = "DLink DUB-E100 USB Ethernet",
848 .bind = ax88172_bind,
849 .status = asix_status,
850 .link_reset = ax88172_link_reset,
851 .reset = ax88172_link_reset,
852 .flags = FLAG_ETHER | FLAG_LINK_INTR,
853 .data = 0x009f9d9f,
854 };
855
856 static const struct driver_info netgear_fa120_info = {
857 .description = "Netgear FA-120 USB Ethernet",
858 .bind = ax88172_bind,
859 .status = asix_status,
860 .link_reset = ax88172_link_reset,
861 .reset = ax88172_link_reset,
862 .flags = FLAG_ETHER | FLAG_LINK_INTR,
863 .data = 0x00130103,
864 };
865
866 static const struct driver_info hawking_uf200_info = {
867 .description = "Hawking UF200 USB Ethernet",
868 .bind = ax88172_bind,
869 .status = asix_status,
870 .link_reset = ax88172_link_reset,
871 .reset = ax88172_link_reset,
872 .flags = FLAG_ETHER | FLAG_LINK_INTR,
873 .data = 0x001f1d1f,
874 };
875
876 static const struct driver_info ax88772_info = {
877 .description = "ASIX AX88772 USB 2.0 Ethernet",
878 .bind = ax88772_bind,
879 .unbind = ax88772_unbind,
880 .status = asix_status,
881 .link_reset = ax88772_link_reset,
882 .reset = ax88772_link_reset,
883 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,
884 .rx_fixup = asix_rx_fixup_common,
885 .tx_fixup = asix_tx_fixup,
886 };
887
888 static const struct driver_info ax88772b_info = {
889 .description = "ASIX AX88772B USB 2.0 Ethernet",
890 .bind = ax88772_bind,
891 .unbind = ax88772_unbind,
892 .status = asix_status,
893 .link_reset = ax88772_link_reset,
894 .reset = ax88772_reset,
895 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
896 FLAG_MULTI_PACKET,
897 .rx_fixup = asix_rx_fixup_common,
898 .tx_fixup = asix_tx_fixup,
899 .data = FLAG_EEPROM_MAC,
900 };
901
902 static const struct driver_info ax88178_info = {
903 .description = "ASIX AX88178 USB 2.0 Ethernet",
904 .bind = ax88178_bind,
905 .unbind = ax88772_unbind,
906 .status = asix_status,
907 .link_reset = ax88178_link_reset,
908 .reset = ax88178_reset,
909 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
910 FLAG_MULTI_PACKET,
911 .rx_fixup = asix_rx_fixup_common,
912 .tx_fixup = asix_tx_fixup,
913 };
914
915 /*
916 * USBLINK 20F9 "USB 2.0 LAN" USB ethernet adapter, typically found in
917 * no-name packaging.
918 * USB device strings are:
919 * 1: Manufacturer: USBLINK
920 * 2: Product: HG20F9 USB2.0
921 * 3: Serial: 000003
922 * Appears to be compatible with Asix 88772B.
923 */
924 static const struct driver_info hg20f9_info = {
925 .description = "HG20F9 USB 2.0 Ethernet",
926 .bind = ax88772_bind,
927 .unbind = ax88772_unbind,
928 .status = asix_status,
929 .link_reset = ax88772_link_reset,
930 .reset = ax88772_reset,
931 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
932 FLAG_MULTI_PACKET,
933 .rx_fixup = asix_rx_fixup_common,
934 .tx_fixup = asix_tx_fixup,
935 .data = FLAG_EEPROM_MAC,
936 };
937
938 static const struct usb_device_id products [] = {
939 {
940 // Linksys USB200M
941 USB_DEVICE (0x077b, 0x2226),
942 .driver_info = (unsigned long) &ax8817x_info,
943 }, {
944 // Netgear FA120
945 USB_DEVICE (0x0846, 0x1040),
946 .driver_info = (unsigned long) &netgear_fa120_info,
947 }, {
948 // DLink DUB-E100
949 USB_DEVICE (0x2001, 0x1a00),
950 .driver_info = (unsigned long) &dlink_dub_e100_info,
951 }, {
952 // Intellinet, ST Lab USB Ethernet
953 USB_DEVICE (0x0b95, 0x1720),
954 .driver_info = (unsigned long) &ax8817x_info,
955 }, {
956 // Hawking UF200, TrendNet TU2-ET100
957 USB_DEVICE (0x07b8, 0x420a),
958 .driver_info = (unsigned long) &hawking_uf200_info,
959 }, {
960 // Billionton Systems, USB2AR
961 USB_DEVICE (0x08dd, 0x90ff),
962 .driver_info = (unsigned long) &ax8817x_info,
963 }, {
964 // ATEN UC210T
965 USB_DEVICE (0x0557, 0x2009),
966 .driver_info = (unsigned long) &ax8817x_info,
967 }, {
968 // Buffalo LUA-U2-KTX
969 USB_DEVICE (0x0411, 0x003d),
970 .driver_info = (unsigned long) &ax8817x_info,
971 }, {
972 // Buffalo LUA-U2-GT 10/100/1000
973 USB_DEVICE (0x0411, 0x006e),
974 .driver_info = (unsigned long) &ax88178_info,
975 }, {
976 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
977 USB_DEVICE (0x6189, 0x182d),
978 .driver_info = (unsigned long) &ax8817x_info,
979 }, {
980 // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
981 USB_DEVICE (0x0df6, 0x0056),
982 .driver_info = (unsigned long) &ax88178_info,
983 }, {
984 // corega FEther USB2-TX
985 USB_DEVICE (0x07aa, 0x0017),
986 .driver_info = (unsigned long) &ax8817x_info,
987 }, {
988 // Surecom EP-1427X-2
989 USB_DEVICE (0x1189, 0x0893),
990 .driver_info = (unsigned long) &ax8817x_info,
991 }, {
992 // goodway corp usb gwusb2e
993 USB_DEVICE (0x1631, 0x6200),
994 .driver_info = (unsigned long) &ax8817x_info,
995 }, {
996 // JVC MP-PRX1 Port Replicator
997 USB_DEVICE (0x04f1, 0x3008),
998 .driver_info = (unsigned long) &ax8817x_info,
999 }, {
1000 // Lenovo U2L100P 10/100
1001 USB_DEVICE (0x17ef, 0x7203),
1002 .driver_info = (unsigned long) &ax88772_info,
1003 }, {
1004 // ASIX AX88772B 10/100
1005 USB_DEVICE (0x0b95, 0x772b),
1006 .driver_info = (unsigned long) &ax88772b_info,
1007 }, {
1008 // ASIX AX88772 10/100
1009 USB_DEVICE (0x0b95, 0x7720),
1010 .driver_info = (unsigned long) &ax88772_info,
1011 }, {
1012 // ASIX AX88178 10/100/1000
1013 USB_DEVICE (0x0b95, 0x1780),
1014 .driver_info = (unsigned long) &ax88178_info,
1015 }, {
1016 // Logitec LAN-GTJ/U2A
1017 USB_DEVICE (0x0789, 0x0160),
1018 .driver_info = (unsigned long) &ax88178_info,
1019 }, {
1020 // Linksys USB200M Rev 2
1021 USB_DEVICE (0x13b1, 0x0018),
1022 .driver_info = (unsigned long) &ax88772_info,
1023 }, {
1024 // 0Q0 cable ethernet
1025 USB_DEVICE (0x1557, 0x7720),
1026 .driver_info = (unsigned long) &ax88772_info,
1027 }, {
1028 // DLink DUB-E100 H/W Ver B1
1029 USB_DEVICE (0x07d1, 0x3c05),
1030 .driver_info = (unsigned long) &ax88772_info,
1031 }, {
1032 // DLink DUB-E100 H/W Ver B1 Alternate
1033 USB_DEVICE (0x2001, 0x3c05),
1034 .driver_info = (unsigned long) &ax88772_info,
1035 }, {
1036 // DLink DUB-E100 H/W Ver C1
1037 USB_DEVICE (0x2001, 0x1a02),
1038 .driver_info = (unsigned long) &ax88772_info,
1039 }, {
1040 // Linksys USB1000
1041 USB_DEVICE (0x1737, 0x0039),
1042 .driver_info = (unsigned long) &ax88178_info,
1043 }, {
1044 // IO-DATA ETG-US2
1045 USB_DEVICE (0x04bb, 0x0930),
1046 .driver_info = (unsigned long) &ax88178_info,
1047 }, {
1048 // Belkin F5D5055
1049 USB_DEVICE(0x050d, 0x5055),
1050 .driver_info = (unsigned long) &ax88178_info,
1051 }, {
1052 // Apple USB Ethernet Adapter
1053 USB_DEVICE(0x05ac, 0x1402),
1054 .driver_info = (unsigned long) &ax88772_info,
1055 }, {
1056 // Cables-to-Go USB Ethernet Adapter
1057 USB_DEVICE(0x0b95, 0x772a),
1058 .driver_info = (unsigned long) &ax88772_info,
1059 }, {
1060 // ABOCOM for pci
1061 USB_DEVICE(0x14ea, 0xab11),
1062 .driver_info = (unsigned long) &ax88178_info,
1063 }, {
1064 // ASIX 88772a
1065 USB_DEVICE(0x0db0, 0xa877),
1066 .driver_info = (unsigned long) &ax88772_info,
1067 }, {
1068 // Asus USB Ethernet Adapter
1069 USB_DEVICE (0x0b95, 0x7e2b),
1070 .driver_info = (unsigned long) &ax88772_info,
1071 }, {
1072 /* ASIX 88172a demo board */
1073 USB_DEVICE(0x0b95, 0x172a),
1074 .driver_info = (unsigned long) &ax88172a_info,
1075 }, {
1076 /*
1077 * USBLINK HG20F9 "USB 2.0 LAN"
1078 * Appears to have gazumped Linksys's manufacturer ID but
1079 * doesn't (yet) conflict with any known Linksys product.
1080 */
1081 USB_DEVICE(0x066b, 0x20f9),
1082 .driver_info = (unsigned long) &hg20f9_info,
1083 },
1084 { }, // END
1085 };
1086 MODULE_DEVICE_TABLE(usb, products);
1087
1088 static struct usb_driver asix_driver = {
1089 .name = DRIVER_NAME,
1090 .id_table = products,
1091 .probe = usbnet_probe,
1092 .suspend = usbnet_suspend,
1093 .resume = usbnet_resume,
1094 .disconnect = usbnet_disconnect,
1095 .supports_autosuspend = 1,
1096 .disable_hub_initiated_lpm = 1,
1097 };
1098
1099 module_usb_driver(asix_driver);
1100
1101 MODULE_AUTHOR("David Hollis");
1102 MODULE_VERSION(DRIVER_VERSION);
1103 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1104 MODULE_LICENSE("GPL");
1105
Linux with added FPC-III support