mfd: wm8350-i2c: Make sure the i2c regmap functions are compiled
[linux/fpc-iii.git] / drivers / net / wireless / iwlwifi / iwl-nvm-parse.c
blob4a1cf1344fdbc416b843b1f300fcdb7e13831f8c
1 /******************************************************************************
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
6 * GPL LICENSE SUMMARY
8 * Copyright(c) 2008 - 2013 Intel Corporation. All rights reserved.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
24 * The full GNU General Public License is included in this distribution
25 * in the file called COPYING.
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 * BSD LICENSE
33 * Copyright(c) 2005 - 2013 Intel Corporation. All rights reserved.
34 * All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *****************************************************************************/
62 #include <linux/types.h>
63 #include <linux/slab.h>
64 #include <linux/export.h>
65 #include "iwl-drv.h"
66 #include "iwl-modparams.h"
67 #include "iwl-nvm-parse.h"
69 /* NVM offsets (in words) definitions */
70 enum wkp_nvm_offsets {
71 /* NVM HW-Section offset (in words) definitions */
72 HW_ADDR = 0x15,
74 /* NVM SW-Section offset (in words) definitions */
75 NVM_SW_SECTION = 0x1C0,
76 NVM_VERSION = 0,
77 RADIO_CFG = 1,
78 SKU = 2,
79 N_HW_ADDRS = 3,
80 NVM_CHANNELS = 0x1E0 - NVM_SW_SECTION,
82 /* NVM calibration section offset (in words) definitions */
83 NVM_CALIB_SECTION = 0x2B8,
84 XTAL_CALIB = 0x316 - NVM_CALIB_SECTION
87 /* SKU Capabilities (actual values from NVM definition) */
88 enum nvm_sku_bits {
89 NVM_SKU_CAP_BAND_24GHZ = BIT(0),
90 NVM_SKU_CAP_BAND_52GHZ = BIT(1),
91 NVM_SKU_CAP_11N_ENABLE = BIT(2),
92 NVM_SKU_CAP_11AC_ENABLE = BIT(3),
95 /* radio config bits (actual values from NVM definition) */
96 #define NVM_RF_CFG_DASH_MSK(x) (x & 0x3) /* bits 0-1 */
97 #define NVM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */
98 #define NVM_RF_CFG_TYPE_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */
99 #define NVM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */
100 #define NVM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */
101 #define NVM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */
104 * These are the channel numbers in the order that they are stored in the NVM
106 static const u8 iwl_nvm_channels[] = {
107 /* 2.4 GHz */
108 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
109 /* 5 GHz */
110 36, 40, 44 , 48, 52, 56, 60, 64,
111 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
112 149, 153, 157, 161, 165
115 #define IWL_NUM_CHANNELS ARRAY_SIZE(iwl_nvm_channels)
116 #define NUM_2GHZ_CHANNELS 14
117 #define FIRST_2GHZ_HT_MINUS 5
118 #define LAST_2GHZ_HT_PLUS 9
119 #define LAST_5GHZ_HT 161
121 #define DEFAULT_MAX_TX_POWER 16
123 /* rate data (static) */
124 static struct ieee80211_rate iwl_cfg80211_rates[] = {
125 { .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, },
126 { .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1,
127 .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
128 { .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2,
129 .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
130 { .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3,
131 .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
132 { .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, },
133 { .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, },
134 { .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, },
135 { .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, },
136 { .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, },
137 { .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, },
138 { .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, },
139 { .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, },
141 #define RATES_24_OFFS 0
142 #define N_RATES_24 ARRAY_SIZE(iwl_cfg80211_rates)
143 #define RATES_52_OFFS 4
144 #define N_RATES_52 (N_RATES_24 - RATES_52_OFFS)
147 * enum iwl_nvm_channel_flags - channel flags in NVM
148 * @NVM_CHANNEL_VALID: channel is usable for this SKU/geo
149 * @NVM_CHANNEL_IBSS: usable as an IBSS channel
150 * @NVM_CHANNEL_ACTIVE: active scanning allowed
151 * @NVM_CHANNEL_RADAR: radar detection required
152 * @NVM_CHANNEL_DFS: dynamic freq selection candidate
153 * @NVM_CHANNEL_WIDE: 20 MHz channel okay (?)
154 * @NVM_CHANNEL_40MHZ: 40 MHz channel okay (?)
155 * @NVM_CHANNEL_80MHZ: 80 MHz channel okay (?)
156 * @NVM_CHANNEL_160MHZ: 160 MHz channel okay (?)
158 enum iwl_nvm_channel_flags {
159 NVM_CHANNEL_VALID = BIT(0),
160 NVM_CHANNEL_IBSS = BIT(1),
161 NVM_CHANNEL_ACTIVE = BIT(3),
162 NVM_CHANNEL_RADAR = BIT(4),
163 NVM_CHANNEL_DFS = BIT(7),
164 NVM_CHANNEL_WIDE = BIT(8),
165 NVM_CHANNEL_40MHZ = BIT(9),
166 NVM_CHANNEL_80MHZ = BIT(10),
167 NVM_CHANNEL_160MHZ = BIT(11),
170 #define CHECK_AND_PRINT_I(x) \
171 ((ch_flags & NVM_CHANNEL_##x) ? # x " " : "")
173 static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
174 struct iwl_nvm_data *data,
175 const __le16 * const nvm_ch_flags)
177 int ch_idx;
178 int n_channels = 0;
179 struct ieee80211_channel *channel;
180 u16 ch_flags;
181 bool is_5ghz;
183 for (ch_idx = 0; ch_idx < IWL_NUM_CHANNELS; ch_idx++) {
184 ch_flags = __le16_to_cpup(nvm_ch_flags + ch_idx);
186 if (ch_idx >= NUM_2GHZ_CHANNELS &&
187 !data->sku_cap_band_52GHz_enable)
188 ch_flags &= ~NVM_CHANNEL_VALID;
190 if (!(ch_flags & NVM_CHANNEL_VALID)) {
191 IWL_DEBUG_EEPROM(dev,
192 "Ch. %d Flags %x [%sGHz] - No traffic\n",
193 iwl_nvm_channels[ch_idx],
194 ch_flags,
195 (ch_idx >= NUM_2GHZ_CHANNELS) ?
196 "5.2" : "2.4");
197 continue;
200 channel = &data->channels[n_channels];
201 n_channels++;
203 channel->hw_value = iwl_nvm_channels[ch_idx];
204 channel->band = (ch_idx < NUM_2GHZ_CHANNELS) ?
205 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
206 channel->center_freq =
207 ieee80211_channel_to_frequency(
208 channel->hw_value, channel->band);
210 /* TODO: Need to be dependent to the NVM */
211 channel->flags = IEEE80211_CHAN_NO_HT40;
212 if (ch_idx < NUM_2GHZ_CHANNELS &&
213 (ch_flags & NVM_CHANNEL_40MHZ)) {
214 if (iwl_nvm_channels[ch_idx] <= LAST_2GHZ_HT_PLUS)
215 channel->flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
216 if (iwl_nvm_channels[ch_idx] >= FIRST_2GHZ_HT_MINUS)
217 channel->flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
218 } else if (iwl_nvm_channels[ch_idx] <= LAST_5GHZ_HT &&
219 (ch_flags & NVM_CHANNEL_40MHZ)) {
220 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
221 channel->flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
222 else
223 channel->flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
225 if (!(ch_flags & NVM_CHANNEL_80MHZ))
226 channel->flags |= IEEE80211_CHAN_NO_80MHZ;
227 if (!(ch_flags & NVM_CHANNEL_160MHZ))
228 channel->flags |= IEEE80211_CHAN_NO_160MHZ;
230 if (!(ch_flags & NVM_CHANNEL_IBSS))
231 channel->flags |= IEEE80211_CHAN_NO_IBSS;
233 if (!(ch_flags & NVM_CHANNEL_ACTIVE))
234 channel->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
236 if (ch_flags & NVM_CHANNEL_RADAR)
237 channel->flags |= IEEE80211_CHAN_RADAR;
239 /* Initialize regulatory-based run-time data */
242 * Default value - highest tx power value. max_power
243 * is not used in mvm, and is used for backwards compatibility
245 channel->max_power = DEFAULT_MAX_TX_POWER;
246 is_5ghz = channel->band == IEEE80211_BAND_5GHZ;
247 IWL_DEBUG_EEPROM(dev,
248 "Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm): Ad-Hoc %ssupported\n",
249 channel->hw_value,
250 is_5ghz ? "5.2" : "2.4",
251 CHECK_AND_PRINT_I(VALID),
252 CHECK_AND_PRINT_I(IBSS),
253 CHECK_AND_PRINT_I(ACTIVE),
254 CHECK_AND_PRINT_I(RADAR),
255 CHECK_AND_PRINT_I(WIDE),
256 CHECK_AND_PRINT_I(DFS),
257 ch_flags,
258 channel->max_power,
259 ((ch_flags & NVM_CHANNEL_IBSS) &&
260 !(ch_flags & NVM_CHANNEL_RADAR))
261 ? "" : "not ");
264 return n_channels;
267 static void iwl_init_vht_hw_capab(const struct iwl_cfg *cfg,
268 struct iwl_nvm_data *data,
269 struct ieee80211_sta_vht_cap *vht_cap)
271 vht_cap->vht_supported = true;
273 vht_cap->cap = IEEE80211_VHT_CAP_SHORT_GI_80 |
274 IEEE80211_VHT_CAP_RXSTBC_1 |
275 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
276 7 << IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT;
278 if (iwlwifi_mod_params.amsdu_size_8K)
279 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
281 vht_cap->vht_mcs.rx_mcs_map =
282 cpu_to_le16(IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
283 IEEE80211_VHT_MCS_SUPPORT_0_9 << 2 |
284 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
285 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
286 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
287 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
288 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
289 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14);
291 if (data->valid_rx_ant == 1 || cfg->rx_with_siso_diversity) {
292 vht_cap->cap |= IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN |
293 IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN;
294 /* this works because NOT_SUPPORTED == 3 */
295 vht_cap->vht_mcs.rx_mcs_map |=
296 cpu_to_le16(IEEE80211_VHT_MCS_NOT_SUPPORTED << 2);
299 vht_cap->vht_mcs.tx_mcs_map = vht_cap->vht_mcs.rx_mcs_map;
302 static void iwl_init_sbands(struct device *dev, const struct iwl_cfg *cfg,
303 struct iwl_nvm_data *data, const __le16 *nvm_sw,
304 bool enable_vht, u8 tx_chains, u8 rx_chains)
306 int n_channels = iwl_init_channel_map(dev, cfg, data,
307 &nvm_sw[NVM_CHANNELS]);
308 int n_used = 0;
309 struct ieee80211_supported_band *sband;
311 sband = &data->bands[IEEE80211_BAND_2GHZ];
312 sband->band = IEEE80211_BAND_2GHZ;
313 sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS];
314 sband->n_bitrates = N_RATES_24;
315 n_used += iwl_init_sband_channels(data, sband, n_channels,
316 IEEE80211_BAND_2GHZ);
317 iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, IEEE80211_BAND_2GHZ,
318 tx_chains, rx_chains);
320 sband = &data->bands[IEEE80211_BAND_5GHZ];
321 sband->band = IEEE80211_BAND_5GHZ;
322 sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
323 sband->n_bitrates = N_RATES_52;
324 n_used += iwl_init_sband_channels(data, sband, n_channels,
325 IEEE80211_BAND_5GHZ);
326 iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, IEEE80211_BAND_5GHZ,
327 tx_chains, rx_chains);
328 if (enable_vht)
329 iwl_init_vht_hw_capab(cfg, data, &sband->vht_cap);
331 if (n_channels != n_used)
332 IWL_ERR_DEV(dev, "NVM: used only %d of %d channels\n",
333 n_used, n_channels);
336 struct iwl_nvm_data *
337 iwl_parse_nvm_data(struct device *dev, const struct iwl_cfg *cfg,
338 const __le16 *nvm_hw, const __le16 *nvm_sw,
339 const __le16 *nvm_calib, u8 tx_chains, u8 rx_chains)
341 struct iwl_nvm_data *data;
342 u8 hw_addr[ETH_ALEN];
343 u16 radio_cfg, sku;
345 data = kzalloc(sizeof(*data) +
346 sizeof(struct ieee80211_channel) * IWL_NUM_CHANNELS,
347 GFP_KERNEL);
348 if (!data)
349 return NULL;
351 data->nvm_version = le16_to_cpup(nvm_sw + NVM_VERSION);
353 radio_cfg = le16_to_cpup(nvm_sw + RADIO_CFG);
354 data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg);
355 data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg);
356 data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg);
357 data->radio_cfg_pnum = NVM_RF_CFG_PNUM_MSK(radio_cfg);
358 data->valid_tx_ant = NVM_RF_CFG_TX_ANT_MSK(radio_cfg);
359 data->valid_rx_ant = NVM_RF_CFG_RX_ANT_MSK(radio_cfg);
361 sku = le16_to_cpup(nvm_sw + SKU);
362 data->sku_cap_band_24GHz_enable = sku & NVM_SKU_CAP_BAND_24GHZ;
363 data->sku_cap_band_52GHz_enable = sku & NVM_SKU_CAP_BAND_52GHZ;
364 data->sku_cap_11n_enable = sku & NVM_SKU_CAP_11N_ENABLE;
365 if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL)
366 data->sku_cap_11n_enable = false;
368 /* check overrides (some devices have wrong NVM) */
369 if (cfg->valid_tx_ant)
370 data->valid_tx_ant = cfg->valid_tx_ant;
371 if (cfg->valid_rx_ant)
372 data->valid_rx_ant = cfg->valid_rx_ant;
374 if (!data->valid_tx_ant || !data->valid_rx_ant) {
375 IWL_ERR_DEV(dev, "invalid antennas (0x%x, 0x%x)\n",
376 data->valid_tx_ant, data->valid_rx_ant);
377 kfree(data);
378 return NULL;
381 data->n_hw_addrs = le16_to_cpup(nvm_sw + N_HW_ADDRS);
383 data->xtal_calib[0] = *(nvm_calib + XTAL_CALIB);
384 data->xtal_calib[1] = *(nvm_calib + XTAL_CALIB + 1);
386 /* The byte order is little endian 16 bit, meaning 214365 */
387 memcpy(hw_addr, nvm_hw + HW_ADDR, ETH_ALEN);
388 data->hw_addr[0] = hw_addr[1];
389 data->hw_addr[1] = hw_addr[0];
390 data->hw_addr[2] = hw_addr[3];
391 data->hw_addr[3] = hw_addr[2];
392 data->hw_addr[4] = hw_addr[5];
393 data->hw_addr[5] = hw_addr[4];
395 iwl_init_sbands(dev, cfg, data, nvm_sw, sku & NVM_SKU_CAP_11AC_ENABLE,
396 tx_chains, rx_chains);
398 data->calib_version = 255; /* TODO:
399 this value will prevent some checks from
400 failing, we need to check if this
401 field is still needed, and if it does,
402 where is it in the NVM*/
404 return data;
406 IWL_EXPORT_SYMBOL(iwl_parse_nvm_data);