mfd: wm8350-i2c: Make sure the i2c regmap functions are compiled
[linux/fpc-iii.git] / drivers / regulator / lp3972.c
blob093e6f44ff8a3e0d9f17eb6cd0001c36d5911b37
1 /*
2 * Regulator driver for National Semiconductors LP3972 PMIC chip
4 * Based on lp3971.c
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
12 #include <linux/bug.h>
13 #include <linux/err.h>
14 #include <linux/i2c.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/regulator/driver.h>
18 #include <linux/regulator/lp3972.h>
19 #include <linux/slab.h>
21 struct lp3972 {
22 struct device *dev;
23 struct mutex io_lock;
24 struct i2c_client *i2c;
25 int num_regulators;
26 struct regulator_dev **rdev;
29 /* LP3972 Control Registers */
30 #define LP3972_SCR_REG 0x07
31 #define LP3972_OVER1_REG 0x10
32 #define LP3972_OVSR1_REG 0x11
33 #define LP3972_OVER2_REG 0x12
34 #define LP3972_OVSR2_REG 0x13
35 #define LP3972_VCC1_REG 0x20
36 #define LP3972_ADTV1_REG 0x23
37 #define LP3972_ADTV2_REG 0x24
38 #define LP3972_AVRC_REG 0x25
39 #define LP3972_CDTC1_REG 0x26
40 #define LP3972_CDTC2_REG 0x27
41 #define LP3972_SDTV1_REG 0x29
42 #define LP3972_SDTV2_REG 0x2A
43 #define LP3972_MDTV1_REG 0x32
44 #define LP3972_MDTV2_REG 0x33
45 #define LP3972_L2VCR_REG 0x39
46 #define LP3972_L34VCR_REG 0x3A
47 #define LP3972_SCR1_REG 0x80
48 #define LP3972_SCR2_REG 0x81
49 #define LP3972_OEN3_REG 0x82
50 #define LP3972_OSR3_REG 0x83
51 #define LP3972_LOER4_REG 0x84
52 #define LP3972_B2TV_REG 0x85
53 #define LP3972_B3TV_REG 0x86
54 #define LP3972_B32RC_REG 0x87
55 #define LP3972_ISRA_REG 0x88
56 #define LP3972_BCCR_REG 0x89
57 #define LP3972_II1RR_REG 0x8E
58 #define LP3972_II2RR_REG 0x8F
60 #define LP3972_SYS_CONTROL1_REG LP3972_SCR1_REG
61 /* System control register 1 initial value,
62 * bits 5, 6 and 7 are EPROM programmable */
63 #define SYS_CONTROL1_INIT_VAL 0x02
64 #define SYS_CONTROL1_INIT_MASK 0x1F
66 #define LP3972_VOL_CHANGE_REG LP3972_VCC1_REG
67 #define LP3972_VOL_CHANGE_FLAG_GO 0x01
68 #define LP3972_VOL_CHANGE_FLAG_MASK 0x03
70 /* LDO output enable mask */
71 #define LP3972_OEN3_L1EN BIT(0)
72 #define LP3972_OVER2_LDO2_EN BIT(2)
73 #define LP3972_OVER2_LDO3_EN BIT(3)
74 #define LP3972_OVER2_LDO4_EN BIT(4)
75 #define LP3972_OVER1_S_EN BIT(2)
77 static const unsigned int ldo1_voltage_map[] = {
78 1700000, 1725000, 1750000, 1775000, 1800000, 1825000, 1850000, 1875000,
79 1900000, 1925000, 1950000, 1975000, 2000000,
82 static const unsigned int ldo23_voltage_map[] = {
83 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000,
84 2600000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000,
87 static const unsigned int ldo4_voltage_map[] = {
88 1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000, 1350000,
89 1400000, 1500000, 1800000, 1900000, 2500000, 2800000, 3000000, 3300000,
92 static const unsigned int ldo5_voltage_map[] = {
93 0, 0, 0, 0, 0, 850000, 875000, 900000,
94 925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000,
95 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000,
96 1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000,
99 static const unsigned int buck1_voltage_map[] = {
100 725000, 750000, 775000, 800000, 825000, 850000, 875000, 900000,
101 925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000,
102 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000,
103 1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000,
106 static const unsigned int buck23_voltage_map[] = {
107 0, 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000,
108 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000,
109 1550000, 1600000, 1650000, 1700000, 1800000, 1900000, 2500000, 2800000,
110 3000000, 3300000,
113 static const int ldo_output_enable_mask[] = {
114 LP3972_OEN3_L1EN,
115 LP3972_OVER2_LDO2_EN,
116 LP3972_OVER2_LDO3_EN,
117 LP3972_OVER2_LDO4_EN,
118 LP3972_OVER1_S_EN,
121 static const int ldo_output_enable_addr[] = {
122 LP3972_OEN3_REG,
123 LP3972_OVER2_REG,
124 LP3972_OVER2_REG,
125 LP3972_OVER2_REG,
126 LP3972_OVER1_REG,
129 static const int ldo_vol_ctl_addr[] = {
130 LP3972_MDTV1_REG,
131 LP3972_L2VCR_REG,
132 LP3972_L34VCR_REG,
133 LP3972_L34VCR_REG,
134 LP3972_SDTV1_REG,
137 static const int buck_vol_enable_addr[] = {
138 LP3972_OVER1_REG,
139 LP3972_OEN3_REG,
140 LP3972_OEN3_REG,
143 static const int buck_base_addr[] = {
144 LP3972_ADTV1_REG,
145 LP3972_B2TV_REG,
146 LP3972_B3TV_REG,
149 #define LP3972_LDO_OUTPUT_ENABLE_MASK(x) (ldo_output_enable_mask[x])
150 #define LP3972_LDO_OUTPUT_ENABLE_REG(x) (ldo_output_enable_addr[x])
152 /* LDO voltage control registers shift:
153 LP3972_LDO1 -> 0, LP3972_LDO2 -> 4
154 LP3972_LDO3 -> 0, LP3972_LDO4 -> 4
155 LP3972_LDO5 -> 0
157 #define LP3972_LDO_VOL_CONTR_SHIFT(x) (((x) & 1) << 2)
158 #define LP3972_LDO_VOL_CONTR_REG(x) (ldo_vol_ctl_addr[x])
159 #define LP3972_LDO_VOL_CHANGE_SHIFT(x) ((x) ? 4 : 6)
161 #define LP3972_LDO_VOL_MASK(x) (((x) % 4) ? 0x0f : 0x1f)
162 #define LP3972_LDO_VOL_MIN_IDX(x) (((x) == 4) ? 0x05 : 0x00)
163 #define LP3972_LDO_VOL_MAX_IDX(x) ((x) ? (((x) == 4) ? 0x1f : 0x0f) : 0x0c)
165 #define LP3972_BUCK_VOL_ENABLE_REG(x) (buck_vol_enable_addr[x])
166 #define LP3972_BUCK_VOL1_REG(x) (buck_base_addr[x])
167 #define LP3972_BUCK_VOL_MASK 0x1f
169 static int lp3972_i2c_read(struct i2c_client *i2c, char reg, int count,
170 u16 *dest)
172 int ret;
174 if (count != 1)
175 return -EIO;
176 ret = i2c_smbus_read_byte_data(i2c, reg);
177 if (ret < 0)
178 return ret;
180 *dest = ret;
181 return 0;
184 static int lp3972_i2c_write(struct i2c_client *i2c, char reg, int count,
185 const u16 *src)
187 if (count != 1)
188 return -EIO;
189 return i2c_smbus_write_byte_data(i2c, reg, *src);
192 static u8 lp3972_reg_read(struct lp3972 *lp3972, u8 reg)
194 u16 val = 0;
196 mutex_lock(&lp3972->io_lock);
198 lp3972_i2c_read(lp3972->i2c, reg, 1, &val);
200 dev_dbg(lp3972->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg,
201 (unsigned)val & 0xff);
203 mutex_unlock(&lp3972->io_lock);
205 return val & 0xff;
208 static int lp3972_set_bits(struct lp3972 *lp3972, u8 reg, u16 mask, u16 val)
210 u16 tmp;
211 int ret;
213 mutex_lock(&lp3972->io_lock);
215 ret = lp3972_i2c_read(lp3972->i2c, reg, 1, &tmp);
216 tmp = (tmp & ~mask) | val;
217 if (ret == 0) {
218 ret = lp3972_i2c_write(lp3972->i2c, reg, 1, &tmp);
219 dev_dbg(lp3972->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg,
220 (unsigned)val & 0xff);
222 mutex_unlock(&lp3972->io_lock);
224 return ret;
227 static int lp3972_ldo_is_enabled(struct regulator_dev *dev)
229 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
230 int ldo = rdev_get_id(dev) - LP3972_LDO1;
231 u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
232 u16 val;
234 val = lp3972_reg_read(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo));
235 return !!(val & mask);
238 static int lp3972_ldo_enable(struct regulator_dev *dev)
240 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
241 int ldo = rdev_get_id(dev) - LP3972_LDO1;
242 u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
244 return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
245 mask, mask);
248 static int lp3972_ldo_disable(struct regulator_dev *dev)
250 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
251 int ldo = rdev_get_id(dev) - LP3972_LDO1;
252 u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
254 return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
255 mask, 0);
258 static int lp3972_ldo_get_voltage_sel(struct regulator_dev *dev)
260 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
261 int ldo = rdev_get_id(dev) - LP3972_LDO1;
262 u16 mask = LP3972_LDO_VOL_MASK(ldo);
263 u16 val, reg;
265 reg = lp3972_reg_read(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo));
266 val = (reg >> LP3972_LDO_VOL_CONTR_SHIFT(ldo)) & mask;
268 return val;
271 static int lp3972_ldo_set_voltage_sel(struct regulator_dev *dev,
272 unsigned int selector)
274 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
275 int ldo = rdev_get_id(dev) - LP3972_LDO1;
276 int shift, ret;
278 shift = LP3972_LDO_VOL_CONTR_SHIFT(ldo);
279 ret = lp3972_set_bits(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo),
280 LP3972_LDO_VOL_MASK(ldo) << shift, selector << shift);
282 if (ret)
283 return ret;
286 * LDO1 and LDO5 support voltage control by either target voltage1
287 * or target voltage2 register.
288 * We use target voltage1 register for LDO1 and LDO5 in this driver.
289 * We need to update voltage change control register(0x20) to enable
290 * LDO1 and LDO5 to change to their programmed target values.
292 switch (ldo) {
293 case LP3972_LDO1:
294 case LP3972_LDO5:
295 shift = LP3972_LDO_VOL_CHANGE_SHIFT(ldo);
296 ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
297 LP3972_VOL_CHANGE_FLAG_MASK << shift,
298 LP3972_VOL_CHANGE_FLAG_GO << shift);
299 if (ret)
300 return ret;
302 ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
303 LP3972_VOL_CHANGE_FLAG_MASK << shift, 0);
304 break;
307 return ret;
310 static struct regulator_ops lp3972_ldo_ops = {
311 .list_voltage = regulator_list_voltage_table,
312 .map_voltage = regulator_map_voltage_ascend,
313 .is_enabled = lp3972_ldo_is_enabled,
314 .enable = lp3972_ldo_enable,
315 .disable = lp3972_ldo_disable,
316 .get_voltage_sel = lp3972_ldo_get_voltage_sel,
317 .set_voltage_sel = lp3972_ldo_set_voltage_sel,
320 static int lp3972_dcdc_is_enabled(struct regulator_dev *dev)
322 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
323 int buck = rdev_get_id(dev) - LP3972_DCDC1;
324 u16 mask = 1 << (buck * 2);
325 u16 val;
327 val = lp3972_reg_read(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck));
328 return !!(val & mask);
331 static int lp3972_dcdc_enable(struct regulator_dev *dev)
333 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
334 int buck = rdev_get_id(dev) - LP3972_DCDC1;
335 u16 mask = 1 << (buck * 2);
336 u16 val;
338 val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
339 mask, mask);
340 return val;
343 static int lp3972_dcdc_disable(struct regulator_dev *dev)
345 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
346 int buck = rdev_get_id(dev) - LP3972_DCDC1;
347 u16 mask = 1 << (buck * 2);
348 u16 val;
350 val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
351 mask, 0);
352 return val;
355 static int lp3972_dcdc_get_voltage_sel(struct regulator_dev *dev)
357 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
358 int buck = rdev_get_id(dev) - LP3972_DCDC1;
359 u16 reg;
361 reg = lp3972_reg_read(lp3972, LP3972_BUCK_VOL1_REG(buck));
362 reg &= LP3972_BUCK_VOL_MASK;
364 return reg;
367 static int lp3972_dcdc_set_voltage_sel(struct regulator_dev *dev,
368 unsigned int selector)
370 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
371 int buck = rdev_get_id(dev) - LP3972_DCDC1;
372 int ret;
374 ret = lp3972_set_bits(lp3972, LP3972_BUCK_VOL1_REG(buck),
375 LP3972_BUCK_VOL_MASK, selector);
376 if (ret)
377 return ret;
379 if (buck != 0)
380 return ret;
382 ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
383 LP3972_VOL_CHANGE_FLAG_MASK, LP3972_VOL_CHANGE_FLAG_GO);
384 if (ret)
385 return ret;
387 return lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
388 LP3972_VOL_CHANGE_FLAG_MASK, 0);
391 static struct regulator_ops lp3972_dcdc_ops = {
392 .list_voltage = regulator_list_voltage_table,
393 .map_voltage = regulator_map_voltage_ascend,
394 .is_enabled = lp3972_dcdc_is_enabled,
395 .enable = lp3972_dcdc_enable,
396 .disable = lp3972_dcdc_disable,
397 .get_voltage_sel = lp3972_dcdc_get_voltage_sel,
398 .set_voltage_sel = lp3972_dcdc_set_voltage_sel,
401 static const struct regulator_desc regulators[] = {
403 .name = "LDO1",
404 .id = LP3972_LDO1,
405 .ops = &lp3972_ldo_ops,
406 .n_voltages = ARRAY_SIZE(ldo1_voltage_map),
407 .volt_table = ldo1_voltage_map,
408 .type = REGULATOR_VOLTAGE,
409 .owner = THIS_MODULE,
412 .name = "LDO2",
413 .id = LP3972_LDO2,
414 .ops = &lp3972_ldo_ops,
415 .n_voltages = ARRAY_SIZE(ldo23_voltage_map),
416 .volt_table = ldo23_voltage_map,
417 .type = REGULATOR_VOLTAGE,
418 .owner = THIS_MODULE,
421 .name = "LDO3",
422 .id = LP3972_LDO3,
423 .ops = &lp3972_ldo_ops,
424 .n_voltages = ARRAY_SIZE(ldo23_voltage_map),
425 .volt_table = ldo23_voltage_map,
426 .type = REGULATOR_VOLTAGE,
427 .owner = THIS_MODULE,
430 .name = "LDO4",
431 .id = LP3972_LDO4,
432 .ops = &lp3972_ldo_ops,
433 .n_voltages = ARRAY_SIZE(ldo4_voltage_map),
434 .volt_table = ldo4_voltage_map,
435 .type = REGULATOR_VOLTAGE,
436 .owner = THIS_MODULE,
439 .name = "LDO5",
440 .id = LP3972_LDO5,
441 .ops = &lp3972_ldo_ops,
442 .n_voltages = ARRAY_SIZE(ldo5_voltage_map),
443 .volt_table = ldo5_voltage_map,
444 .type = REGULATOR_VOLTAGE,
445 .owner = THIS_MODULE,
448 .name = "DCDC1",
449 .id = LP3972_DCDC1,
450 .ops = &lp3972_dcdc_ops,
451 .n_voltages = ARRAY_SIZE(buck1_voltage_map),
452 .volt_table = buck1_voltage_map,
453 .type = REGULATOR_VOLTAGE,
454 .owner = THIS_MODULE,
457 .name = "DCDC2",
458 .id = LP3972_DCDC2,
459 .ops = &lp3972_dcdc_ops,
460 .n_voltages = ARRAY_SIZE(buck23_voltage_map),
461 .volt_table = buck23_voltage_map,
462 .type = REGULATOR_VOLTAGE,
463 .owner = THIS_MODULE,
466 .name = "DCDC3",
467 .id = LP3972_DCDC3,
468 .ops = &lp3972_dcdc_ops,
469 .n_voltages = ARRAY_SIZE(buck23_voltage_map),
470 .volt_table = buck23_voltage_map,
471 .type = REGULATOR_VOLTAGE,
472 .owner = THIS_MODULE,
476 static int setup_regulators(struct lp3972 *lp3972,
477 struct lp3972_platform_data *pdata)
479 int i, err;
481 lp3972->num_regulators = pdata->num_regulators;
482 lp3972->rdev = kcalloc(pdata->num_regulators,
483 sizeof(struct regulator_dev *), GFP_KERNEL);
484 if (!lp3972->rdev) {
485 err = -ENOMEM;
486 goto err_nomem;
489 /* Instantiate the regulators */
490 for (i = 0; i < pdata->num_regulators; i++) {
491 struct lp3972_regulator_subdev *reg = &pdata->regulators[i];
492 struct regulator_config config = { };
494 config.dev = lp3972->dev;
495 config.init_data = reg->initdata;
496 config.driver_data = lp3972;
498 lp3972->rdev[i] = regulator_register(&regulators[reg->id],
499 &config);
500 if (IS_ERR(lp3972->rdev[i])) {
501 err = PTR_ERR(lp3972->rdev[i]);
502 dev_err(lp3972->dev, "regulator init failed: %d\n",
503 err);
504 goto error;
508 return 0;
509 error:
510 while (--i >= 0)
511 regulator_unregister(lp3972->rdev[i]);
512 kfree(lp3972->rdev);
513 lp3972->rdev = NULL;
514 err_nomem:
515 return err;
518 static int lp3972_i2c_probe(struct i2c_client *i2c,
519 const struct i2c_device_id *id)
521 struct lp3972 *lp3972;
522 struct lp3972_platform_data *pdata = dev_get_platdata(&i2c->dev);
523 int ret;
524 u16 val;
526 if (!pdata) {
527 dev_dbg(&i2c->dev, "No platform init data supplied\n");
528 return -ENODEV;
531 lp3972 = devm_kzalloc(&i2c->dev, sizeof(struct lp3972), GFP_KERNEL);
532 if (!lp3972)
533 return -ENOMEM;
535 lp3972->i2c = i2c;
536 lp3972->dev = &i2c->dev;
538 mutex_init(&lp3972->io_lock);
540 /* Detect LP3972 */
541 ret = lp3972_i2c_read(i2c, LP3972_SYS_CONTROL1_REG, 1, &val);
542 if (ret == 0 &&
543 (val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) {
544 ret = -ENODEV;
545 dev_err(&i2c->dev, "chip reported: val = 0x%x\n", val);
547 if (ret < 0) {
548 dev_err(&i2c->dev, "failed to detect device. ret = %d\n", ret);
549 return ret;
552 ret = setup_regulators(lp3972, pdata);
553 if (ret < 0)
554 return ret;
556 i2c_set_clientdata(i2c, lp3972);
557 return 0;
560 static int lp3972_i2c_remove(struct i2c_client *i2c)
562 struct lp3972 *lp3972 = i2c_get_clientdata(i2c);
563 int i;
565 for (i = 0; i < lp3972->num_regulators; i++)
566 regulator_unregister(lp3972->rdev[i]);
567 kfree(lp3972->rdev);
569 return 0;
572 static const struct i2c_device_id lp3972_i2c_id[] = {
573 { "lp3972", 0 },
576 MODULE_DEVICE_TABLE(i2c, lp3972_i2c_id);
578 static struct i2c_driver lp3972_i2c_driver = {
579 .driver = {
580 .name = "lp3972",
581 .owner = THIS_MODULE,
583 .probe = lp3972_i2c_probe,
584 .remove = lp3972_i2c_remove,
585 .id_table = lp3972_i2c_id,
588 static int __init lp3972_module_init(void)
590 return i2c_add_driver(&lp3972_i2c_driver);
592 subsys_initcall(lp3972_module_init);
594 static void __exit lp3972_module_exit(void)
596 i2c_del_driver(&lp3972_i2c_driver);
598 module_exit(lp3972_module_exit);
600 MODULE_LICENSE("GPL");
601 MODULE_AUTHOR("Axel Lin <axel.lin@gmail.com>");
602 MODULE_DESCRIPTION("LP3972 PMIC driver");