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mfd: wm8350-i2c: Make sure the i2c regmap functions are compiled
[linux/fpc-iii.git] / drivers / s390 / net / qeth_core_main.c
blobbd8c09e7a8d9f519928be75819255cfe05bab2b7
1 /*
2 * Copyright IBM Corp. 2007, 2009
3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
4 * Frank Pavlic <fpavlic@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
6 * Frank Blaschka <frank.blaschka@de.ibm.com>
7 */
8
9 #define KMSG_COMPONENT "qeth"
10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/string.h>
15 #include <linux/errno.h>
16 #include <linux/kernel.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/mii.h>
20 #include <linux/kthread.h>
21 #include <linux/slab.h>
22 #include <net/iucv/af_iucv.h>
23
24 #include <asm/ebcdic.h>
25 #include <asm/io.h>
26 #include <asm/sysinfo.h>
27 #include <asm/compat.h>
28
29 #include "qeth_core.h"
30
31 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
32 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
33 /* N P A M L V H */
34 [QETH_DBF_SETUP] = {"qeth_setup",
35 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
36 [QETH_DBF_MSG] = {"qeth_msg",
37 8, 1, 128, 3, &debug_sprintf_view, NULL},
38 [QETH_DBF_CTRL] = {"qeth_control",
39 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
40 };
41 EXPORT_SYMBOL_GPL(qeth_dbf);
42
43 struct qeth_card_list_struct qeth_core_card_list;
44 EXPORT_SYMBOL_GPL(qeth_core_card_list);
45 struct kmem_cache *qeth_core_header_cache;
46 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
47 static struct kmem_cache *qeth_qdio_outbuf_cache;
48
49 static struct device *qeth_core_root_dev;
50 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
51 static struct lock_class_key qdio_out_skb_queue_key;
52 static struct mutex qeth_mod_mutex;
53
54 static void qeth_send_control_data_cb(struct qeth_channel *,
55 struct qeth_cmd_buffer *);
56 static int qeth_issue_next_read(struct qeth_card *);
57 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
58 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
59 static void qeth_free_buffer_pool(struct qeth_card *);
60 static int qeth_qdio_establish(struct qeth_card *);
61 static void qeth_free_qdio_buffers(struct qeth_card *);
62 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
63 struct qeth_qdio_out_buffer *buf,
64 enum iucv_tx_notify notification);
65 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
66 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
67 struct qeth_qdio_out_buffer *buf,
68 enum qeth_qdio_buffer_states newbufstate);
69 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
70
71 static struct workqueue_struct *qeth_wq;
72
73 static void qeth_close_dev_handler(struct work_struct *work)
74 {
75 struct qeth_card *card;
76
77 card = container_of(work, struct qeth_card, close_dev_work);
78 QETH_CARD_TEXT(card, 2, "cldevhdl");
79 rtnl_lock();
80 dev_close(card->dev);
81 rtnl_unlock();
82 ccwgroup_set_offline(card->gdev);
83 }
84
85 void qeth_close_dev(struct qeth_card *card)
86 {
87 QETH_CARD_TEXT(card, 2, "cldevsubm");
88 queue_work(qeth_wq, &card->close_dev_work);
89 }
90 EXPORT_SYMBOL_GPL(qeth_close_dev);
91
92 static inline const char *qeth_get_cardname(struct qeth_card *card)
93 {
94 if (card->info.guestlan) {
95 switch (card->info.type) {
96 case QETH_CARD_TYPE_OSD:
97 return " Virtual NIC QDIO";
98 case QETH_CARD_TYPE_IQD:
99 return " Virtual NIC Hiper";
100 case QETH_CARD_TYPE_OSM:
101 return " Virtual NIC QDIO - OSM";
102 case QETH_CARD_TYPE_OSX:
103 return " Virtual NIC QDIO - OSX";
104 default:
105 return " unknown";
106 }
107 } else {
108 switch (card->info.type) {
109 case QETH_CARD_TYPE_OSD:
110 return " OSD Express";
111 case QETH_CARD_TYPE_IQD:
112 return " HiperSockets";
113 case QETH_CARD_TYPE_OSN:
114 return " OSN QDIO";
115 case QETH_CARD_TYPE_OSM:
116 return " OSM QDIO";
117 case QETH_CARD_TYPE_OSX:
118 return " OSX QDIO";
119 default:
120 return " unknown";
121 }
122 }
123 return " n/a";
124 }
125
126 /* max length to be returned: 14 */
127 const char *qeth_get_cardname_short(struct qeth_card *card)
128 {
129 if (card->info.guestlan) {
130 switch (card->info.type) {
131 case QETH_CARD_TYPE_OSD:
132 return "Virt.NIC QDIO";
133 case QETH_CARD_TYPE_IQD:
134 return "Virt.NIC Hiper";
135 case QETH_CARD_TYPE_OSM:
136 return "Virt.NIC OSM";
137 case QETH_CARD_TYPE_OSX:
138 return "Virt.NIC OSX";
139 default:
140 return "unknown";
141 }
142 } else {
143 switch (card->info.type) {
144 case QETH_CARD_TYPE_OSD:
145 switch (card->info.link_type) {
146 case QETH_LINK_TYPE_FAST_ETH:
147 return "OSD_100";
148 case QETH_LINK_TYPE_HSTR:
149 return "HSTR";
150 case QETH_LINK_TYPE_GBIT_ETH:
151 return "OSD_1000";
152 case QETH_LINK_TYPE_10GBIT_ETH:
153 return "OSD_10GIG";
154 case QETH_LINK_TYPE_LANE_ETH100:
155 return "OSD_FE_LANE";
156 case QETH_LINK_TYPE_LANE_TR:
157 return "OSD_TR_LANE";
158 case QETH_LINK_TYPE_LANE_ETH1000:
159 return "OSD_GbE_LANE";
160 case QETH_LINK_TYPE_LANE:
161 return "OSD_ATM_LANE";
162 default:
163 return "OSD_Express";
164 }
165 case QETH_CARD_TYPE_IQD:
166 return "HiperSockets";
167 case QETH_CARD_TYPE_OSN:
168 return "OSN";
169 case QETH_CARD_TYPE_OSM:
170 return "OSM_1000";
171 case QETH_CARD_TYPE_OSX:
172 return "OSX_10GIG";
173 default:
174 return "unknown";
175 }
176 }
177 return "n/a";
178 }
179
180 void qeth_set_recovery_task(struct qeth_card *card)
181 {
182 card->recovery_task = current;
183 }
184 EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
185
186 void qeth_clear_recovery_task(struct qeth_card *card)
187 {
188 card->recovery_task = NULL;
189 }
190 EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
191
192 static bool qeth_is_recovery_task(const struct qeth_card *card)
193 {
194 return card->recovery_task == current;
195 }
196
197 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
198 int clear_start_mask)
199 {
200 unsigned long flags;
201
202 spin_lock_irqsave(&card->thread_mask_lock, flags);
203 card->thread_allowed_mask = threads;
204 if (clear_start_mask)
205 card->thread_start_mask &= threads;
206 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
207 wake_up(&card->wait_q);
208 }
209 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
210
211 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
212 {
213 unsigned long flags;
214 int rc = 0;
215
216 spin_lock_irqsave(&card->thread_mask_lock, flags);
217 rc = (card->thread_running_mask & threads);
218 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
219 return rc;
220 }
221 EXPORT_SYMBOL_GPL(qeth_threads_running);
222
223 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
224 {
225 if (qeth_is_recovery_task(card))
226 return 0;
227 return wait_event_interruptible(card->wait_q,
228 qeth_threads_running(card, threads) == 0);
229 }
230 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
231
232 void qeth_clear_working_pool_list(struct qeth_card *card)
233 {
234 struct qeth_buffer_pool_entry *pool_entry, *tmp;
235
236 QETH_CARD_TEXT(card, 5, "clwrklst");
237 list_for_each_entry_safe(pool_entry, tmp,
238 &card->qdio.in_buf_pool.entry_list, list){
239 list_del(&pool_entry->list);
240 }
241 }
242 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
243
244 static int qeth_alloc_buffer_pool(struct qeth_card *card)
245 {
246 struct qeth_buffer_pool_entry *pool_entry;
247 void *ptr;
248 int i, j;
249
250 QETH_CARD_TEXT(card, 5, "alocpool");
251 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
252 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
253 if (!pool_entry) {
254 qeth_free_buffer_pool(card);
255 return -ENOMEM;
256 }
257 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
258 ptr = (void *) __get_free_page(GFP_KERNEL);
259 if (!ptr) {
260 while (j > 0)
261 free_page((unsigned long)
262 pool_entry->elements[--j]);
263 kfree(pool_entry);
264 qeth_free_buffer_pool(card);
265 return -ENOMEM;
266 }
267 pool_entry->elements[j] = ptr;
268 }
269 list_add(&pool_entry->init_list,
270 &card->qdio.init_pool.entry_list);
271 }
272 return 0;
273 }
274
275 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
276 {
277 QETH_CARD_TEXT(card, 2, "realcbp");
278
279 if ((card->state != CARD_STATE_DOWN) &&
280 (card->state != CARD_STATE_RECOVER))
281 return -EPERM;
282
283 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
284 qeth_clear_working_pool_list(card);
285 qeth_free_buffer_pool(card);
286 card->qdio.in_buf_pool.buf_count = bufcnt;
287 card->qdio.init_pool.buf_count = bufcnt;
288 return qeth_alloc_buffer_pool(card);
289 }
290 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
291
292 static inline int qeth_cq_init(struct qeth_card *card)
293 {
294 int rc;
295
296 if (card->options.cq == QETH_CQ_ENABLED) {
297 QETH_DBF_TEXT(SETUP, 2, "cqinit");
298 memset(card->qdio.c_q->qdio_bufs, 0,
299 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
300 card->qdio.c_q->next_buf_to_init = 127;
301 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
302 card->qdio.no_in_queues - 1, 0,
303 127);
304 if (rc) {
305 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
306 goto out;
307 }
308 }
309 rc = 0;
310 out:
311 return rc;
312 }
313
314 static inline int qeth_alloc_cq(struct qeth_card *card)
315 {
316 int rc;
317
318 if (card->options.cq == QETH_CQ_ENABLED) {
319 int i;
320 struct qdio_outbuf_state *outbuf_states;
321
322 QETH_DBF_TEXT(SETUP, 2, "cqon");
323 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
324 GFP_KERNEL);
325 if (!card->qdio.c_q) {
326 rc = -1;
327 goto kmsg_out;
328 }
329 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
330
331 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
332 card->qdio.c_q->bufs[i].buffer =
333 &card->qdio.c_q->qdio_bufs[i];
334 }
335
336 card->qdio.no_in_queues = 2;
337
338 card->qdio.out_bufstates =
339 kzalloc(card->qdio.no_out_queues *
340 QDIO_MAX_BUFFERS_PER_Q *
341 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
342 outbuf_states = card->qdio.out_bufstates;
343 if (outbuf_states == NULL) {
344 rc = -1;
345 goto free_cq_out;
346 }
347 for (i = 0; i < card->qdio.no_out_queues; ++i) {
348 card->qdio.out_qs[i]->bufstates = outbuf_states;
349 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
350 }
351 } else {
352 QETH_DBF_TEXT(SETUP, 2, "nocq");
353 card->qdio.c_q = NULL;
354 card->qdio.no_in_queues = 1;
355 }
356 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
357 rc = 0;
358 out:
359 return rc;
360 free_cq_out:
361 kfree(card->qdio.c_q);
362 card->qdio.c_q = NULL;
363 kmsg_out:
364 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
365 goto out;
366 }
367
368 static inline void qeth_free_cq(struct qeth_card *card)
369 {
370 if (card->qdio.c_q) {
371 --card->qdio.no_in_queues;
372 kfree(card->qdio.c_q);
373 card->qdio.c_q = NULL;
374 }
375 kfree(card->qdio.out_bufstates);
376 card->qdio.out_bufstates = NULL;
377 }
378
379 static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
380 int delayed) {
381 enum iucv_tx_notify n;
382
383 switch (sbalf15) {
384 case 0:
385 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
386 break;
387 case 4:
388 case 16:
389 case 17:
390 case 18:
391 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
392 TX_NOTIFY_UNREACHABLE;
393 break;
394 default:
395 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
396 TX_NOTIFY_GENERALERROR;
397 break;
398 }
399
400 return n;
401 }
402
403 static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
404 int bidx, int forced_cleanup)
405 {
406 if (q->card->options.cq != QETH_CQ_ENABLED)
407 return;
408
409 if (q->bufs[bidx]->next_pending != NULL) {
410 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
411 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
412
413 while (c) {
414 if (forced_cleanup ||
415 atomic_read(&c->state) ==
416 QETH_QDIO_BUF_HANDLED_DELAYED) {
417 struct qeth_qdio_out_buffer *f = c;
418 QETH_CARD_TEXT(f->q->card, 5, "fp");
419 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
420 /* release here to avoid interleaving between
421 outbound tasklet and inbound tasklet
422 regarding notifications and lifecycle */
423 qeth_release_skbs(c);
424
425 c = f->next_pending;
426 WARN_ON_ONCE(head->next_pending != f);
427 head->next_pending = c;
428 kmem_cache_free(qeth_qdio_outbuf_cache, f);
429 } else {
430 head = c;
431 c = c->next_pending;
432 }
433
434 }
435 }
436 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
437 QETH_QDIO_BUF_HANDLED_DELAYED)) {
438 /* for recovery situations */
439 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
440 qeth_init_qdio_out_buf(q, bidx);
441 QETH_CARD_TEXT(q->card, 2, "clprecov");
442 }
443 }
444
445
446 static inline void qeth_qdio_handle_aob(struct qeth_card *card,
447 unsigned long phys_aob_addr) {
448 struct qaob *aob;
449 struct qeth_qdio_out_buffer *buffer;
450 enum iucv_tx_notify notification;
451
452 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
453 QETH_CARD_TEXT(card, 5, "haob");
454 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
455 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
456 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
457
458 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
459 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
460 notification = TX_NOTIFY_OK;
461 } else {
462 WARN_ON_ONCE(atomic_read(&buffer->state) !=
463 QETH_QDIO_BUF_PENDING);
464 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
465 notification = TX_NOTIFY_DELAYED_OK;
466 }
467
468 if (aob->aorc != 0) {
469 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
470 notification = qeth_compute_cq_notification(aob->aorc, 1);
471 }
472 qeth_notify_skbs(buffer->q, buffer, notification);
473
474 buffer->aob = NULL;
475 qeth_clear_output_buffer(buffer->q, buffer,
476 QETH_QDIO_BUF_HANDLED_DELAYED);
477
478 /* from here on: do not touch buffer anymore */
479 qdio_release_aob(aob);
480 }
481
482 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
483 {
484 return card->options.cq == QETH_CQ_ENABLED &&
485 card->qdio.c_q != NULL &&
486 queue != 0 &&
487 queue == card->qdio.no_in_queues - 1;
488 }
489
490
491 static int qeth_issue_next_read(struct qeth_card *card)
492 {
493 int rc;
494 struct qeth_cmd_buffer *iob;
495
496 QETH_CARD_TEXT(card, 5, "issnxrd");
497 if (card->read.state != CH_STATE_UP)
498 return -EIO;
499 iob = qeth_get_buffer(&card->read);
500 if (!iob) {
501 dev_warn(&card->gdev->dev, "The qeth device driver "
502 "failed to recover an error on the device\n");
503 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
504 "available\n", dev_name(&card->gdev->dev));
505 return -ENOMEM;
506 }
507 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
508 QETH_CARD_TEXT(card, 6, "noirqpnd");
509 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
510 (addr_t) iob, 0, 0);
511 if (rc) {
512 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
513 "rc=%i\n", dev_name(&card->gdev->dev), rc);
514 atomic_set(&card->read.irq_pending, 0);
515 card->read_or_write_problem = 1;
516 qeth_schedule_recovery(card);
517 wake_up(&card->wait_q);
518 }
519 return rc;
520 }
521
522 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
523 {
524 struct qeth_reply *reply;
525
526 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
527 if (reply) {
528 atomic_set(&reply->refcnt, 1);
529 atomic_set(&reply->received, 0);
530 reply->card = card;
531 }
532 return reply;
533 }
534
535 static void qeth_get_reply(struct qeth_reply *reply)
536 {
537 WARN_ON(atomic_read(&reply->refcnt) <= 0);
538 atomic_inc(&reply->refcnt);
539 }
540
541 static void qeth_put_reply(struct qeth_reply *reply)
542 {
543 WARN_ON(atomic_read(&reply->refcnt) <= 0);
544 if (atomic_dec_and_test(&reply->refcnt))
545 kfree(reply);
546 }
547
548 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
549 struct qeth_card *card)
550 {
551 char *ipa_name;
552 int com = cmd->hdr.command;
553 ipa_name = qeth_get_ipa_cmd_name(com);
554 if (rc)
555 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
556 "x%X \"%s\"\n",
557 ipa_name, com, dev_name(&card->gdev->dev),
558 QETH_CARD_IFNAME(card), rc,
559 qeth_get_ipa_msg(rc));
560 else
561 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
562 ipa_name, com, dev_name(&card->gdev->dev),
563 QETH_CARD_IFNAME(card));
564 }
565
566 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
567 struct qeth_cmd_buffer *iob)
568 {
569 struct qeth_ipa_cmd *cmd = NULL;
570
571 QETH_CARD_TEXT(card, 5, "chkipad");
572 if (IS_IPA(iob->data)) {
573 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
574 if (IS_IPA_REPLY(cmd)) {
575 if (cmd->hdr.command != IPA_CMD_SETCCID &&
576 cmd->hdr.command != IPA_CMD_DELCCID &&
577 cmd->hdr.command != IPA_CMD_MODCCID &&
578 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
579 qeth_issue_ipa_msg(cmd,
580 cmd->hdr.return_code, card);
581 return cmd;
582 } else {
583 switch (cmd->hdr.command) {
584 case IPA_CMD_STOPLAN:
585 if (cmd->hdr.return_code ==
586 IPA_RC_VEPA_TO_VEB_TRANSITION) {
587 dev_err(&card->gdev->dev,
588 "Interface %s is down because the "
589 "adjacent port is no longer in "
590 "reflective relay mode\n",
591 QETH_CARD_IFNAME(card));
592 qeth_close_dev(card);
593 } else {
594 dev_warn(&card->gdev->dev,
595 "The link for interface %s on CHPID"
596 " 0x%X failed\n",
597 QETH_CARD_IFNAME(card),
598 card->info.chpid);
599 qeth_issue_ipa_msg(cmd,
600 cmd->hdr.return_code, card);
601 }
602 card->lan_online = 0;
603 if (card->dev && netif_carrier_ok(card->dev))
604 netif_carrier_off(card->dev);
605 return NULL;
606 case IPA_CMD_STARTLAN:
607 dev_info(&card->gdev->dev,
608 "The link for %s on CHPID 0x%X has"
609 " been restored\n",
610 QETH_CARD_IFNAME(card),
611 card->info.chpid);
612 netif_carrier_on(card->dev);
613 card->lan_online = 1;
614 if (card->info.hwtrap)
615 card->info.hwtrap = 2;
616 qeth_schedule_recovery(card);
617 return NULL;
618 case IPA_CMD_MODCCID:
619 return cmd;
620 case IPA_CMD_REGISTER_LOCAL_ADDR:
621 QETH_CARD_TEXT(card, 3, "irla");
622 break;
623 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
624 QETH_CARD_TEXT(card, 3, "urla");
625 break;
626 default:
627 QETH_DBF_MESSAGE(2, "Received data is IPA "
628 "but not a reply!\n");
629 break;
630 }
631 }
632 }
633 return cmd;
634 }
635
636 void qeth_clear_ipacmd_list(struct qeth_card *card)
637 {
638 struct qeth_reply *reply, *r;
639 unsigned long flags;
640
641 QETH_CARD_TEXT(card, 4, "clipalst");
642
643 spin_lock_irqsave(&card->lock, flags);
644 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
645 qeth_get_reply(reply);
646 reply->rc = -EIO;
647 atomic_inc(&reply->received);
648 list_del_init(&reply->list);
649 wake_up(&reply->wait_q);
650 qeth_put_reply(reply);
651 }
652 spin_unlock_irqrestore(&card->lock, flags);
653 atomic_set(&card->write.irq_pending, 0);
654 }
655 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
656
657 static int qeth_check_idx_response(struct qeth_card *card,
658 unsigned char *buffer)
659 {
660 if (!buffer)
661 return 0;
662
663 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
664 if ((buffer[2] & 0xc0) == 0xc0) {
665 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
666 "with cause code 0x%02x%s\n",
667 buffer[4],
668 ((buffer[4] == 0x22) ?
669 " -- try another portname" : ""));
670 QETH_CARD_TEXT(card, 2, "ckidxres");
671 QETH_CARD_TEXT(card, 2, " idxterm");
672 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
673 if (buffer[4] == 0xf6) {
674 dev_err(&card->gdev->dev,
675 "The qeth device is not configured "
676 "for the OSI layer required by z/VM\n");
677 return -EPERM;
678 }
679 return -EIO;
680 }
681 return 0;
682 }
683
684 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
685 __u32 len)
686 {
687 struct qeth_card *card;
688
689 card = CARD_FROM_CDEV(channel->ccwdev);
690 QETH_CARD_TEXT(card, 4, "setupccw");
691 if (channel == &card->read)
692 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
693 else
694 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
695 channel->ccw.count = len;
696 channel->ccw.cda = (__u32) __pa(iob);
697 }
698
699 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
700 {
701 __u8 index;
702
703 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
704 index = channel->io_buf_no;
705 do {
706 if (channel->iob[index].state == BUF_STATE_FREE) {
707 channel->iob[index].state = BUF_STATE_LOCKED;
708 channel->io_buf_no = (channel->io_buf_no + 1) %
709 QETH_CMD_BUFFER_NO;
710 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
711 return channel->iob + index;
712 }
713 index = (index + 1) % QETH_CMD_BUFFER_NO;
714 } while (index != channel->io_buf_no);
715
716 return NULL;
717 }
718
719 void qeth_release_buffer(struct qeth_channel *channel,
720 struct qeth_cmd_buffer *iob)
721 {
722 unsigned long flags;
723
724 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
725 spin_lock_irqsave(&channel->iob_lock, flags);
726 memset(iob->data, 0, QETH_BUFSIZE);
727 iob->state = BUF_STATE_FREE;
728 iob->callback = qeth_send_control_data_cb;
729 iob->rc = 0;
730 spin_unlock_irqrestore(&channel->iob_lock, flags);
731 wake_up(&channel->wait_q);
732 }
733 EXPORT_SYMBOL_GPL(qeth_release_buffer);
734
735 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
736 {
737 struct qeth_cmd_buffer *buffer = NULL;
738 unsigned long flags;
739
740 spin_lock_irqsave(&channel->iob_lock, flags);
741 buffer = __qeth_get_buffer(channel);
742 spin_unlock_irqrestore(&channel->iob_lock, flags);
743 return buffer;
744 }
745
746 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
747 {
748 struct qeth_cmd_buffer *buffer;
749 wait_event(channel->wait_q,
750 ((buffer = qeth_get_buffer(channel)) != NULL));
751 return buffer;
752 }
753 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
754
755 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
756 {
757 int cnt;
758
759 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
760 qeth_release_buffer(channel, &channel->iob[cnt]);
761 channel->buf_no = 0;
762 channel->io_buf_no = 0;
763 }
764 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
765
766 static void qeth_send_control_data_cb(struct qeth_channel *channel,
767 struct qeth_cmd_buffer *iob)
768 {
769 struct qeth_card *card;
770 struct qeth_reply *reply, *r;
771 struct qeth_ipa_cmd *cmd;
772 unsigned long flags;
773 int keep_reply;
774 int rc = 0;
775
776 card = CARD_FROM_CDEV(channel->ccwdev);
777 QETH_CARD_TEXT(card, 4, "sndctlcb");
778 rc = qeth_check_idx_response(card, iob->data);
779 switch (rc) {
780 case 0:
781 break;
782 case -EIO:
783 qeth_clear_ipacmd_list(card);
784 qeth_schedule_recovery(card);
785 /* fall through */
786 default:
787 goto out;
788 }
789
790 cmd = qeth_check_ipa_data(card, iob);
791 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
792 goto out;
793 /*in case of OSN : check if cmd is set */
794 if (card->info.type == QETH_CARD_TYPE_OSN &&
795 cmd &&
796 cmd->hdr.command != IPA_CMD_STARTLAN &&
797 card->osn_info.assist_cb != NULL) {
798 card->osn_info.assist_cb(card->dev, cmd);
799 goto out;
800 }
801
802 spin_lock_irqsave(&card->lock, flags);
803 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
804 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
805 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
806 qeth_get_reply(reply);
807 list_del_init(&reply->list);
808 spin_unlock_irqrestore(&card->lock, flags);
809 keep_reply = 0;
810 if (reply->callback != NULL) {
811 if (cmd) {
812 reply->offset = (__u16)((char *)cmd -
813 (char *)iob->data);
814 keep_reply = reply->callback(card,
815 reply,
816 (unsigned long)cmd);
817 } else
818 keep_reply = reply->callback(card,
819 reply,
820 (unsigned long)iob);
821 }
822 if (cmd)
823 reply->rc = (u16) cmd->hdr.return_code;
824 else if (iob->rc)
825 reply->rc = iob->rc;
826 if (keep_reply) {
827 spin_lock_irqsave(&card->lock, flags);
828 list_add_tail(&reply->list,
829 &card->cmd_waiter_list);
830 spin_unlock_irqrestore(&card->lock, flags);
831 } else {
832 atomic_inc(&reply->received);
833 wake_up(&reply->wait_q);
834 }
835 qeth_put_reply(reply);
836 goto out;
837 }
838 }
839 spin_unlock_irqrestore(&card->lock, flags);
840 out:
841 memcpy(&card->seqno.pdu_hdr_ack,
842 QETH_PDU_HEADER_SEQ_NO(iob->data),
843 QETH_SEQ_NO_LENGTH);
844 qeth_release_buffer(channel, iob);
845 }
846
847 static int qeth_setup_channel(struct qeth_channel *channel)
848 {
849 int cnt;
850
851 QETH_DBF_TEXT(SETUP, 2, "setupch");
852 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
853 channel->iob[cnt].data =
854 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
855 if (channel->iob[cnt].data == NULL)
856 break;
857 channel->iob[cnt].state = BUF_STATE_FREE;
858 channel->iob[cnt].channel = channel;
859 channel->iob[cnt].callback = qeth_send_control_data_cb;
860 channel->iob[cnt].rc = 0;
861 }
862 if (cnt < QETH_CMD_BUFFER_NO) {
863 while (cnt-- > 0)
864 kfree(channel->iob[cnt].data);
865 return -ENOMEM;
866 }
867 channel->buf_no = 0;
868 channel->io_buf_no = 0;
869 atomic_set(&channel->irq_pending, 0);
870 spin_lock_init(&channel->iob_lock);
871
872 init_waitqueue_head(&channel->wait_q);
873 return 0;
874 }
875
876 static int qeth_set_thread_start_bit(struct qeth_card *card,
877 unsigned long thread)
878 {
879 unsigned long flags;
880
881 spin_lock_irqsave(&card->thread_mask_lock, flags);
882 if (!(card->thread_allowed_mask & thread) ||
883 (card->thread_start_mask & thread)) {
884 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
885 return -EPERM;
886 }
887 card->thread_start_mask |= thread;
888 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
889 return 0;
890 }
891
892 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
893 {
894 unsigned long flags;
895
896 spin_lock_irqsave(&card->thread_mask_lock, flags);
897 card->thread_start_mask &= ~thread;
898 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
899 wake_up(&card->wait_q);
900 }
901 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
902
903 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
904 {
905 unsigned long flags;
906
907 spin_lock_irqsave(&card->thread_mask_lock, flags);
908 card->thread_running_mask &= ~thread;
909 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
910 wake_up(&card->wait_q);
911 }
912 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
913
914 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
915 {
916 unsigned long flags;
917 int rc = 0;
918
919 spin_lock_irqsave(&card->thread_mask_lock, flags);
920 if (card->thread_start_mask & thread) {
921 if ((card->thread_allowed_mask & thread) &&
922 !(card->thread_running_mask & thread)) {
923 rc = 1;
924 card->thread_start_mask &= ~thread;
925 card->thread_running_mask |= thread;
926 } else
927 rc = -EPERM;
928 }
929 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
930 return rc;
931 }
932
933 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
934 {
935 int rc = 0;
936
937 wait_event(card->wait_q,
938 (rc = __qeth_do_run_thread(card, thread)) >= 0);
939 return rc;
940 }
941 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
942
943 void qeth_schedule_recovery(struct qeth_card *card)
944 {
945 QETH_CARD_TEXT(card, 2, "startrec");
946 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
947 schedule_work(&card->kernel_thread_starter);
948 }
949 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
950
951 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
952 {
953 int dstat, cstat;
954 char *sense;
955 struct qeth_card *card;
956
957 sense = (char *) irb->ecw;
958 cstat = irb->scsw.cmd.cstat;
959 dstat = irb->scsw.cmd.dstat;
960 card = CARD_FROM_CDEV(cdev);
961
962 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
963 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
964 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
965 QETH_CARD_TEXT(card, 2, "CGENCHK");
966 dev_warn(&cdev->dev, "The qeth device driver "
967 "failed to recover an error on the device\n");
968 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
969 dev_name(&cdev->dev), dstat, cstat);
970 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
971 16, 1, irb, 64, 1);
972 return 1;
973 }
974
975 if (dstat & DEV_STAT_UNIT_CHECK) {
976 if (sense[SENSE_RESETTING_EVENT_BYTE] &
977 SENSE_RESETTING_EVENT_FLAG) {
978 QETH_CARD_TEXT(card, 2, "REVIND");
979 return 1;
980 }
981 if (sense[SENSE_COMMAND_REJECT_BYTE] &
982 SENSE_COMMAND_REJECT_FLAG) {
983 QETH_CARD_TEXT(card, 2, "CMDREJi");
984 return 1;
985 }
986 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
987 QETH_CARD_TEXT(card, 2, "AFFE");
988 return 1;
989 }
990 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
991 QETH_CARD_TEXT(card, 2, "ZEROSEN");
992 return 0;
993 }
994 QETH_CARD_TEXT(card, 2, "DGENCHK");
995 return 1;
996 }
997 return 0;
998 }
999
1000 static long __qeth_check_irb_error(struct ccw_device *cdev,
1001 unsigned long intparm, struct irb *irb)
1002 {
1003 struct qeth_card *card;
1004
1005 card = CARD_FROM_CDEV(cdev);
1006
1007 if (!IS_ERR(irb))
1008 return 0;
1009
1010 switch (PTR_ERR(irb)) {
1011 case -EIO:
1012 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1013 dev_name(&cdev->dev));
1014 QETH_CARD_TEXT(card, 2, "ckirberr");
1015 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
1016 break;
1017 case -ETIMEDOUT:
1018 dev_warn(&cdev->dev, "A hardware operation timed out"
1019 " on the device\n");
1020 QETH_CARD_TEXT(card, 2, "ckirberr");
1021 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
1022 if (intparm == QETH_RCD_PARM) {
1023 if (card && (card->data.ccwdev == cdev)) {
1024 card->data.state = CH_STATE_DOWN;
1025 wake_up(&card->wait_q);
1026 }
1027 }
1028 break;
1029 default:
1030 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1031 dev_name(&cdev->dev), PTR_ERR(irb));
1032 QETH_CARD_TEXT(card, 2, "ckirberr");
1033 QETH_CARD_TEXT(card, 2, " rc???");
1034 }
1035 return PTR_ERR(irb);
1036 }
1037
1038 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1039 struct irb *irb)
1040 {
1041 int rc;
1042 int cstat, dstat;
1043 struct qeth_cmd_buffer *buffer;
1044 struct qeth_channel *channel;
1045 struct qeth_card *card;
1046 struct qeth_cmd_buffer *iob;
1047 __u8 index;
1048
1049 if (__qeth_check_irb_error(cdev, intparm, irb))
1050 return;
1051 cstat = irb->scsw.cmd.cstat;
1052 dstat = irb->scsw.cmd.dstat;
1053
1054 card = CARD_FROM_CDEV(cdev);
1055 if (!card)
1056 return;
1057
1058 QETH_CARD_TEXT(card, 5, "irq");
1059
1060 if (card->read.ccwdev == cdev) {
1061 channel = &card->read;
1062 QETH_CARD_TEXT(card, 5, "read");
1063 } else if (card->write.ccwdev == cdev) {
1064 channel = &card->write;
1065 QETH_CARD_TEXT(card, 5, "write");
1066 } else {
1067 channel = &card->data;
1068 QETH_CARD_TEXT(card, 5, "data");
1069 }
1070 atomic_set(&channel->irq_pending, 0);
1071
1072 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
1073 channel->state = CH_STATE_STOPPED;
1074
1075 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
1076 channel->state = CH_STATE_HALTED;
1077
1078 /*let's wake up immediately on data channel*/
1079 if ((channel == &card->data) && (intparm != 0) &&
1080 (intparm != QETH_RCD_PARM))
1081 goto out;
1082
1083 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
1084 QETH_CARD_TEXT(card, 6, "clrchpar");
1085 /* we don't have to handle this further */
1086 intparm = 0;
1087 }
1088 if (intparm == QETH_HALT_CHANNEL_PARM) {
1089 QETH_CARD_TEXT(card, 6, "hltchpar");
1090 /* we don't have to handle this further */
1091 intparm = 0;
1092 }
1093 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1094 (dstat & DEV_STAT_UNIT_CHECK) ||
1095 (cstat)) {
1096 if (irb->esw.esw0.erw.cons) {
1097 dev_warn(&channel->ccwdev->dev,
1098 "The qeth device driver failed to recover "
1099 "an error on the device\n");
1100 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1101 "0x%X dstat 0x%X\n",
1102 dev_name(&channel->ccwdev->dev), cstat, dstat);
1103 print_hex_dump(KERN_WARNING, "qeth: irb ",
1104 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1105 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1106 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1107 }
1108 if (intparm == QETH_RCD_PARM) {
1109 channel->state = CH_STATE_DOWN;
1110 goto out;
1111 }
1112 rc = qeth_get_problem(cdev, irb);
1113 if (rc) {
1114 qeth_clear_ipacmd_list(card);
1115 qeth_schedule_recovery(card);
1116 goto out;
1117 }
1118 }
1119
1120 if (intparm == QETH_RCD_PARM) {
1121 channel->state = CH_STATE_RCD_DONE;
1122 goto out;
1123 }
1124 if (intparm) {
1125 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1126 buffer->state = BUF_STATE_PROCESSED;
1127 }
1128 if (channel == &card->data)
1129 return;
1130 if (channel == &card->read &&
1131 channel->state == CH_STATE_UP)
1132 qeth_issue_next_read(card);
1133
1134 iob = channel->iob;
1135 index = channel->buf_no;
1136 while (iob[index].state == BUF_STATE_PROCESSED) {
1137 if (iob[index].callback != NULL)
1138 iob[index].callback(channel, iob + index);
1139
1140 index = (index + 1) % QETH_CMD_BUFFER_NO;
1141 }
1142 channel->buf_no = index;
1143 out:
1144 wake_up(&card->wait_q);
1145 return;
1146 }
1147
1148 static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
1149 struct qeth_qdio_out_buffer *buf,
1150 enum iucv_tx_notify notification)
1151 {
1152 struct sk_buff *skb;
1153
1154 if (skb_queue_empty(&buf->skb_list))
1155 goto out;
1156 skb = skb_peek(&buf->skb_list);
1157 while (skb) {
1158 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1159 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1160 if (skb->protocol == ETH_P_AF_IUCV) {
1161 if (skb->sk) {
1162 struct iucv_sock *iucv = iucv_sk(skb->sk);
1163 iucv->sk_txnotify(skb, notification);
1164 }
1165 }
1166 if (skb_queue_is_last(&buf->skb_list, skb))
1167 skb = NULL;
1168 else
1169 skb = skb_queue_next(&buf->skb_list, skb);
1170 }
1171 out:
1172 return;
1173 }
1174
1175 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1176 {
1177 struct sk_buff *skb;
1178 struct iucv_sock *iucv;
1179 int notify_general_error = 0;
1180
1181 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1182 notify_general_error = 1;
1183
1184 /* release may never happen from within CQ tasklet scope */
1185 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
1186
1187 skb = skb_dequeue(&buf->skb_list);
1188 while (skb) {
1189 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1190 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
1191 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
1192 if (skb->sk) {
1193 iucv = iucv_sk(skb->sk);
1194 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1195 }
1196 }
1197 atomic_dec(&skb->users);
1198 dev_kfree_skb_any(skb);
1199 skb = skb_dequeue(&buf->skb_list);
1200 }
1201 }
1202
1203 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1204 struct qeth_qdio_out_buffer *buf,
1205 enum qeth_qdio_buffer_states newbufstate)
1206 {
1207 int i;
1208
1209 /* is PCI flag set on buffer? */
1210 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1211 atomic_dec(&queue->set_pci_flags_count);
1212
1213 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1214 qeth_release_skbs(buf);
1215 }
1216 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
1217 if (buf->buffer->element[i].addr && buf->is_header[i])
1218 kmem_cache_free(qeth_core_header_cache,
1219 buf->buffer->element[i].addr);
1220 buf->is_header[i] = 0;
1221 buf->buffer->element[i].length = 0;
1222 buf->buffer->element[i].addr = NULL;
1223 buf->buffer->element[i].eflags = 0;
1224 buf->buffer->element[i].sflags = 0;
1225 }
1226 buf->buffer->element[15].eflags = 0;
1227 buf->buffer->element[15].sflags = 0;
1228 buf->next_element_to_fill = 0;
1229 atomic_set(&buf->state, newbufstate);
1230 }
1231
1232 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1233 {
1234 int j;
1235
1236 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1237 if (!q->bufs[j])
1238 continue;
1239 qeth_cleanup_handled_pending(q, j, 1);
1240 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1241 if (free) {
1242 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1243 q->bufs[j] = NULL;
1244 }
1245 }
1246 }
1247
1248 void qeth_clear_qdio_buffers(struct qeth_card *card)
1249 {
1250 int i;
1251
1252 QETH_CARD_TEXT(card, 2, "clearqdbf");
1253 /* clear outbound buffers to free skbs */
1254 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1255 if (card->qdio.out_qs[i]) {
1256 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
1257 }
1258 }
1259 }
1260 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1261
1262 static void qeth_free_buffer_pool(struct qeth_card *card)
1263 {
1264 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1265 int i = 0;
1266 list_for_each_entry_safe(pool_entry, tmp,
1267 &card->qdio.init_pool.entry_list, init_list){
1268 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1269 free_page((unsigned long)pool_entry->elements[i]);
1270 list_del(&pool_entry->init_list);
1271 kfree(pool_entry);
1272 }
1273 }
1274
1275 static void qeth_free_qdio_buffers(struct qeth_card *card)
1276 {
1277 int i, j;
1278
1279 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1280 QETH_QDIO_UNINITIALIZED)
1281 return;
1282
1283 qeth_free_cq(card);
1284 cancel_delayed_work_sync(&card->buffer_reclaim_work);
1285 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1286 if (card->qdio.in_q->bufs[j].rx_skb)
1287 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
1288 }
1289 kfree(card->qdio.in_q);
1290 card->qdio.in_q = NULL;
1291 /* inbound buffer pool */
1292 qeth_free_buffer_pool(card);
1293 /* free outbound qdio_qs */
1294 if (card->qdio.out_qs) {
1295 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1296 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
1297 kfree(card->qdio.out_qs[i]);
1298 }
1299 kfree(card->qdio.out_qs);
1300 card->qdio.out_qs = NULL;
1301 }
1302 }
1303
1304 static void qeth_clean_channel(struct qeth_channel *channel)
1305 {
1306 int cnt;
1307
1308 QETH_DBF_TEXT(SETUP, 2, "freech");
1309 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1310 kfree(channel->iob[cnt].data);
1311 }
1312
1313 static void qeth_set_single_write_queues(struct qeth_card *card)
1314 {
1315 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1316 (card->qdio.no_out_queues == 4))
1317 qeth_free_qdio_buffers(card);
1318
1319 card->qdio.no_out_queues = 1;
1320 if (card->qdio.default_out_queue != 0)
1321 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1322
1323 card->qdio.default_out_queue = 0;
1324 }
1325
1326 static void qeth_set_multiple_write_queues(struct qeth_card *card)
1327 {
1328 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1329 (card->qdio.no_out_queues == 1)) {
1330 qeth_free_qdio_buffers(card);
1331 card->qdio.default_out_queue = 2;
1332 }
1333 card->qdio.no_out_queues = 4;
1334 }
1335
1336 static void qeth_update_from_chp_desc(struct qeth_card *card)
1337 {
1338 struct ccw_device *ccwdev;
1339 struct channelPath_dsc {
1340 u8 flags;
1341 u8 lsn;
1342 u8 desc;
1343 u8 chpid;
1344 u8 swla;
1345 u8 zeroes;
1346 u8 chla;
1347 u8 chpp;
1348 } *chp_dsc;
1349
1350 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
1351
1352 ccwdev = card->data.ccwdev;
1353 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1354 if (!chp_dsc)
1355 goto out;
1356
1357 card->info.func_level = 0x4100 + chp_dsc->desc;
1358 if (card->info.type == QETH_CARD_TYPE_IQD)
1359 goto out;
1360
1361 /* CHPP field bit 6 == 1 -> single queue */
1362 if ((chp_dsc->chpp & 0x02) == 0x02)
1363 qeth_set_single_write_queues(card);
1364 else
1365 qeth_set_multiple_write_queues(card);
1366 out:
1367 kfree(chp_dsc);
1368 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1369 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1370 }
1371
1372 static void qeth_init_qdio_info(struct qeth_card *card)
1373 {
1374 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1375 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1376 /* inbound */
1377 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1378 if (card->info.type == QETH_CARD_TYPE_IQD)
1379 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1380 else
1381 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1382 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1383 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1384 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1385 }
1386
1387 static void qeth_set_intial_options(struct qeth_card *card)
1388 {
1389 card->options.route4.type = NO_ROUTER;
1390 card->options.route6.type = NO_ROUTER;
1391 card->options.fake_broadcast = 0;
1392 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1393 card->options.performance_stats = 0;
1394 card->options.rx_sg_cb = QETH_RX_SG_CB;
1395 card->options.isolation = ISOLATION_MODE_NONE;
1396 card->options.cq = QETH_CQ_DISABLED;
1397 }
1398
1399 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1400 {
1401 unsigned long flags;
1402 int rc = 0;
1403
1404 spin_lock_irqsave(&card->thread_mask_lock, flags);
1405 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
1406 (u8) card->thread_start_mask,
1407 (u8) card->thread_allowed_mask,
1408 (u8) card->thread_running_mask);
1409 rc = (card->thread_start_mask & thread);
1410 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1411 return rc;
1412 }
1413
1414 static void qeth_start_kernel_thread(struct work_struct *work)
1415 {
1416 struct task_struct *ts;
1417 struct qeth_card *card = container_of(work, struct qeth_card,
1418 kernel_thread_starter);
1419 QETH_CARD_TEXT(card , 2, "strthrd");
1420
1421 if (card->read.state != CH_STATE_UP &&
1422 card->write.state != CH_STATE_UP)
1423 return;
1424 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
1425 ts = kthread_run(card->discipline->recover, (void *)card,
1426 "qeth_recover");
1427 if (IS_ERR(ts)) {
1428 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1429 qeth_clear_thread_running_bit(card,
1430 QETH_RECOVER_THREAD);
1431 }
1432 }
1433 }
1434
1435 static int qeth_setup_card(struct qeth_card *card)
1436 {
1437
1438 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1439 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1440
1441 card->read.state = CH_STATE_DOWN;
1442 card->write.state = CH_STATE_DOWN;
1443 card->data.state = CH_STATE_DOWN;
1444 card->state = CARD_STATE_DOWN;
1445 card->lan_online = 0;
1446 card->read_or_write_problem = 0;
1447 card->dev = NULL;
1448 spin_lock_init(&card->vlanlock);
1449 spin_lock_init(&card->mclock);
1450 spin_lock_init(&card->lock);
1451 spin_lock_init(&card->ip_lock);
1452 spin_lock_init(&card->thread_mask_lock);
1453 mutex_init(&card->conf_mutex);
1454 mutex_init(&card->discipline_mutex);
1455 card->thread_start_mask = 0;
1456 card->thread_allowed_mask = 0;
1457 card->thread_running_mask = 0;
1458 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1459 INIT_LIST_HEAD(&card->ip_list);
1460 INIT_LIST_HEAD(card->ip_tbd_list);
1461 INIT_LIST_HEAD(&card->cmd_waiter_list);
1462 init_waitqueue_head(&card->wait_q);
1463 /* initial options */
1464 qeth_set_intial_options(card);
1465 /* IP address takeover */
1466 INIT_LIST_HEAD(&card->ipato.entries);
1467 card->ipato.enabled = 0;
1468 card->ipato.invert4 = 0;
1469 card->ipato.invert6 = 0;
1470 /* init QDIO stuff */
1471 qeth_init_qdio_info(card);
1472 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
1473 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
1474 return 0;
1475 }
1476
1477 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1478 {
1479 struct qeth_card *card = container_of(slr, struct qeth_card,
1480 qeth_service_level);
1481 if (card->info.mcl_level[0])
1482 seq_printf(m, "qeth: %s firmware level %s\n",
1483 CARD_BUS_ID(card), card->info.mcl_level);
1484 }
1485
1486 static struct qeth_card *qeth_alloc_card(void)
1487 {
1488 struct qeth_card *card;
1489
1490 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1491 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1492 if (!card)
1493 goto out;
1494 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1495 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
1496 if (!card->ip_tbd_list) {
1497 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1498 goto out_card;
1499 }
1500 if (qeth_setup_channel(&card->read))
1501 goto out_ip;
1502 if (qeth_setup_channel(&card->write))
1503 goto out_channel;
1504 card->options.layer2 = -1;
1505 card->qeth_service_level.seq_print = qeth_core_sl_print;
1506 register_service_level(&card->qeth_service_level);
1507 return card;
1508
1509 out_channel:
1510 qeth_clean_channel(&card->read);
1511 out_ip:
1512 kfree(card->ip_tbd_list);
1513 out_card:
1514 kfree(card);
1515 out:
1516 return NULL;
1517 }
1518
1519 static int qeth_determine_card_type(struct qeth_card *card)
1520 {
1521 int i = 0;
1522
1523 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1524
1525 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1526 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1527 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1528 if ((CARD_RDEV(card)->id.dev_type ==
1529 known_devices[i][QETH_DEV_TYPE_IND]) &&
1530 (CARD_RDEV(card)->id.dev_model ==
1531 known_devices[i][QETH_DEV_MODEL_IND])) {
1532 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1533 card->qdio.no_out_queues =
1534 known_devices[i][QETH_QUEUE_NO_IND];
1535 card->qdio.no_in_queues = 1;
1536 card->info.is_multicast_different =
1537 known_devices[i][QETH_MULTICAST_IND];
1538 qeth_update_from_chp_desc(card);
1539 return 0;
1540 }
1541 i++;
1542 }
1543 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1544 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1545 "unknown type\n");
1546 return -ENOENT;
1547 }
1548
1549 static int qeth_clear_channel(struct qeth_channel *channel)
1550 {
1551 unsigned long flags;
1552 struct qeth_card *card;
1553 int rc;
1554
1555 card = CARD_FROM_CDEV(channel->ccwdev);
1556 QETH_CARD_TEXT(card, 3, "clearch");
1557 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1558 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1559 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1560
1561 if (rc)
1562 return rc;
1563 rc = wait_event_interruptible_timeout(card->wait_q,
1564 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1565 if (rc == -ERESTARTSYS)
1566 return rc;
1567 if (channel->state != CH_STATE_STOPPED)
1568 return -ETIME;
1569 channel->state = CH_STATE_DOWN;
1570 return 0;
1571 }
1572
1573 static int qeth_halt_channel(struct qeth_channel *channel)
1574 {
1575 unsigned long flags;
1576 struct qeth_card *card;
1577 int rc;
1578
1579 card = CARD_FROM_CDEV(channel->ccwdev);
1580 QETH_CARD_TEXT(card, 3, "haltch");
1581 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1582 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1583 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1584
1585 if (rc)
1586 return rc;
1587 rc = wait_event_interruptible_timeout(card->wait_q,
1588 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1589 if (rc == -ERESTARTSYS)
1590 return rc;
1591 if (channel->state != CH_STATE_HALTED)
1592 return -ETIME;
1593 return 0;
1594 }
1595
1596 static int qeth_halt_channels(struct qeth_card *card)
1597 {
1598 int rc1 = 0, rc2 = 0, rc3 = 0;
1599
1600 QETH_CARD_TEXT(card, 3, "haltchs");
1601 rc1 = qeth_halt_channel(&card->read);
1602 rc2 = qeth_halt_channel(&card->write);
1603 rc3 = qeth_halt_channel(&card->data);
1604 if (rc1)
1605 return rc1;
1606 if (rc2)
1607 return rc2;
1608 return rc3;
1609 }
1610
1611 static int qeth_clear_channels(struct qeth_card *card)
1612 {
1613 int rc1 = 0, rc2 = 0, rc3 = 0;
1614
1615 QETH_CARD_TEXT(card, 3, "clearchs");
1616 rc1 = qeth_clear_channel(&card->read);
1617 rc2 = qeth_clear_channel(&card->write);
1618 rc3 = qeth_clear_channel(&card->data);
1619 if (rc1)
1620 return rc1;
1621 if (rc2)
1622 return rc2;
1623 return rc3;
1624 }
1625
1626 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1627 {
1628 int rc = 0;
1629
1630 QETH_CARD_TEXT(card, 3, "clhacrd");
1631
1632 if (halt)
1633 rc = qeth_halt_channels(card);
1634 if (rc)
1635 return rc;
1636 return qeth_clear_channels(card);
1637 }
1638
1639 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1640 {
1641 int rc = 0;
1642
1643 QETH_CARD_TEXT(card, 3, "qdioclr");
1644 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1645 QETH_QDIO_CLEANING)) {
1646 case QETH_QDIO_ESTABLISHED:
1647 if (card->info.type == QETH_CARD_TYPE_IQD)
1648 rc = qdio_shutdown(CARD_DDEV(card),
1649 QDIO_FLAG_CLEANUP_USING_HALT);
1650 else
1651 rc = qdio_shutdown(CARD_DDEV(card),
1652 QDIO_FLAG_CLEANUP_USING_CLEAR);
1653 if (rc)
1654 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
1655 qdio_free(CARD_DDEV(card));
1656 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1657 break;
1658 case QETH_QDIO_CLEANING:
1659 return rc;
1660 default:
1661 break;
1662 }
1663 rc = qeth_clear_halt_card(card, use_halt);
1664 if (rc)
1665 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
1666 card->state = CARD_STATE_DOWN;
1667 return rc;
1668 }
1669 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1670
1671 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1672 int *length)
1673 {
1674 struct ciw *ciw;
1675 char *rcd_buf;
1676 int ret;
1677 struct qeth_channel *channel = &card->data;
1678 unsigned long flags;
1679
1680 /*
1681 * scan for RCD command in extended SenseID data
1682 */
1683 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1684 if (!ciw || ciw->cmd == 0)
1685 return -EOPNOTSUPP;
1686 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1687 if (!rcd_buf)
1688 return -ENOMEM;
1689
1690 channel->ccw.cmd_code = ciw->cmd;
1691 channel->ccw.cda = (__u32) __pa(rcd_buf);
1692 channel->ccw.count = ciw->count;
1693 channel->ccw.flags = CCW_FLAG_SLI;
1694 channel->state = CH_STATE_RCD;
1695 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1696 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1697 QETH_RCD_PARM, LPM_ANYPATH, 0,
1698 QETH_RCD_TIMEOUT);
1699 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1700 if (!ret)
1701 wait_event(card->wait_q,
1702 (channel->state == CH_STATE_RCD_DONE ||
1703 channel->state == CH_STATE_DOWN));
1704 if (channel->state == CH_STATE_DOWN)
1705 ret = -EIO;
1706 else
1707 channel->state = CH_STATE_DOWN;
1708 if (ret) {
1709 kfree(rcd_buf);
1710 *buffer = NULL;
1711 *length = 0;
1712 } else {
1713 *length = ciw->count;
1714 *buffer = rcd_buf;
1715 }
1716 return ret;
1717 }
1718
1719 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1720 {
1721 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1722 card->info.chpid = prcd[30];
1723 card->info.unit_addr2 = prcd[31];
1724 card->info.cula = prcd[63];
1725 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1726 (prcd[0x11] == _ascebc['M']));
1727 }
1728
1729 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1730 {
1731 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1732
1733 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
1734 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
1735 card->info.blkt.time_total = 0;
1736 card->info.blkt.inter_packet = 0;
1737 card->info.blkt.inter_packet_jumbo = 0;
1738 } else {
1739 card->info.blkt.time_total = 250;
1740 card->info.blkt.inter_packet = 5;
1741 card->info.blkt.inter_packet_jumbo = 15;
1742 }
1743 }
1744
1745 static void qeth_init_tokens(struct qeth_card *card)
1746 {
1747 card->token.issuer_rm_w = 0x00010103UL;
1748 card->token.cm_filter_w = 0x00010108UL;
1749 card->token.cm_connection_w = 0x0001010aUL;
1750 card->token.ulp_filter_w = 0x0001010bUL;
1751 card->token.ulp_connection_w = 0x0001010dUL;
1752 }
1753
1754 static void qeth_init_func_level(struct qeth_card *card)
1755 {
1756 switch (card->info.type) {
1757 case QETH_CARD_TYPE_IQD:
1758 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
1759 break;
1760 case QETH_CARD_TYPE_OSD:
1761 case QETH_CARD_TYPE_OSN:
1762 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1763 break;
1764 default:
1765 break;
1766 }
1767 }
1768
1769 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1770 void (*idx_reply_cb)(struct qeth_channel *,
1771 struct qeth_cmd_buffer *))
1772 {
1773 struct qeth_cmd_buffer *iob;
1774 unsigned long flags;
1775 int rc;
1776 struct qeth_card *card;
1777
1778 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1779 card = CARD_FROM_CDEV(channel->ccwdev);
1780 iob = qeth_get_buffer(channel);
1781 iob->callback = idx_reply_cb;
1782 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1783 channel->ccw.count = QETH_BUFSIZE;
1784 channel->ccw.cda = (__u32) __pa(iob->data);
1785
1786 wait_event(card->wait_q,
1787 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1788 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1789 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1790 rc = ccw_device_start(channel->ccwdev,
1791 &channel->ccw, (addr_t) iob, 0, 0);
1792 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1793
1794 if (rc) {
1795 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1796 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1797 atomic_set(&channel->irq_pending, 0);
1798 wake_up(&card->wait_q);
1799 return rc;
1800 }
1801 rc = wait_event_interruptible_timeout(card->wait_q,
1802 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1803 if (rc == -ERESTARTSYS)
1804 return rc;
1805 if (channel->state != CH_STATE_UP) {
1806 rc = -ETIME;
1807 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1808 qeth_clear_cmd_buffers(channel);
1809 } else
1810 rc = 0;
1811 return rc;
1812 }
1813
1814 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1815 void (*idx_reply_cb)(struct qeth_channel *,
1816 struct qeth_cmd_buffer *))
1817 {
1818 struct qeth_card *card;
1819 struct qeth_cmd_buffer *iob;
1820 unsigned long flags;
1821 __u16 temp;
1822 __u8 tmp;
1823 int rc;
1824 struct ccw_dev_id temp_devid;
1825
1826 card = CARD_FROM_CDEV(channel->ccwdev);
1827
1828 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1829
1830 iob = qeth_get_buffer(channel);
1831 iob->callback = idx_reply_cb;
1832 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1833 channel->ccw.count = IDX_ACTIVATE_SIZE;
1834 channel->ccw.cda = (__u32) __pa(iob->data);
1835 if (channel == &card->write) {
1836 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1837 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1838 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1839 card->seqno.trans_hdr++;
1840 } else {
1841 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1842 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1843 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1844 }
1845 tmp = ((__u8)card->info.portno) | 0x80;
1846 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1847 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1848 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1849 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1850 &card->info.func_level, sizeof(__u16));
1851 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1852 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1853 temp = (card->info.cula << 8) + card->info.unit_addr2;
1854 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1855
1856 wait_event(card->wait_q,
1857 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1858 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1859 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1860 rc = ccw_device_start(channel->ccwdev,
1861 &channel->ccw, (addr_t) iob, 0, 0);
1862 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1863
1864 if (rc) {
1865 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1866 rc);
1867 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1868 atomic_set(&channel->irq_pending, 0);
1869 wake_up(&card->wait_q);
1870 return rc;
1871 }
1872 rc = wait_event_interruptible_timeout(card->wait_q,
1873 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1874 if (rc == -ERESTARTSYS)
1875 return rc;
1876 if (channel->state != CH_STATE_ACTIVATING) {
1877 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1878 " failed to recover an error on the device\n");
1879 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1880 dev_name(&channel->ccwdev->dev));
1881 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1882 qeth_clear_cmd_buffers(channel);
1883 return -ETIME;
1884 }
1885 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1886 }
1887
1888 static int qeth_peer_func_level(int level)
1889 {
1890 if ((level & 0xff) == 8)
1891 return (level & 0xff) + 0x400;
1892 if (((level >> 8) & 3) == 1)
1893 return (level & 0xff) + 0x200;
1894 return level;
1895 }
1896
1897 static void qeth_idx_write_cb(struct qeth_channel *channel,
1898 struct qeth_cmd_buffer *iob)
1899 {
1900 struct qeth_card *card;
1901 __u16 temp;
1902
1903 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1904
1905 if (channel->state == CH_STATE_DOWN) {
1906 channel->state = CH_STATE_ACTIVATING;
1907 goto out;
1908 }
1909 card = CARD_FROM_CDEV(channel->ccwdev);
1910
1911 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1912 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
1913 dev_err(&card->write.ccwdev->dev,
1914 "The adapter is used exclusively by another "
1915 "host\n");
1916 else
1917 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1918 " negative reply\n",
1919 dev_name(&card->write.ccwdev->dev));
1920 goto out;
1921 }
1922 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1923 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1924 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1925 "function level mismatch (sent: 0x%x, received: "
1926 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1927 card->info.func_level, temp);
1928 goto out;
1929 }
1930 channel->state = CH_STATE_UP;
1931 out:
1932 qeth_release_buffer(channel, iob);
1933 }
1934
1935 static void qeth_idx_read_cb(struct qeth_channel *channel,
1936 struct qeth_cmd_buffer *iob)
1937 {
1938 struct qeth_card *card;
1939 __u16 temp;
1940
1941 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1942 if (channel->state == CH_STATE_DOWN) {
1943 channel->state = CH_STATE_ACTIVATING;
1944 goto out;
1945 }
1946
1947 card = CARD_FROM_CDEV(channel->ccwdev);
1948 if (qeth_check_idx_response(card, iob->data))
1949 goto out;
1950
1951 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1952 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1953 case QETH_IDX_ACT_ERR_EXCL:
1954 dev_err(&card->write.ccwdev->dev,
1955 "The adapter is used exclusively by another "
1956 "host\n");
1957 break;
1958 case QETH_IDX_ACT_ERR_AUTH:
1959 case QETH_IDX_ACT_ERR_AUTH_USER:
1960 dev_err(&card->read.ccwdev->dev,
1961 "Setting the device online failed because of "
1962 "insufficient authorization\n");
1963 break;
1964 default:
1965 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1966 " negative reply\n",
1967 dev_name(&card->read.ccwdev->dev));
1968 }
1969 QETH_CARD_TEXT_(card, 2, "idxread%c",
1970 QETH_IDX_ACT_CAUSE_CODE(iob->data));
1971 goto out;
1972 }
1973
1974 /**
1975 * * temporary fix for microcode bug
1976 * * to revert it,replace OR by AND
1977 * */
1978 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1979 (card->info.type == QETH_CARD_TYPE_OSD))
1980 card->info.portname_required = 1;
1981
1982 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1983 if (temp != qeth_peer_func_level(card->info.func_level)) {
1984 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1985 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1986 dev_name(&card->read.ccwdev->dev),
1987 card->info.func_level, temp);
1988 goto out;
1989 }
1990 memcpy(&card->token.issuer_rm_r,
1991 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1992 QETH_MPC_TOKEN_LENGTH);
1993 memcpy(&card->info.mcl_level[0],
1994 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1995 channel->state = CH_STATE_UP;
1996 out:
1997 qeth_release_buffer(channel, iob);
1998 }
1999
2000 void qeth_prepare_control_data(struct qeth_card *card, int len,
2001 struct qeth_cmd_buffer *iob)
2002 {
2003 qeth_setup_ccw(&card->write, iob->data, len);
2004 iob->callback = qeth_release_buffer;
2005
2006 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2007 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2008 card->seqno.trans_hdr++;
2009 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2010 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2011 card->seqno.pdu_hdr++;
2012 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2013 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
2014 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
2015 }
2016 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2017
2018 int qeth_send_control_data(struct qeth_card *card, int len,
2019 struct qeth_cmd_buffer *iob,
2020 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
2021 unsigned long),
2022 void *reply_param)
2023 {
2024 int rc;
2025 unsigned long flags;
2026 struct qeth_reply *reply = NULL;
2027 unsigned long timeout, event_timeout;
2028 struct qeth_ipa_cmd *cmd;
2029
2030 QETH_CARD_TEXT(card, 2, "sendctl");
2031
2032 if (card->read_or_write_problem) {
2033 qeth_release_buffer(iob->channel, iob);
2034 return -EIO;
2035 }
2036 reply = qeth_alloc_reply(card);
2037 if (!reply) {
2038 return -ENOMEM;
2039 }
2040 reply->callback = reply_cb;
2041 reply->param = reply_param;
2042 if (card->state == CARD_STATE_DOWN)
2043 reply->seqno = QETH_IDX_COMMAND_SEQNO;
2044 else
2045 reply->seqno = card->seqno.ipa++;
2046 init_waitqueue_head(&reply->wait_q);
2047 spin_lock_irqsave(&card->lock, flags);
2048 list_add_tail(&reply->list, &card->cmd_waiter_list);
2049 spin_unlock_irqrestore(&card->lock, flags);
2050 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
2051
2052 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
2053 qeth_prepare_control_data(card, len, iob);
2054
2055 if (IS_IPA(iob->data))
2056 event_timeout = QETH_IPA_TIMEOUT;
2057 else
2058 event_timeout = QETH_TIMEOUT;
2059 timeout = jiffies + event_timeout;
2060
2061 QETH_CARD_TEXT(card, 6, "noirqpnd");
2062 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2063 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2064 (addr_t) iob, 0, 0);
2065 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2066 if (rc) {
2067 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2068 "ccw_device_start rc = %i\n",
2069 dev_name(&card->write.ccwdev->dev), rc);
2070 QETH_CARD_TEXT_(card, 2, " err%d", rc);
2071 spin_lock_irqsave(&card->lock, flags);
2072 list_del_init(&reply->list);
2073 qeth_put_reply(reply);
2074 spin_unlock_irqrestore(&card->lock, flags);
2075 qeth_release_buffer(iob->channel, iob);
2076 atomic_set(&card->write.irq_pending, 0);
2077 wake_up(&card->wait_q);
2078 return rc;
2079 }
2080
2081 /* we have only one long running ipassist, since we can ensure
2082 process context of this command we can sleep */
2083 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2084 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2085 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2086 if (!wait_event_timeout(reply->wait_q,
2087 atomic_read(&reply->received), event_timeout))
2088 goto time_err;
2089 } else {
2090 while (!atomic_read(&reply->received)) {
2091 if (time_after(jiffies, timeout))
2092 goto time_err;
2093 cpu_relax();
2094 }
2095 }
2096
2097 if (reply->rc == -EIO)
2098 goto error;
2099 rc = reply->rc;
2100 qeth_put_reply(reply);
2101 return rc;
2102
2103 time_err:
2104 reply->rc = -ETIME;
2105 spin_lock_irqsave(&reply->card->lock, flags);
2106 list_del_init(&reply->list);
2107 spin_unlock_irqrestore(&reply->card->lock, flags);
2108 atomic_inc(&reply->received);
2109 error:
2110 atomic_set(&card->write.irq_pending, 0);
2111 qeth_release_buffer(iob->channel, iob);
2112 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
2113 rc = reply->rc;
2114 qeth_put_reply(reply);
2115 return rc;
2116 }
2117 EXPORT_SYMBOL_GPL(qeth_send_control_data);
2118
2119 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2120 unsigned long data)
2121 {
2122 struct qeth_cmd_buffer *iob;
2123
2124 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
2125
2126 iob = (struct qeth_cmd_buffer *) data;
2127 memcpy(&card->token.cm_filter_r,
2128 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2129 QETH_MPC_TOKEN_LENGTH);
2130 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2131 return 0;
2132 }
2133
2134 static int qeth_cm_enable(struct qeth_card *card)
2135 {
2136 int rc;
2137 struct qeth_cmd_buffer *iob;
2138
2139 QETH_DBF_TEXT(SETUP, 2, "cmenable");
2140
2141 iob = qeth_wait_for_buffer(&card->write);
2142 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2143 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2144 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2145 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2146 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2147
2148 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2149 qeth_cm_enable_cb, NULL);
2150 return rc;
2151 }
2152
2153 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2154 unsigned long data)
2155 {
2156
2157 struct qeth_cmd_buffer *iob;
2158
2159 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
2160
2161 iob = (struct qeth_cmd_buffer *) data;
2162 memcpy(&card->token.cm_connection_r,
2163 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2164 QETH_MPC_TOKEN_LENGTH);
2165 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2166 return 0;
2167 }
2168
2169 static int qeth_cm_setup(struct qeth_card *card)
2170 {
2171 int rc;
2172 struct qeth_cmd_buffer *iob;
2173
2174 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
2175
2176 iob = qeth_wait_for_buffer(&card->write);
2177 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2178 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2179 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2180 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2181 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2182 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2183 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2184 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2185 qeth_cm_setup_cb, NULL);
2186 return rc;
2187
2188 }
2189
2190 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2191 {
2192 switch (card->info.type) {
2193 case QETH_CARD_TYPE_UNKNOWN:
2194 return 1500;
2195 case QETH_CARD_TYPE_IQD:
2196 return card->info.max_mtu;
2197 case QETH_CARD_TYPE_OSD:
2198 switch (card->info.link_type) {
2199 case QETH_LINK_TYPE_HSTR:
2200 case QETH_LINK_TYPE_LANE_TR:
2201 return 2000;
2202 default:
2203 return card->options.layer2 ? 1500 : 1492;
2204 }
2205 case QETH_CARD_TYPE_OSM:
2206 case QETH_CARD_TYPE_OSX:
2207 return card->options.layer2 ? 1500 : 1492;
2208 default:
2209 return 1500;
2210 }
2211 }
2212
2213 static inline int qeth_get_mtu_outof_framesize(int framesize)
2214 {
2215 switch (framesize) {
2216 case 0x4000:
2217 return 8192;
2218 case 0x6000:
2219 return 16384;
2220 case 0xa000:
2221 return 32768;
2222 case 0xffff:
2223 return 57344;
2224 default:
2225 return 0;
2226 }
2227 }
2228
2229 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2230 {
2231 switch (card->info.type) {
2232 case QETH_CARD_TYPE_OSD:
2233 case QETH_CARD_TYPE_OSM:
2234 case QETH_CARD_TYPE_OSX:
2235 case QETH_CARD_TYPE_IQD:
2236 return ((mtu >= 576) &&
2237 (mtu <= card->info.max_mtu));
2238 case QETH_CARD_TYPE_OSN:
2239 case QETH_CARD_TYPE_UNKNOWN:
2240 default:
2241 return 1;
2242 }
2243 }
2244
2245 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2246 unsigned long data)
2247 {
2248
2249 __u16 mtu, framesize;
2250 __u16 len;
2251 __u8 link_type;
2252 struct qeth_cmd_buffer *iob;
2253
2254 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
2255
2256 iob = (struct qeth_cmd_buffer *) data;
2257 memcpy(&card->token.ulp_filter_r,
2258 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2259 QETH_MPC_TOKEN_LENGTH);
2260 if (card->info.type == QETH_CARD_TYPE_IQD) {
2261 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2262 mtu = qeth_get_mtu_outof_framesize(framesize);
2263 if (!mtu) {
2264 iob->rc = -EINVAL;
2265 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2266 return 0;
2267 }
2268 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2269 /* frame size has changed */
2270 if (card->dev &&
2271 ((card->dev->mtu == card->info.initial_mtu) ||
2272 (card->dev->mtu > mtu)))
2273 card->dev->mtu = mtu;
2274 qeth_free_qdio_buffers(card);
2275 }
2276 card->info.initial_mtu = mtu;
2277 card->info.max_mtu = mtu;
2278 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2279 } else {
2280 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2281 iob->data);
2282 card->info.initial_mtu = min(card->info.max_mtu,
2283 qeth_get_initial_mtu_for_card(card));
2284 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2285 }
2286
2287 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2288 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2289 memcpy(&link_type,
2290 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2291 card->info.link_type = link_type;
2292 } else
2293 card->info.link_type = 0;
2294 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
2295 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2296 return 0;
2297 }
2298
2299 static int qeth_ulp_enable(struct qeth_card *card)
2300 {
2301 int rc;
2302 char prot_type;
2303 struct qeth_cmd_buffer *iob;
2304
2305 /*FIXME: trace view callbacks*/
2306 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
2307
2308 iob = qeth_wait_for_buffer(&card->write);
2309 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2310
2311 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2312 (__u8) card->info.portno;
2313 if (card->options.layer2)
2314 if (card->info.type == QETH_CARD_TYPE_OSN)
2315 prot_type = QETH_PROT_OSN2;
2316 else
2317 prot_type = QETH_PROT_LAYER2;
2318 else
2319 prot_type = QETH_PROT_TCPIP;
2320
2321 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2322 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2323 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2324 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2325 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2326 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2327 card->info.portname, 9);
2328 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2329 qeth_ulp_enable_cb, NULL);
2330 return rc;
2331
2332 }
2333
2334 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2335 unsigned long data)
2336 {
2337 struct qeth_cmd_buffer *iob;
2338
2339 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
2340
2341 iob = (struct qeth_cmd_buffer *) data;
2342 memcpy(&card->token.ulp_connection_r,
2343 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2344 QETH_MPC_TOKEN_LENGTH);
2345 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2346 3)) {
2347 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2348 dev_err(&card->gdev->dev, "A connection could not be "
2349 "established because of an OLM limit\n");
2350 iob->rc = -EMLINK;
2351 }
2352 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2353 return 0;
2354 }
2355
2356 static int qeth_ulp_setup(struct qeth_card *card)
2357 {
2358 int rc;
2359 __u16 temp;
2360 struct qeth_cmd_buffer *iob;
2361 struct ccw_dev_id dev_id;
2362
2363 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2364
2365 iob = qeth_wait_for_buffer(&card->write);
2366 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2367
2368 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2369 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2370 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2371 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2372 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2373 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2374
2375 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2376 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2377 temp = (card->info.cula << 8) + card->info.unit_addr2;
2378 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2379 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2380 qeth_ulp_setup_cb, NULL);
2381 return rc;
2382 }
2383
2384 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2385 {
2386 int rc;
2387 struct qeth_qdio_out_buffer *newbuf;
2388
2389 rc = 0;
2390 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2391 if (!newbuf) {
2392 rc = -ENOMEM;
2393 goto out;
2394 }
2395 newbuf->buffer = &q->qdio_bufs[bidx];
2396 skb_queue_head_init(&newbuf->skb_list);
2397 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2398 newbuf->q = q;
2399 newbuf->aob = NULL;
2400 newbuf->next_pending = q->bufs[bidx];
2401 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2402 q->bufs[bidx] = newbuf;
2403 if (q->bufstates) {
2404 q->bufstates[bidx].user = newbuf;
2405 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2406 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2407 QETH_CARD_TEXT_(q->card, 2, "%lx",
2408 (long) newbuf->next_pending);
2409 }
2410 out:
2411 return rc;
2412 }
2413
2414
2415 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2416 {
2417 int i, j;
2418
2419 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2420
2421 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2422 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2423 return 0;
2424
2425 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q),
2426 GFP_KERNEL);
2427 if (!card->qdio.in_q)
2428 goto out_nomem;
2429 QETH_DBF_TEXT(SETUP, 2, "inq");
2430 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2431 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2432 /* give inbound qeth_qdio_buffers their qdio_buffers */
2433 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
2434 card->qdio.in_q->bufs[i].buffer =
2435 &card->qdio.in_q->qdio_bufs[i];
2436 card->qdio.in_q->bufs[i].rx_skb = NULL;
2437 }
2438 /* inbound buffer pool */
2439 if (qeth_alloc_buffer_pool(card))
2440 goto out_freeinq;
2441
2442 /* outbound */
2443 card->qdio.out_qs =
2444 kzalloc(card->qdio.no_out_queues *
2445 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2446 if (!card->qdio.out_qs)
2447 goto out_freepool;
2448 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2449 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q),
2450 GFP_KERNEL);
2451 if (!card->qdio.out_qs[i])
2452 goto out_freeoutq;
2453 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2454 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2455 card->qdio.out_qs[i]->queue_no = i;
2456 /* give outbound qeth_qdio_buffers their qdio_buffers */
2457 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2458 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
2459 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2460 goto out_freeoutqbufs;
2461 }
2462 }
2463
2464 /* completion */
2465 if (qeth_alloc_cq(card))
2466 goto out_freeoutq;
2467
2468 return 0;
2469
2470 out_freeoutqbufs:
2471 while (j > 0) {
2472 --j;
2473 kmem_cache_free(qeth_qdio_outbuf_cache,
2474 card->qdio.out_qs[i]->bufs[j]);
2475 card->qdio.out_qs[i]->bufs[j] = NULL;
2476 }
2477 out_freeoutq:
2478 while (i > 0) {
2479 kfree(card->qdio.out_qs[--i]);
2480 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2481 }
2482 kfree(card->qdio.out_qs);
2483 card->qdio.out_qs = NULL;
2484 out_freepool:
2485 qeth_free_buffer_pool(card);
2486 out_freeinq:
2487 kfree(card->qdio.in_q);
2488 card->qdio.in_q = NULL;
2489 out_nomem:
2490 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2491 return -ENOMEM;
2492 }
2493
2494 static void qeth_create_qib_param_field(struct qeth_card *card,
2495 char *param_field)
2496 {
2497
2498 param_field[0] = _ascebc['P'];
2499 param_field[1] = _ascebc['C'];
2500 param_field[2] = _ascebc['I'];
2501 param_field[3] = _ascebc['T'];
2502 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2503 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2504 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2505 }
2506
2507 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2508 char *param_field)
2509 {
2510 param_field[16] = _ascebc['B'];
2511 param_field[17] = _ascebc['L'];
2512 param_field[18] = _ascebc['K'];
2513 param_field[19] = _ascebc['T'];
2514 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2515 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2516 *((unsigned int *) (&param_field[28])) =
2517 card->info.blkt.inter_packet_jumbo;
2518 }
2519
2520 static int qeth_qdio_activate(struct qeth_card *card)
2521 {
2522 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2523 return qdio_activate(CARD_DDEV(card));
2524 }
2525
2526 static int qeth_dm_act(struct qeth_card *card)
2527 {
2528 int rc;
2529 struct qeth_cmd_buffer *iob;
2530
2531 QETH_DBF_TEXT(SETUP, 2, "dmact");
2532
2533 iob = qeth_wait_for_buffer(&card->write);
2534 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2535
2536 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2537 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2538 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2539 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2540 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2541 return rc;
2542 }
2543
2544 static int qeth_mpc_initialize(struct qeth_card *card)
2545 {
2546 int rc;
2547
2548 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2549
2550 rc = qeth_issue_next_read(card);
2551 if (rc) {
2552 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2553 return rc;
2554 }
2555 rc = qeth_cm_enable(card);
2556 if (rc) {
2557 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2558 goto out_qdio;
2559 }
2560 rc = qeth_cm_setup(card);
2561 if (rc) {
2562 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2563 goto out_qdio;
2564 }
2565 rc = qeth_ulp_enable(card);
2566 if (rc) {
2567 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2568 goto out_qdio;
2569 }
2570 rc = qeth_ulp_setup(card);
2571 if (rc) {
2572 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2573 goto out_qdio;
2574 }
2575 rc = qeth_alloc_qdio_buffers(card);
2576 if (rc) {
2577 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2578 goto out_qdio;
2579 }
2580 rc = qeth_qdio_establish(card);
2581 if (rc) {
2582 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2583 qeth_free_qdio_buffers(card);
2584 goto out_qdio;
2585 }
2586 rc = qeth_qdio_activate(card);
2587 if (rc) {
2588 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2589 goto out_qdio;
2590 }
2591 rc = qeth_dm_act(card);
2592 if (rc) {
2593 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2594 goto out_qdio;
2595 }
2596
2597 return 0;
2598 out_qdio:
2599 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2600 return rc;
2601 }
2602
2603 static void qeth_print_status_with_portname(struct qeth_card *card)
2604 {
2605 char dbf_text[15];
2606 int i;
2607
2608 sprintf(dbf_text, "%s", card->info.portname + 1);
2609 for (i = 0; i < 8; i++)
2610 dbf_text[i] =
2611 (char) _ebcasc[(__u8) dbf_text[i]];
2612 dbf_text[8] = 0;
2613 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2614 "with link type %s (portname: %s)\n",
2615 qeth_get_cardname(card),
2616 (card->info.mcl_level[0]) ? " (level: " : "",
2617 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2618 (card->info.mcl_level[0]) ? ")" : "",
2619 qeth_get_cardname_short(card),
2620 dbf_text);
2621
2622 }
2623
2624 static void qeth_print_status_no_portname(struct qeth_card *card)
2625 {
2626 if (card->info.portname[0])
2627 dev_info(&card->gdev->dev, "Device is a%s "
2628 "card%s%s%s\nwith link type %s "
2629 "(no portname needed by interface).\n",
2630 qeth_get_cardname(card),
2631 (card->info.mcl_level[0]) ? " (level: " : "",
2632 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2633 (card->info.mcl_level[0]) ? ")" : "",
2634 qeth_get_cardname_short(card));
2635 else
2636 dev_info(&card->gdev->dev, "Device is a%s "
2637 "card%s%s%s\nwith link type %s.\n",
2638 qeth_get_cardname(card),
2639 (card->info.mcl_level[0]) ? " (level: " : "",
2640 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2641 (card->info.mcl_level[0]) ? ")" : "",
2642 qeth_get_cardname_short(card));
2643 }
2644
2645 void qeth_print_status_message(struct qeth_card *card)
2646 {
2647 switch (card->info.type) {
2648 case QETH_CARD_TYPE_OSD:
2649 case QETH_CARD_TYPE_OSM:
2650 case QETH_CARD_TYPE_OSX:
2651 /* VM will use a non-zero first character
2652 * to indicate a HiperSockets like reporting
2653 * of the level OSA sets the first character to zero
2654 * */
2655 if (!card->info.mcl_level[0]) {
2656 sprintf(card->info.mcl_level, "%02x%02x",
2657 card->info.mcl_level[2],
2658 card->info.mcl_level[3]);
2659
2660 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2661 break;
2662 }
2663 /* fallthrough */
2664 case QETH_CARD_TYPE_IQD:
2665 if ((card->info.guestlan) ||
2666 (card->info.mcl_level[0] & 0x80)) {
2667 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2668 card->info.mcl_level[0]];
2669 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2670 card->info.mcl_level[1]];
2671 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2672 card->info.mcl_level[2]];
2673 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2674 card->info.mcl_level[3]];
2675 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2676 }
2677 break;
2678 default:
2679 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2680 }
2681 if (card->info.portname_required)
2682 qeth_print_status_with_portname(card);
2683 else
2684 qeth_print_status_no_portname(card);
2685 }
2686 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2687
2688 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2689 {
2690 struct qeth_buffer_pool_entry *entry;
2691
2692 QETH_CARD_TEXT(card, 5, "inwrklst");
2693
2694 list_for_each_entry(entry,
2695 &card->qdio.init_pool.entry_list, init_list) {
2696 qeth_put_buffer_pool_entry(card, entry);
2697 }
2698 }
2699
2700 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2701 struct qeth_card *card)
2702 {
2703 struct list_head *plh;
2704 struct qeth_buffer_pool_entry *entry;
2705 int i, free;
2706 struct page *page;
2707
2708 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2709 return NULL;
2710
2711 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2712 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2713 free = 1;
2714 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2715 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2716 free = 0;
2717 break;
2718 }
2719 }
2720 if (free) {
2721 list_del_init(&entry->list);
2722 return entry;
2723 }
2724 }
2725
2726 /* no free buffer in pool so take first one and swap pages */
2727 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2728 struct qeth_buffer_pool_entry, list);
2729 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2730 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2731 page = alloc_page(GFP_ATOMIC);
2732 if (!page) {
2733 return NULL;
2734 } else {
2735 free_page((unsigned long)entry->elements[i]);
2736 entry->elements[i] = page_address(page);
2737 if (card->options.performance_stats)
2738 card->perf_stats.sg_alloc_page_rx++;
2739 }
2740 }
2741 }
2742 list_del_init(&entry->list);
2743 return entry;
2744 }
2745
2746 static int qeth_init_input_buffer(struct qeth_card *card,
2747 struct qeth_qdio_buffer *buf)
2748 {
2749 struct qeth_buffer_pool_entry *pool_entry;
2750 int i;
2751
2752 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2753 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2754 if (!buf->rx_skb)
2755 return 1;
2756 }
2757
2758 pool_entry = qeth_find_free_buffer_pool_entry(card);
2759 if (!pool_entry)
2760 return 1;
2761
2762 /*
2763 * since the buffer is accessed only from the input_tasklet
2764 * there shouldn't be a need to synchronize; also, since we use
2765 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2766 * buffers
2767 */
2768
2769 buf->pool_entry = pool_entry;
2770 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2771 buf->buffer->element[i].length = PAGE_SIZE;
2772 buf->buffer->element[i].addr = pool_entry->elements[i];
2773 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2774 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
2775 else
2776 buf->buffer->element[i].eflags = 0;
2777 buf->buffer->element[i].sflags = 0;
2778 }
2779 return 0;
2780 }
2781
2782 int qeth_init_qdio_queues(struct qeth_card *card)
2783 {
2784 int i, j;
2785 int rc;
2786
2787 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2788
2789 /* inbound queue */
2790 memset(card->qdio.in_q->qdio_bufs, 0,
2791 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2792 qeth_initialize_working_pool_list(card);
2793 /*give only as many buffers to hardware as we have buffer pool entries*/
2794 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2795 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2796 card->qdio.in_q->next_buf_to_init =
2797 card->qdio.in_buf_pool.buf_count - 1;
2798 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2799 card->qdio.in_buf_pool.buf_count - 1);
2800 if (rc) {
2801 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2802 return rc;
2803 }
2804
2805 /* completion */
2806 rc = qeth_cq_init(card);
2807 if (rc) {
2808 return rc;
2809 }
2810
2811 /* outbound queue */
2812 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2813 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2814 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2815 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2816 qeth_clear_output_buffer(card->qdio.out_qs[i],
2817 card->qdio.out_qs[i]->bufs[j],
2818 QETH_QDIO_BUF_EMPTY);
2819 }
2820 card->qdio.out_qs[i]->card = card;
2821 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2822 card->qdio.out_qs[i]->do_pack = 0;
2823 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2824 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2825 atomic_set(&card->qdio.out_qs[i]->state,
2826 QETH_OUT_Q_UNLOCKED);
2827 }
2828 return 0;
2829 }
2830 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2831
2832 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2833 {
2834 switch (link_type) {
2835 case QETH_LINK_TYPE_HSTR:
2836 return 2;
2837 default:
2838 return 1;
2839 }
2840 }
2841
2842 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2843 struct qeth_ipa_cmd *cmd, __u8 command,
2844 enum qeth_prot_versions prot)
2845 {
2846 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2847 cmd->hdr.command = command;
2848 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2849 cmd->hdr.seqno = card->seqno.ipa;
2850 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2851 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2852 if (card->options.layer2)
2853 cmd->hdr.prim_version_no = 2;
2854 else
2855 cmd->hdr.prim_version_no = 1;
2856 cmd->hdr.param_count = 1;
2857 cmd->hdr.prot_version = prot;
2858 cmd->hdr.ipa_supported = 0;
2859 cmd->hdr.ipa_enabled = 0;
2860 }
2861
2862 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2863 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2864 {
2865 struct qeth_cmd_buffer *iob;
2866 struct qeth_ipa_cmd *cmd;
2867
2868 iob = qeth_wait_for_buffer(&card->write);
2869 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2870 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2871
2872 return iob;
2873 }
2874 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2875
2876 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2877 char prot_type)
2878 {
2879 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2880 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2881 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2882 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2883 }
2884 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2885
2886 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2887 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2888 unsigned long),
2889 void *reply_param)
2890 {
2891 int rc;
2892 char prot_type;
2893
2894 QETH_CARD_TEXT(card, 4, "sendipa");
2895
2896 if (card->options.layer2)
2897 if (card->info.type == QETH_CARD_TYPE_OSN)
2898 prot_type = QETH_PROT_OSN2;
2899 else
2900 prot_type = QETH_PROT_LAYER2;
2901 else
2902 prot_type = QETH_PROT_TCPIP;
2903 qeth_prepare_ipa_cmd(card, iob, prot_type);
2904 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2905 iob, reply_cb, reply_param);
2906 if (rc == -ETIME) {
2907 qeth_clear_ipacmd_list(card);
2908 qeth_schedule_recovery(card);
2909 }
2910 return rc;
2911 }
2912 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2913
2914 int qeth_send_startlan(struct qeth_card *card)
2915 {
2916 int rc;
2917 struct qeth_cmd_buffer *iob;
2918
2919 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2920
2921 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2922 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2923 return rc;
2924 }
2925 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2926
2927 static int qeth_default_setadapterparms_cb(struct qeth_card *card,
2928 struct qeth_reply *reply, unsigned long data)
2929 {
2930 struct qeth_ipa_cmd *cmd;
2931
2932 QETH_CARD_TEXT(card, 4, "defadpcb");
2933
2934 cmd = (struct qeth_ipa_cmd *) data;
2935 if (cmd->hdr.return_code == 0)
2936 cmd->hdr.return_code =
2937 cmd->data.setadapterparms.hdr.return_code;
2938 return 0;
2939 }
2940
2941 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2942 struct qeth_reply *reply, unsigned long data)
2943 {
2944 struct qeth_ipa_cmd *cmd;
2945
2946 QETH_CARD_TEXT(card, 3, "quyadpcb");
2947
2948 cmd = (struct qeth_ipa_cmd *) data;
2949 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
2950 card->info.link_type =
2951 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2952 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2953 }
2954 card->options.adp.supported_funcs =
2955 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2956 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2957 }
2958
2959 static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2960 __u32 command, __u32 cmdlen)
2961 {
2962 struct qeth_cmd_buffer *iob;
2963 struct qeth_ipa_cmd *cmd;
2964
2965 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2966 QETH_PROT_IPV4);
2967 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2968 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2969 cmd->data.setadapterparms.hdr.command_code = command;
2970 cmd->data.setadapterparms.hdr.used_total = 1;
2971 cmd->data.setadapterparms.hdr.seq_no = 1;
2972
2973 return iob;
2974 }
2975
2976 int qeth_query_setadapterparms(struct qeth_card *card)
2977 {
2978 int rc;
2979 struct qeth_cmd_buffer *iob;
2980
2981 QETH_CARD_TEXT(card, 3, "queryadp");
2982 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2983 sizeof(struct qeth_ipacmd_setadpparms));
2984 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2985 return rc;
2986 }
2987 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2988
2989 static int qeth_query_ipassists_cb(struct qeth_card *card,
2990 struct qeth_reply *reply, unsigned long data)
2991 {
2992 struct qeth_ipa_cmd *cmd;
2993
2994 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2995
2996 cmd = (struct qeth_ipa_cmd *) data;
2997
2998 switch (cmd->hdr.return_code) {
2999 case IPA_RC_NOTSUPP:
3000 case IPA_RC_L2_UNSUPPORTED_CMD:
3001 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
3002 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
3003 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
3004 return -0;
3005 default:
3006 if (cmd->hdr.return_code) {
3007 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
3008 "rc=%d\n",
3009 dev_name(&card->gdev->dev),
3010 cmd->hdr.return_code);
3011 return 0;
3012 }
3013 }
3014
3015 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3016 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3017 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
3018 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
3019 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3020 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
3021 } else
3022 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3023 "\n", dev_name(&card->gdev->dev));
3024 return 0;
3025 }
3026
3027 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
3028 {
3029 int rc;
3030 struct qeth_cmd_buffer *iob;
3031
3032 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3033 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
3034 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3035 return rc;
3036 }
3037 EXPORT_SYMBOL_GPL(qeth_query_ipassists);
3038
3039 static int qeth_query_setdiagass_cb(struct qeth_card *card,
3040 struct qeth_reply *reply, unsigned long data)
3041 {
3042 struct qeth_ipa_cmd *cmd;
3043 __u16 rc;
3044
3045 cmd = (struct qeth_ipa_cmd *)data;
3046 rc = cmd->hdr.return_code;
3047 if (rc)
3048 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3049 else
3050 card->info.diagass_support = cmd->data.diagass.ext;
3051 return 0;
3052 }
3053
3054 static int qeth_query_setdiagass(struct qeth_card *card)
3055 {
3056 struct qeth_cmd_buffer *iob;
3057 struct qeth_ipa_cmd *cmd;
3058
3059 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3060 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3061 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3062 cmd->data.diagass.subcmd_len = 16;
3063 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3064 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3065 }
3066
3067 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3068 {
3069 unsigned long info = get_zeroed_page(GFP_KERNEL);
3070 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3071 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3072 struct ccw_dev_id ccwid;
3073 int level;
3074
3075 tid->chpid = card->info.chpid;
3076 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3077 tid->ssid = ccwid.ssid;
3078 tid->devno = ccwid.devno;
3079 if (!info)
3080 return;
3081 level = stsi(NULL, 0, 0, 0);
3082 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
3083 tid->lparnr = info222->lpar_number;
3084 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
3085 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3086 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3087 }
3088 free_page(info);
3089 return;
3090 }
3091
3092 static int qeth_hw_trap_cb(struct qeth_card *card,
3093 struct qeth_reply *reply, unsigned long data)
3094 {
3095 struct qeth_ipa_cmd *cmd;
3096 __u16 rc;
3097
3098 cmd = (struct qeth_ipa_cmd *)data;
3099 rc = cmd->hdr.return_code;
3100 if (rc)
3101 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3102 return 0;
3103 }
3104
3105 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3106 {
3107 struct qeth_cmd_buffer *iob;
3108 struct qeth_ipa_cmd *cmd;
3109
3110 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3111 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3112 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3113 cmd->data.diagass.subcmd_len = 80;
3114 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3115 cmd->data.diagass.type = 1;
3116 cmd->data.diagass.action = action;
3117 switch (action) {
3118 case QETH_DIAGS_TRAP_ARM:
3119 cmd->data.diagass.options = 0x0003;
3120 cmd->data.diagass.ext = 0x00010000 +
3121 sizeof(struct qeth_trap_id);
3122 qeth_get_trap_id(card,
3123 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3124 break;
3125 case QETH_DIAGS_TRAP_DISARM:
3126 cmd->data.diagass.options = 0x0001;
3127 break;
3128 case QETH_DIAGS_TRAP_CAPTURE:
3129 break;
3130 }
3131 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3132 }
3133 EXPORT_SYMBOL_GPL(qeth_hw_trap);
3134
3135 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3136 unsigned int qdio_error, const char *dbftext)
3137 {
3138 if (qdio_error) {
3139 QETH_CARD_TEXT(card, 2, dbftext);
3140 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3141 buf->element[15].sflags);
3142 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3143 buf->element[14].sflags);
3144 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3145 if ((buf->element[15].sflags) == 0x12) {
3146 card->stats.rx_dropped++;
3147 return 0;
3148 } else
3149 return 1;
3150 }
3151 return 0;
3152 }
3153 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3154
3155 void qeth_buffer_reclaim_work(struct work_struct *work)
3156 {
3157 struct qeth_card *card = container_of(work, struct qeth_card,
3158 buffer_reclaim_work.work);
3159
3160 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3161 qeth_queue_input_buffer(card, card->reclaim_index);
3162 }
3163
3164 void qeth_queue_input_buffer(struct qeth_card *card, int index)
3165 {
3166 struct qeth_qdio_q *queue = card->qdio.in_q;
3167 struct list_head *lh;
3168 int count;
3169 int i;
3170 int rc;
3171 int newcount = 0;
3172
3173 count = (index < queue->next_buf_to_init)?
3174 card->qdio.in_buf_pool.buf_count -
3175 (queue->next_buf_to_init - index) :
3176 card->qdio.in_buf_pool.buf_count -
3177 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3178 /* only requeue at a certain threshold to avoid SIGAs */
3179 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3180 for (i = queue->next_buf_to_init;
3181 i < queue->next_buf_to_init + count; ++i) {
3182 if (qeth_init_input_buffer(card,
3183 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3184 break;
3185 } else {
3186 newcount++;
3187 }
3188 }
3189
3190 if (newcount < count) {
3191 /* we are in memory shortage so we switch back to
3192 traditional skb allocation and drop packages */
3193 atomic_set(&card->force_alloc_skb, 3);
3194 count = newcount;
3195 } else {
3196 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3197 }
3198
3199 if (!count) {
3200 i = 0;
3201 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3202 i++;
3203 if (i == card->qdio.in_buf_pool.buf_count) {
3204 QETH_CARD_TEXT(card, 2, "qsarbw");
3205 card->reclaim_index = index;
3206 schedule_delayed_work(
3207 &card->buffer_reclaim_work,
3208 QETH_RECLAIM_WORK_TIME);
3209 }
3210 return;
3211 }
3212
3213 /*
3214 * according to old code it should be avoided to requeue all
3215 * 128 buffers in order to benefit from PCI avoidance.
3216 * this function keeps at least one buffer (the buffer at
3217 * 'index') un-requeued -> this buffer is the first buffer that
3218 * will be requeued the next time
3219 */
3220 if (card->options.performance_stats) {
3221 card->perf_stats.inbound_do_qdio_cnt++;
3222 card->perf_stats.inbound_do_qdio_start_time =
3223 qeth_get_micros();
3224 }
3225 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3226 queue->next_buf_to_init, count);
3227 if (card->options.performance_stats)
3228 card->perf_stats.inbound_do_qdio_time +=
3229 qeth_get_micros() -
3230 card->perf_stats.inbound_do_qdio_start_time;
3231 if (rc) {
3232 QETH_CARD_TEXT(card, 2, "qinberr");
3233 }
3234 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3235 QDIO_MAX_BUFFERS_PER_Q;
3236 }
3237 }
3238 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3239
3240 static int qeth_handle_send_error(struct qeth_card *card,
3241 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
3242 {
3243 int sbalf15 = buffer->buffer->element[15].sflags;
3244
3245 QETH_CARD_TEXT(card, 6, "hdsnderr");
3246 if (card->info.type == QETH_CARD_TYPE_IQD) {
3247 if (sbalf15 == 0) {
3248 qdio_err = 0;
3249 } else {
3250 qdio_err = 1;
3251 }
3252 }
3253 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
3254
3255 if (!qdio_err)
3256 return QETH_SEND_ERROR_NONE;
3257
3258 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3259 return QETH_SEND_ERROR_RETRY;
3260
3261 QETH_CARD_TEXT(card, 1, "lnkfail");
3262 QETH_CARD_TEXT_(card, 1, "%04x %02x",
3263 (u16)qdio_err, (u8)sbalf15);
3264 return QETH_SEND_ERROR_LINK_FAILURE;
3265 }
3266
3267 /*
3268 * Switched to packing state if the number of used buffers on a queue
3269 * reaches a certain limit.
3270 */
3271 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3272 {
3273 if (!queue->do_pack) {
3274 if (atomic_read(&queue->used_buffers)
3275 >= QETH_HIGH_WATERMARK_PACK){
3276 /* switch non-PACKING -> PACKING */
3277 QETH_CARD_TEXT(queue->card, 6, "np->pack");
3278 if (queue->card->options.performance_stats)
3279 queue->card->perf_stats.sc_dp_p++;
3280 queue->do_pack = 1;
3281 }
3282 }
3283 }
3284
3285 /*
3286 * Switches from packing to non-packing mode. If there is a packing
3287 * buffer on the queue this buffer will be prepared to be flushed.
3288 * In that case 1 is returned to inform the caller. If no buffer
3289 * has to be flushed, zero is returned.
3290 */
3291 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3292 {
3293 struct qeth_qdio_out_buffer *buffer;
3294 int flush_count = 0;
3295
3296 if (queue->do_pack) {
3297 if (atomic_read(&queue->used_buffers)
3298 <= QETH_LOW_WATERMARK_PACK) {
3299 /* switch PACKING -> non-PACKING */
3300 QETH_CARD_TEXT(queue->card, 6, "pack->np");
3301 if (queue->card->options.performance_stats)
3302 queue->card->perf_stats.sc_p_dp++;
3303 queue->do_pack = 0;
3304 /* flush packing buffers */
3305 buffer = queue->bufs[queue->next_buf_to_fill];
3306 if ((atomic_read(&buffer->state) ==
3307 QETH_QDIO_BUF_EMPTY) &&
3308 (buffer->next_element_to_fill > 0)) {
3309 atomic_set(&buffer->state,
3310 QETH_QDIO_BUF_PRIMED);
3311 flush_count++;
3312 queue->next_buf_to_fill =
3313 (queue->next_buf_to_fill + 1) %
3314 QDIO_MAX_BUFFERS_PER_Q;
3315 }
3316 }
3317 }
3318 return flush_count;
3319 }
3320
3321
3322 /*
3323 * Called to flush a packing buffer if no more pci flags are on the queue.
3324 * Checks if there is a packing buffer and prepares it to be flushed.
3325 * In that case returns 1, otherwise zero.
3326 */
3327 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3328 {
3329 struct qeth_qdio_out_buffer *buffer;
3330
3331 buffer = queue->bufs[queue->next_buf_to_fill];
3332 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3333 (buffer->next_element_to_fill > 0)) {
3334 /* it's a packing buffer */
3335 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3336 queue->next_buf_to_fill =
3337 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3338 return 1;
3339 }
3340 return 0;
3341 }
3342
3343 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3344 int count)
3345 {
3346 struct qeth_qdio_out_buffer *buf;
3347 int rc;
3348 int i;
3349 unsigned int qdio_flags;
3350
3351 for (i = index; i < index + count; ++i) {
3352 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3353 buf = queue->bufs[bidx];
3354 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3355 SBAL_EFLAGS_LAST_ENTRY;
3356
3357 if (queue->bufstates)
3358 queue->bufstates[bidx].user = buf;
3359
3360 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3361 continue;
3362
3363 if (!queue->do_pack) {
3364 if ((atomic_read(&queue->used_buffers) >=
3365 (QETH_HIGH_WATERMARK_PACK -
3366 QETH_WATERMARK_PACK_FUZZ)) &&
3367 !atomic_read(&queue->set_pci_flags_count)) {
3368 /* it's likely that we'll go to packing
3369 * mode soon */
3370 atomic_inc(&queue->set_pci_flags_count);
3371 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3372 }
3373 } else {
3374 if (!atomic_read(&queue->set_pci_flags_count)) {
3375 /*
3376 * there's no outstanding PCI any more, so we
3377 * have to request a PCI to be sure the the PCI
3378 * will wake at some time in the future then we
3379 * can flush packed buffers that might still be
3380 * hanging around, which can happen if no
3381 * further send was requested by the stack
3382 */
3383 atomic_inc(&queue->set_pci_flags_count);
3384 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3385 }
3386 }
3387 }
3388
3389 queue->card->dev->trans_start = jiffies;
3390 if (queue->card->options.performance_stats) {
3391 queue->card->perf_stats.outbound_do_qdio_cnt++;
3392 queue->card->perf_stats.outbound_do_qdio_start_time =
3393 qeth_get_micros();
3394 }
3395 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
3396 if (atomic_read(&queue->set_pci_flags_count))
3397 qdio_flags |= QDIO_FLAG_PCI_OUT;
3398 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
3399 queue->queue_no, index, count);
3400 if (queue->card->options.performance_stats)
3401 queue->card->perf_stats.outbound_do_qdio_time +=
3402 qeth_get_micros() -
3403 queue->card->perf_stats.outbound_do_qdio_start_time;
3404 atomic_add(count, &queue->used_buffers);
3405 if (rc) {
3406 queue->card->stats.tx_errors += count;
3407 /* ignore temporary SIGA errors without busy condition */
3408 if (rc == -ENOBUFS)
3409 return;
3410 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
3411 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3412 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3413 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
3414 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
3415
3416 /* this must not happen under normal circumstances. if it
3417 * happens something is really wrong -> recover */
3418 qeth_schedule_recovery(queue->card);
3419 return;
3420 }
3421 if (queue->card->options.performance_stats)
3422 queue->card->perf_stats.bufs_sent += count;
3423 }
3424
3425 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3426 {
3427 int index;
3428 int flush_cnt = 0;
3429 int q_was_packing = 0;
3430
3431 /*
3432 * check if weed have to switch to non-packing mode or if
3433 * we have to get a pci flag out on the queue
3434 */
3435 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3436 !atomic_read(&queue->set_pci_flags_count)) {
3437 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3438 QETH_OUT_Q_UNLOCKED) {
3439 /*
3440 * If we get in here, there was no action in
3441 * do_send_packet. So, we check if there is a
3442 * packing buffer to be flushed here.
3443 */
3444 netif_stop_queue(queue->card->dev);
3445 index = queue->next_buf_to_fill;
3446 q_was_packing = queue->do_pack;
3447 /* queue->do_pack may change */
3448 barrier();
3449 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3450 if (!flush_cnt &&
3451 !atomic_read(&queue->set_pci_flags_count))
3452 flush_cnt +=
3453 qeth_flush_buffers_on_no_pci(queue);
3454 if (queue->card->options.performance_stats &&
3455 q_was_packing)
3456 queue->card->perf_stats.bufs_sent_pack +=
3457 flush_cnt;
3458 if (flush_cnt)
3459 qeth_flush_buffers(queue, index, flush_cnt);
3460 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3461 }
3462 }
3463 }
3464
3465 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3466 unsigned long card_ptr)
3467 {
3468 struct qeth_card *card = (struct qeth_card *)card_ptr;
3469
3470 if (card->dev && (card->dev->flags & IFF_UP))
3471 napi_schedule(&card->napi);
3472 }
3473 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3474
3475 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3476 {
3477 int rc;
3478
3479 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3480 rc = -1;
3481 goto out;
3482 } else {
3483 if (card->options.cq == cq) {
3484 rc = 0;
3485 goto out;
3486 }
3487
3488 if (card->state != CARD_STATE_DOWN &&
3489 card->state != CARD_STATE_RECOVER) {
3490 rc = -1;
3491 goto out;
3492 }
3493
3494 qeth_free_qdio_buffers(card);
3495 card->options.cq = cq;
3496 rc = 0;
3497 }
3498 out:
3499 return rc;
3500
3501 }
3502 EXPORT_SYMBOL_GPL(qeth_configure_cq);
3503
3504
3505 static void qeth_qdio_cq_handler(struct qeth_card *card,
3506 unsigned int qdio_err,
3507 unsigned int queue, int first_element, int count) {
3508 struct qeth_qdio_q *cq = card->qdio.c_q;
3509 int i;
3510 int rc;
3511
3512 if (!qeth_is_cq(card, queue))
3513 goto out;
3514
3515 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3516 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3517 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3518
3519 if (qdio_err) {
3520 netif_stop_queue(card->dev);
3521 qeth_schedule_recovery(card);
3522 goto out;
3523 }
3524
3525 if (card->options.performance_stats) {
3526 card->perf_stats.cq_cnt++;
3527 card->perf_stats.cq_start_time = qeth_get_micros();
3528 }
3529
3530 for (i = first_element; i < first_element + count; ++i) {
3531 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3532 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
3533 int e;
3534
3535 e = 0;
3536 while (buffer->element[e].addr) {
3537 unsigned long phys_aob_addr;
3538
3539 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3540 qeth_qdio_handle_aob(card, phys_aob_addr);
3541 buffer->element[e].addr = NULL;
3542 buffer->element[e].eflags = 0;
3543 buffer->element[e].sflags = 0;
3544 buffer->element[e].length = 0;
3545
3546 ++e;
3547 }
3548
3549 buffer->element[15].eflags = 0;
3550 buffer->element[15].sflags = 0;
3551 }
3552 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3553 card->qdio.c_q->next_buf_to_init,
3554 count);
3555 if (rc) {
3556 dev_warn(&card->gdev->dev,
3557 "QDIO reported an error, rc=%i\n", rc);
3558 QETH_CARD_TEXT(card, 2, "qcqherr");
3559 }
3560 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3561 + count) % QDIO_MAX_BUFFERS_PER_Q;
3562
3563 netif_wake_queue(card->dev);
3564
3565 if (card->options.performance_stats) {
3566 int delta_t = qeth_get_micros();
3567 delta_t -= card->perf_stats.cq_start_time;
3568 card->perf_stats.cq_time += delta_t;
3569 }
3570 out:
3571 return;
3572 }
3573
3574 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
3575 unsigned int queue, int first_elem, int count,
3576 unsigned long card_ptr)
3577 {
3578 struct qeth_card *card = (struct qeth_card *)card_ptr;
3579
3580 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3581 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3582
3583 if (qeth_is_cq(card, queue))
3584 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3585 else if (qdio_err)
3586 qeth_schedule_recovery(card);
3587
3588
3589 }
3590 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3591
3592 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3593 unsigned int qdio_error, int __queue, int first_element,
3594 int count, unsigned long card_ptr)
3595 {
3596 struct qeth_card *card = (struct qeth_card *) card_ptr;
3597 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3598 struct qeth_qdio_out_buffer *buffer;
3599 int i;
3600
3601 QETH_CARD_TEXT(card, 6, "qdouhdl");
3602 if (qdio_error & QDIO_ERROR_FATAL) {
3603 QETH_CARD_TEXT(card, 2, "achkcond");
3604 netif_stop_queue(card->dev);
3605 qeth_schedule_recovery(card);
3606 return;
3607 }
3608 if (card->options.performance_stats) {
3609 card->perf_stats.outbound_handler_cnt++;
3610 card->perf_stats.outbound_handler_start_time =
3611 qeth_get_micros();
3612 }
3613 for (i = first_element; i < (first_element + count); ++i) {
3614 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3615 buffer = queue->bufs[bidx];
3616 qeth_handle_send_error(card, buffer, qdio_error);
3617
3618 if (queue->bufstates &&
3619 (queue->bufstates[bidx].flags &
3620 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
3621 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
3622
3623 if (atomic_cmpxchg(&buffer->state,
3624 QETH_QDIO_BUF_PRIMED,
3625 QETH_QDIO_BUF_PENDING) ==
3626 QETH_QDIO_BUF_PRIMED) {
3627 qeth_notify_skbs(queue, buffer,
3628 TX_NOTIFY_PENDING);
3629 }
3630 buffer->aob = queue->bufstates[bidx].aob;
3631 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
3632 QETH_CARD_TEXT(queue->card, 5, "aob");
3633 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3634 virt_to_phys(buffer->aob));
3635 if (qeth_init_qdio_out_buf(queue, bidx)) {
3636 QETH_CARD_TEXT(card, 2, "outofbuf");
3637 qeth_schedule_recovery(card);
3638 }
3639 } else {
3640 if (card->options.cq == QETH_CQ_ENABLED) {
3641 enum iucv_tx_notify n;
3642
3643 n = qeth_compute_cq_notification(
3644 buffer->buffer->element[15].sflags, 0);
3645 qeth_notify_skbs(queue, buffer, n);
3646 }
3647
3648 qeth_clear_output_buffer(queue, buffer,
3649 QETH_QDIO_BUF_EMPTY);
3650 }
3651 qeth_cleanup_handled_pending(queue, bidx, 0);
3652 }
3653 atomic_sub(count, &queue->used_buffers);
3654 /* check if we need to do something on this outbound queue */
3655 if (card->info.type != QETH_CARD_TYPE_IQD)
3656 qeth_check_outbound_queue(queue);
3657
3658 netif_wake_queue(queue->card->dev);
3659 if (card->options.performance_stats)
3660 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3661 card->perf_stats.outbound_handler_start_time;
3662 }
3663 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3664
3665 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3666 int ipv, int cast_type)
3667 {
3668 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
3669 card->info.type == QETH_CARD_TYPE_OSX))
3670 return card->qdio.default_out_queue;
3671 switch (card->qdio.no_out_queues) {
3672 case 4:
3673 if (cast_type && card->info.is_multicast_different)
3674 return card->info.is_multicast_different &
3675 (card->qdio.no_out_queues - 1);
3676 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3677 const u8 tos = ip_hdr(skb)->tos;
3678
3679 if (card->qdio.do_prio_queueing ==
3680 QETH_PRIO_Q_ING_TOS) {
3681 if (tos & IP_TOS_NOTIMPORTANT)
3682 return 3;
3683 if (tos & IP_TOS_HIGHRELIABILITY)
3684 return 2;
3685 if (tos & IP_TOS_HIGHTHROUGHPUT)
3686 return 1;
3687 if (tos & IP_TOS_LOWDELAY)
3688 return 0;
3689 }
3690 if (card->qdio.do_prio_queueing ==
3691 QETH_PRIO_Q_ING_PREC)
3692 return 3 - (tos >> 6);
3693 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3694 /* TODO: IPv6!!! */
3695 }
3696 return card->qdio.default_out_queue;
3697 case 1: /* fallthrough for single-out-queue 1920-device */
3698 default:
3699 return card->qdio.default_out_queue;
3700 }
3701 }
3702 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3703
3704 int qeth_get_elements_for_frags(struct sk_buff *skb)
3705 {
3706 int cnt, length, e, elements = 0;
3707 struct skb_frag_struct *frag;
3708 char *data;
3709
3710 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3711 frag = &skb_shinfo(skb)->frags[cnt];
3712 data = (char *)page_to_phys(skb_frag_page(frag)) +
3713 frag->page_offset;
3714 length = frag->size;
3715 e = PFN_UP((unsigned long)data + length - 1) -
3716 PFN_DOWN((unsigned long)data);
3717 elements += e;
3718 }
3719 return elements;
3720 }
3721 EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
3722
3723 int qeth_get_elements_no(struct qeth_card *card,
3724 struct sk_buff *skb, int elems)
3725 {
3726 int dlen = skb->len - skb->data_len;
3727 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3728 PFN_DOWN((unsigned long)skb->data);
3729
3730 elements_needed += qeth_get_elements_for_frags(skb);
3731
3732 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3733 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
3734 "(Number=%d / Length=%d). Discarded.\n",
3735 (elements_needed+elems), skb->len);
3736 return 0;
3737 }
3738 return elements_needed;
3739 }
3740 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3741
3742 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
3743 {
3744 int hroom, inpage, rest;
3745
3746 if (((unsigned long)skb->data & PAGE_MASK) !=
3747 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3748 hroom = skb_headroom(skb);
3749 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3750 rest = len - inpage;
3751 if (rest > hroom)
3752 return 1;
3753 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3754 skb->data -= rest;
3755 skb->tail -= rest;
3756 *hdr = (struct qeth_hdr *)skb->data;
3757 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3758 }
3759 return 0;
3760 }
3761 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3762
3763 static inline void __qeth_fill_buffer(struct sk_buff *skb,
3764 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3765 int offset)
3766 {
3767 int length = skb->len - skb->data_len;
3768 int length_here;
3769 int element;
3770 char *data;
3771 int first_lap, cnt;
3772 struct skb_frag_struct *frag;
3773
3774 element = *next_element_to_fill;
3775 data = skb->data;
3776 first_lap = (is_tso == 0 ? 1 : 0);
3777
3778 if (offset >= 0) {
3779 data = skb->data + offset;
3780 length -= offset;
3781 first_lap = 0;
3782 }
3783
3784 while (length > 0) {
3785 /* length_here is the remaining amount of data in this page */
3786 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3787 if (length < length_here)
3788 length_here = length;
3789
3790 buffer->element[element].addr = data;
3791 buffer->element[element].length = length_here;
3792 length -= length_here;
3793 if (!length) {
3794 if (first_lap)
3795 if (skb_shinfo(skb)->nr_frags)
3796 buffer->element[element].eflags =
3797 SBAL_EFLAGS_FIRST_FRAG;
3798 else
3799 buffer->element[element].eflags = 0;
3800 else
3801 buffer->element[element].eflags =
3802 SBAL_EFLAGS_MIDDLE_FRAG;
3803 } else {
3804 if (first_lap)
3805 buffer->element[element].eflags =
3806 SBAL_EFLAGS_FIRST_FRAG;
3807 else
3808 buffer->element[element].eflags =
3809 SBAL_EFLAGS_MIDDLE_FRAG;
3810 }
3811 data += length_here;
3812 element++;
3813 first_lap = 0;
3814 }
3815
3816 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3817 frag = &skb_shinfo(skb)->frags[cnt];
3818 data = (char *)page_to_phys(skb_frag_page(frag)) +
3819 frag->page_offset;
3820 length = frag->size;
3821 while (length > 0) {
3822 length_here = PAGE_SIZE -
3823 ((unsigned long) data % PAGE_SIZE);
3824 if (length < length_here)
3825 length_here = length;
3826
3827 buffer->element[element].addr = data;
3828 buffer->element[element].length = length_here;
3829 buffer->element[element].eflags =
3830 SBAL_EFLAGS_MIDDLE_FRAG;
3831 length -= length_here;
3832 data += length_here;
3833 element++;
3834 }
3835 }
3836
3837 if (buffer->element[element - 1].eflags)
3838 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
3839 *next_element_to_fill = element;
3840 }
3841
3842 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3843 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3844 struct qeth_hdr *hdr, int offset, int hd_len)
3845 {
3846 struct qdio_buffer *buffer;
3847 int flush_cnt = 0, hdr_len, large_send = 0;
3848
3849 buffer = buf->buffer;
3850 atomic_inc(&skb->users);
3851 skb_queue_tail(&buf->skb_list, skb);
3852
3853 /*check first on TSO ....*/
3854 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3855 int element = buf->next_element_to_fill;
3856
3857 hdr_len = sizeof(struct qeth_hdr_tso) +
3858 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3859 /*fill first buffer entry only with header information */
3860 buffer->element[element].addr = skb->data;
3861 buffer->element[element].length = hdr_len;
3862 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
3863 buf->next_element_to_fill++;
3864 skb->data += hdr_len;
3865 skb->len -= hdr_len;
3866 large_send = 1;
3867 }
3868
3869 if (offset >= 0) {
3870 int element = buf->next_element_to_fill;
3871 buffer->element[element].addr = hdr;
3872 buffer->element[element].length = sizeof(struct qeth_hdr) +
3873 hd_len;
3874 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
3875 buf->is_header[element] = 1;
3876 buf->next_element_to_fill++;
3877 }
3878
3879 __qeth_fill_buffer(skb, buffer, large_send,
3880 (int *)&buf->next_element_to_fill, offset);
3881
3882 if (!queue->do_pack) {
3883 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
3884 /* set state to PRIMED -> will be flushed */
3885 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3886 flush_cnt = 1;
3887 } else {
3888 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
3889 if (queue->card->options.performance_stats)
3890 queue->card->perf_stats.skbs_sent_pack++;
3891 if (buf->next_element_to_fill >=
3892 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3893 /*
3894 * packed buffer if full -> set state PRIMED
3895 * -> will be flushed
3896 */
3897 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3898 flush_cnt = 1;
3899 }
3900 }
3901 return flush_cnt;
3902 }
3903
3904 int qeth_do_send_packet_fast(struct qeth_card *card,
3905 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3906 struct qeth_hdr *hdr, int elements_needed,
3907 int offset, int hd_len)
3908 {
3909 struct qeth_qdio_out_buffer *buffer;
3910 int index;
3911
3912 /* spin until we get the queue ... */
3913 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3914 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3915 /* ... now we've got the queue */
3916 index = queue->next_buf_to_fill;
3917 buffer = queue->bufs[queue->next_buf_to_fill];
3918 /*
3919 * check if buffer is empty to make sure that we do not 'overtake'
3920 * ourselves and try to fill a buffer that is already primed
3921 */
3922 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3923 goto out;
3924 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3925 QDIO_MAX_BUFFERS_PER_Q;
3926 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3927 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3928 qeth_flush_buffers(queue, index, 1);
3929 return 0;
3930 out:
3931 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3932 return -EBUSY;
3933 }
3934 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3935
3936 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3937 struct sk_buff *skb, struct qeth_hdr *hdr,
3938 int elements_needed)
3939 {
3940 struct qeth_qdio_out_buffer *buffer;
3941 int start_index;
3942 int flush_count = 0;
3943 int do_pack = 0;
3944 int tmp;
3945 int rc = 0;
3946
3947 /* spin until we get the queue ... */
3948 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3949 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3950 start_index = queue->next_buf_to_fill;
3951 buffer = queue->bufs[queue->next_buf_to_fill];
3952 /*
3953 * check if buffer is empty to make sure that we do not 'overtake'
3954 * ourselves and try to fill a buffer that is already primed
3955 */
3956 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3957 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3958 return -EBUSY;
3959 }
3960 /* check if we need to switch packing state of this queue */
3961 qeth_switch_to_packing_if_needed(queue);
3962 if (queue->do_pack) {
3963 do_pack = 1;
3964 /* does packet fit in current buffer? */
3965 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3966 buffer->next_element_to_fill) < elements_needed) {
3967 /* ... no -> set state PRIMED */
3968 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3969 flush_count++;
3970 queue->next_buf_to_fill =
3971 (queue->next_buf_to_fill + 1) %
3972 QDIO_MAX_BUFFERS_PER_Q;
3973 buffer = queue->bufs[queue->next_buf_to_fill];
3974 /* we did a step forward, so check buffer state
3975 * again */
3976 if (atomic_read(&buffer->state) !=
3977 QETH_QDIO_BUF_EMPTY) {
3978 qeth_flush_buffers(queue, start_index,
3979 flush_count);
3980 atomic_set(&queue->state,
3981 QETH_OUT_Q_UNLOCKED);
3982 return -EBUSY;
3983 }
3984 }
3985 }
3986 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3987 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3988 QDIO_MAX_BUFFERS_PER_Q;
3989 flush_count += tmp;
3990 if (flush_count)
3991 qeth_flush_buffers(queue, start_index, flush_count);
3992 else if (!atomic_read(&queue->set_pci_flags_count))
3993 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3994 /*
3995 * queue->state will go from LOCKED -> UNLOCKED or from
3996 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3997 * (switch packing state or flush buffer to get another pci flag out).
3998 * In that case we will enter this loop
3999 */
4000 while (atomic_dec_return(&queue->state)) {
4001 flush_count = 0;
4002 start_index = queue->next_buf_to_fill;
4003 /* check if we can go back to non-packing state */
4004 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
4005 /*
4006 * check if we need to flush a packing buffer to get a pci
4007 * flag out on the queue
4008 */
4009 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
4010 flush_count += qeth_flush_buffers_on_no_pci(queue);
4011 if (flush_count)
4012 qeth_flush_buffers(queue, start_index, flush_count);
4013 }
4014 /* at this point the queue is UNLOCKED again */
4015 if (queue->card->options.performance_stats && do_pack)
4016 queue->card->perf_stats.bufs_sent_pack += flush_count;
4017
4018 return rc;
4019 }
4020 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4021
4022 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4023 struct qeth_reply *reply, unsigned long data)
4024 {
4025 struct qeth_ipa_cmd *cmd;
4026 struct qeth_ipacmd_setadpparms *setparms;
4027
4028 QETH_CARD_TEXT(card, 4, "prmadpcb");
4029
4030 cmd = (struct qeth_ipa_cmd *) data;
4031 setparms = &(cmd->data.setadapterparms);
4032
4033 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
4034 if (cmd->hdr.return_code) {
4035 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
4036 setparms->data.mode = SET_PROMISC_MODE_OFF;
4037 }
4038 card->info.promisc_mode = setparms->data.mode;
4039 return 0;
4040 }
4041
4042 void qeth_setadp_promisc_mode(struct qeth_card *card)
4043 {
4044 enum qeth_ipa_promisc_modes mode;
4045 struct net_device *dev = card->dev;
4046 struct qeth_cmd_buffer *iob;
4047 struct qeth_ipa_cmd *cmd;
4048
4049 QETH_CARD_TEXT(card, 4, "setprom");
4050
4051 if (((dev->flags & IFF_PROMISC) &&
4052 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4053 (!(dev->flags & IFF_PROMISC) &&
4054 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4055 return;
4056 mode = SET_PROMISC_MODE_OFF;
4057 if (dev->flags & IFF_PROMISC)
4058 mode = SET_PROMISC_MODE_ON;
4059 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4060
4061 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
4062 sizeof(struct qeth_ipacmd_setadpparms));
4063 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
4064 cmd->data.setadapterparms.data.mode = mode;
4065 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4066 }
4067 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4068
4069 int qeth_change_mtu(struct net_device *dev, int new_mtu)
4070 {
4071 struct qeth_card *card;
4072 char dbf_text[15];
4073
4074 card = dev->ml_priv;
4075
4076 QETH_CARD_TEXT(card, 4, "chgmtu");
4077 sprintf(dbf_text, "%8x", new_mtu);
4078 QETH_CARD_TEXT(card, 4, dbf_text);
4079
4080 if (new_mtu < 64)
4081 return -EINVAL;
4082 if (new_mtu > 65535)
4083 return -EINVAL;
4084 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
4085 (!qeth_mtu_is_valid(card, new_mtu)))
4086 return -EINVAL;
4087 dev->mtu = new_mtu;
4088 return 0;
4089 }
4090 EXPORT_SYMBOL_GPL(qeth_change_mtu);
4091
4092 struct net_device_stats *qeth_get_stats(struct net_device *dev)
4093 {
4094 struct qeth_card *card;
4095
4096 card = dev->ml_priv;
4097
4098 QETH_CARD_TEXT(card, 5, "getstat");
4099
4100 return &card->stats;
4101 }
4102 EXPORT_SYMBOL_GPL(qeth_get_stats);
4103
4104 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4105 struct qeth_reply *reply, unsigned long data)
4106 {
4107 struct qeth_ipa_cmd *cmd;
4108
4109 QETH_CARD_TEXT(card, 4, "chgmaccb");
4110
4111 cmd = (struct qeth_ipa_cmd *) data;
4112 if (!card->options.layer2 ||
4113 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4114 memcpy(card->dev->dev_addr,
4115 &cmd->data.setadapterparms.data.change_addr.addr,
4116 OSA_ADDR_LEN);
4117 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4118 }
4119 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4120 return 0;
4121 }
4122
4123 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4124 {
4125 int rc;
4126 struct qeth_cmd_buffer *iob;
4127 struct qeth_ipa_cmd *cmd;
4128
4129 QETH_CARD_TEXT(card, 4, "chgmac");
4130
4131 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
4132 sizeof(struct qeth_ipacmd_setadpparms));
4133 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4134 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4135 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4136 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4137 card->dev->dev_addr, OSA_ADDR_LEN);
4138 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4139 NULL);
4140 return rc;
4141 }
4142 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4143
4144 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4145 struct qeth_reply *reply, unsigned long data)
4146 {
4147 struct qeth_ipa_cmd *cmd;
4148 struct qeth_set_access_ctrl *access_ctrl_req;
4149 int fallback = *(int *)reply->param;
4150
4151 QETH_CARD_TEXT(card, 4, "setaccb");
4152
4153 cmd = (struct qeth_ipa_cmd *) data;
4154 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4155 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4156 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4157 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4158 cmd->data.setadapterparms.hdr.return_code);
4159 if (cmd->data.setadapterparms.hdr.return_code !=
4160 SET_ACCESS_CTRL_RC_SUCCESS)
4161 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4162 card->gdev->dev.kobj.name,
4163 access_ctrl_req->subcmd_code,
4164 cmd->data.setadapterparms.hdr.return_code);
4165 switch (cmd->data.setadapterparms.hdr.return_code) {
4166 case SET_ACCESS_CTRL_RC_SUCCESS:
4167 if (card->options.isolation == ISOLATION_MODE_NONE) {
4168 dev_info(&card->gdev->dev,
4169 "QDIO data connection isolation is deactivated\n");
4170 } else {
4171 dev_info(&card->gdev->dev,
4172 "QDIO data connection isolation is activated\n");
4173 }
4174 break;
4175 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4176 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
4177 "deactivated\n", dev_name(&card->gdev->dev));
4178 if (fallback)
4179 card->options.isolation = card->options.prev_isolation;
4180 break;
4181 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4182 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
4183 " activated\n", dev_name(&card->gdev->dev));
4184 if (fallback)
4185 card->options.isolation = card->options.prev_isolation;
4186 break;
4187 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
4188 dev_err(&card->gdev->dev, "Adapter does not "
4189 "support QDIO data connection isolation\n");
4190 break;
4191 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
4192 dev_err(&card->gdev->dev,
4193 "Adapter is dedicated. "
4194 "QDIO data connection isolation not supported\n");
4195 if (fallback)
4196 card->options.isolation = card->options.prev_isolation;
4197 break;
4198 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
4199 dev_err(&card->gdev->dev,
4200 "TSO does not permit QDIO data connection isolation\n");
4201 if (fallback)
4202 card->options.isolation = card->options.prev_isolation;
4203 break;
4204 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4205 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4206 "support reflective relay mode\n");
4207 if (fallback)
4208 card->options.isolation = card->options.prev_isolation;
4209 break;
4210 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4211 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4212 "enabled at the adjacent switch port");
4213 if (fallback)
4214 card->options.isolation = card->options.prev_isolation;
4215 break;
4216 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4217 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4218 "at the adjacent switch failed\n");
4219 break;
4220 default:
4221 /* this should never happen */
4222 if (fallback)
4223 card->options.isolation = card->options.prev_isolation;
4224 break;
4225 }
4226 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4227 return 0;
4228 }
4229
4230 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
4231 enum qeth_ipa_isolation_modes isolation, int fallback)
4232 {
4233 int rc;
4234 struct qeth_cmd_buffer *iob;
4235 struct qeth_ipa_cmd *cmd;
4236 struct qeth_set_access_ctrl *access_ctrl_req;
4237
4238 QETH_CARD_TEXT(card, 4, "setacctl");
4239
4240 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4241 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4242
4243 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4244 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4245 sizeof(struct qeth_set_access_ctrl));
4246 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4247 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4248 access_ctrl_req->subcmd_code = isolation;
4249
4250 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
4251 &fallback);
4252 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4253 return rc;
4254 }
4255
4256 int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
4257 {
4258 int rc = 0;
4259
4260 QETH_CARD_TEXT(card, 4, "setactlo");
4261
4262 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4263 card->info.type == QETH_CARD_TYPE_OSX) &&
4264 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
4265 rc = qeth_setadpparms_set_access_ctrl(card,
4266 card->options.isolation, fallback);
4267 if (rc) {
4268 QETH_DBF_MESSAGE(3,
4269 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
4270 card->gdev->dev.kobj.name,
4271 rc);
4272 rc = -EOPNOTSUPP;
4273 }
4274 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4275 card->options.isolation = ISOLATION_MODE_NONE;
4276
4277 dev_err(&card->gdev->dev, "Adapter does not "
4278 "support QDIO data connection isolation\n");
4279 rc = -EOPNOTSUPP;
4280 }
4281 return rc;
4282 }
4283 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4284
4285 void qeth_tx_timeout(struct net_device *dev)
4286 {
4287 struct qeth_card *card;
4288
4289 card = dev->ml_priv;
4290 QETH_CARD_TEXT(card, 4, "txtimeo");
4291 card->stats.tx_errors++;
4292 qeth_schedule_recovery(card);
4293 }
4294 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4295
4296 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4297 {
4298 struct qeth_card *card = dev->ml_priv;
4299 int rc = 0;
4300
4301 switch (regnum) {
4302 case MII_BMCR: /* Basic mode control register */
4303 rc = BMCR_FULLDPLX;
4304 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4305 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4306 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4307 rc |= BMCR_SPEED100;
4308 break;
4309 case MII_BMSR: /* Basic mode status register */
4310 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4311 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4312 BMSR_100BASE4;
4313 break;
4314 case MII_PHYSID1: /* PHYS ID 1 */
4315 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4316 dev->dev_addr[2];
4317 rc = (rc >> 5) & 0xFFFF;
4318 break;
4319 case MII_PHYSID2: /* PHYS ID 2 */
4320 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4321 break;
4322 case MII_ADVERTISE: /* Advertisement control reg */
4323 rc = ADVERTISE_ALL;
4324 break;
4325 case MII_LPA: /* Link partner ability reg */
4326 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4327 LPA_100BASE4 | LPA_LPACK;
4328 break;
4329 case MII_EXPANSION: /* Expansion register */
4330 break;
4331 case MII_DCOUNTER: /* disconnect counter */
4332 break;
4333 case MII_FCSCOUNTER: /* false carrier counter */
4334 break;
4335 case MII_NWAYTEST: /* N-way auto-neg test register */
4336 break;
4337 case MII_RERRCOUNTER: /* rx error counter */
4338 rc = card->stats.rx_errors;
4339 break;
4340 case MII_SREVISION: /* silicon revision */
4341 break;
4342 case MII_RESV1: /* reserved 1 */
4343 break;
4344 case MII_LBRERROR: /* loopback, rx, bypass error */
4345 break;
4346 case MII_PHYADDR: /* physical address */
4347 break;
4348 case MII_RESV2: /* reserved 2 */
4349 break;
4350 case MII_TPISTATUS: /* TPI status for 10mbps */
4351 break;
4352 case MII_NCONFIG: /* network interface config */
4353 break;
4354 default:
4355 break;
4356 }
4357 return rc;
4358 }
4359 EXPORT_SYMBOL_GPL(qeth_mdio_read);
4360
4361 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4362 struct qeth_cmd_buffer *iob, int len,
4363 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4364 unsigned long),
4365 void *reply_param)
4366 {
4367 u16 s1, s2;
4368
4369 QETH_CARD_TEXT(card, 4, "sendsnmp");
4370
4371 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4372 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4373 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4374 /* adjust PDU length fields in IPA_PDU_HEADER */
4375 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4376 s2 = (u32) len;
4377 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4378 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4379 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4380 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4381 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4382 reply_cb, reply_param);
4383 }
4384
4385 static int qeth_snmp_command_cb(struct qeth_card *card,
4386 struct qeth_reply *reply, unsigned long sdata)
4387 {
4388 struct qeth_ipa_cmd *cmd;
4389 struct qeth_arp_query_info *qinfo;
4390 struct qeth_snmp_cmd *snmp;
4391 unsigned char *data;
4392 __u16 data_len;
4393
4394 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4395
4396 cmd = (struct qeth_ipa_cmd *) sdata;
4397 data = (unsigned char *)((char *)cmd - reply->offset);
4398 qinfo = (struct qeth_arp_query_info *) reply->param;
4399 snmp = &cmd->data.setadapterparms.data.snmp;
4400
4401 if (cmd->hdr.return_code) {
4402 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4403 return 0;
4404 }
4405 if (cmd->data.setadapterparms.hdr.return_code) {
4406 cmd->hdr.return_code =
4407 cmd->data.setadapterparms.hdr.return_code;
4408 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4409 return 0;
4410 }
4411 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4412 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4413 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4414 else
4415 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4416
4417 /* check if there is enough room in userspace */
4418 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
4419 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
4420 cmd->hdr.return_code = IPA_RC_ENOMEM;
4421 return 0;
4422 }
4423 QETH_CARD_TEXT_(card, 4, "snore%i",
4424 cmd->data.setadapterparms.hdr.used_total);
4425 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4426 cmd->data.setadapterparms.hdr.seq_no);
4427 /*copy entries to user buffer*/
4428 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4429 memcpy(qinfo->udata + qinfo->udata_offset,
4430 (char *)snmp,
4431 data_len + offsetof(struct qeth_snmp_cmd, data));
4432 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4433 } else {
4434 memcpy(qinfo->udata + qinfo->udata_offset,
4435 (char *)&snmp->request, data_len);
4436 }
4437 qinfo->udata_offset += data_len;
4438 /* check if all replies received ... */
4439 QETH_CARD_TEXT_(card, 4, "srtot%i",
4440 cmd->data.setadapterparms.hdr.used_total);
4441 QETH_CARD_TEXT_(card, 4, "srseq%i",
4442 cmd->data.setadapterparms.hdr.seq_no);
4443 if (cmd->data.setadapterparms.hdr.seq_no <
4444 cmd->data.setadapterparms.hdr.used_total)
4445 return 1;
4446 return 0;
4447 }
4448
4449 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4450 {
4451 struct qeth_cmd_buffer *iob;
4452 struct qeth_ipa_cmd *cmd;
4453 struct qeth_snmp_ureq *ureq;
4454 unsigned int req_len;
4455 struct qeth_arp_query_info qinfo = {0, };
4456 int rc = 0;
4457
4458 QETH_CARD_TEXT(card, 3, "snmpcmd");
4459
4460 if (card->info.guestlan)
4461 return -EOPNOTSUPP;
4462
4463 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4464 (!card->options.layer2)) {
4465 return -EOPNOTSUPP;
4466 }
4467 /* skip 4 bytes (data_len struct member) to get req_len */
4468 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4469 return -EFAULT;
4470 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4471 sizeof(struct qeth_ipacmd_hdr) -
4472 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4473 return -EINVAL;
4474 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4475 if (IS_ERR(ureq)) {
4476 QETH_CARD_TEXT(card, 2, "snmpnome");
4477 return PTR_ERR(ureq);
4478 }
4479 qinfo.udata_len = ureq->hdr.data_len;
4480 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4481 if (!qinfo.udata) {
4482 kfree(ureq);
4483 return -ENOMEM;
4484 }
4485 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4486
4487 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4488 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4489 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4490 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4491 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4492 qeth_snmp_command_cb, (void *)&qinfo);
4493 if (rc)
4494 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4495 QETH_CARD_IFNAME(card), rc);
4496 else {
4497 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4498 rc = -EFAULT;
4499 }
4500
4501 kfree(ureq);
4502 kfree(qinfo.udata);
4503 return rc;
4504 }
4505 EXPORT_SYMBOL_GPL(qeth_snmp_command);
4506
4507 static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4508 struct qeth_reply *reply, unsigned long data)
4509 {
4510 struct qeth_ipa_cmd *cmd;
4511 struct qeth_qoat_priv *priv;
4512 char *resdata;
4513 int resdatalen;
4514
4515 QETH_CARD_TEXT(card, 3, "qoatcb");
4516
4517 cmd = (struct qeth_ipa_cmd *)data;
4518 priv = (struct qeth_qoat_priv *)reply->param;
4519 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4520 resdata = (char *)data + 28;
4521
4522 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4523 cmd->hdr.return_code = IPA_RC_FFFF;
4524 return 0;
4525 }
4526
4527 memcpy((priv->buffer + priv->response_len), resdata,
4528 resdatalen);
4529 priv->response_len += resdatalen;
4530
4531 if (cmd->data.setadapterparms.hdr.seq_no <
4532 cmd->data.setadapterparms.hdr.used_total)
4533 return 1;
4534 return 0;
4535 }
4536
4537 int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
4538 {
4539 int rc = 0;
4540 struct qeth_cmd_buffer *iob;
4541 struct qeth_ipa_cmd *cmd;
4542 struct qeth_query_oat *oat_req;
4543 struct qeth_query_oat_data oat_data;
4544 struct qeth_qoat_priv priv;
4545 void __user *tmp;
4546
4547 QETH_CARD_TEXT(card, 3, "qoatcmd");
4548
4549 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4550 rc = -EOPNOTSUPP;
4551 goto out;
4552 }
4553
4554 if (copy_from_user(&oat_data, udata,
4555 sizeof(struct qeth_query_oat_data))) {
4556 rc = -EFAULT;
4557 goto out;
4558 }
4559
4560 priv.buffer_len = oat_data.buffer_len;
4561 priv.response_len = 0;
4562 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4563 if (!priv.buffer) {
4564 rc = -ENOMEM;
4565 goto out;
4566 }
4567
4568 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4569 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4570 sizeof(struct qeth_query_oat));
4571 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4572 oat_req = &cmd->data.setadapterparms.data.query_oat;
4573 oat_req->subcmd_code = oat_data.command;
4574
4575 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4576 &priv);
4577 if (!rc) {
4578 if (is_compat_task())
4579 tmp = compat_ptr(oat_data.ptr);
4580 else
4581 tmp = (void __user *)(unsigned long)oat_data.ptr;
4582
4583 if (copy_to_user(tmp, priv.buffer,
4584 priv.response_len)) {
4585 rc = -EFAULT;
4586 goto out_free;
4587 }
4588
4589 oat_data.response_len = priv.response_len;
4590
4591 if (copy_to_user(udata, &oat_data,
4592 sizeof(struct qeth_query_oat_data)))
4593 rc = -EFAULT;
4594 } else
4595 if (rc == IPA_RC_FFFF)
4596 rc = -EFAULT;
4597
4598 out_free:
4599 kfree(priv.buffer);
4600 out:
4601 return rc;
4602 }
4603 EXPORT_SYMBOL_GPL(qeth_query_oat_command);
4604
4605 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4606 {
4607 switch (card->info.type) {
4608 case QETH_CARD_TYPE_IQD:
4609 return 2;
4610 default:
4611 return 0;
4612 }
4613 }
4614
4615 static void qeth_determine_capabilities(struct qeth_card *card)
4616 {
4617 int rc;
4618 int length;
4619 char *prcd;
4620 struct ccw_device *ddev;
4621 int ddev_offline = 0;
4622
4623 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4624 ddev = CARD_DDEV(card);
4625 if (!ddev->online) {
4626 ddev_offline = 1;
4627 rc = ccw_device_set_online(ddev);
4628 if (rc) {
4629 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4630 goto out;
4631 }
4632 }
4633
4634 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4635 if (rc) {
4636 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4637 dev_name(&card->gdev->dev), rc);
4638 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4639 goto out_offline;
4640 }
4641 qeth_configure_unitaddr(card, prcd);
4642 if (ddev_offline)
4643 qeth_configure_blkt_default(card, prcd);
4644 kfree(prcd);
4645
4646 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4647 if (rc)
4648 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4649
4650 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4651 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4652 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4653 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4654 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4655 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4656 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4657 dev_info(&card->gdev->dev,
4658 "Completion Queueing supported\n");
4659 } else {
4660 card->options.cq = QETH_CQ_NOTAVAILABLE;
4661 }
4662
4663
4664 out_offline:
4665 if (ddev_offline == 1)
4666 ccw_device_set_offline(ddev);
4667 out:
4668 return;
4669 }
4670
4671 static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4672 struct qdio_buffer **in_sbal_ptrs,
4673 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4674 int i;
4675
4676 if (card->options.cq == QETH_CQ_ENABLED) {
4677 int offset = QDIO_MAX_BUFFERS_PER_Q *
4678 (card->qdio.no_in_queues - 1);
4679 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4680 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4681 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4682 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4683 }
4684
4685 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4686 }
4687 }
4688
4689 static int qeth_qdio_establish(struct qeth_card *card)
4690 {
4691 struct qdio_initialize init_data;
4692 char *qib_param_field;
4693 struct qdio_buffer **in_sbal_ptrs;
4694 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4695 struct qdio_buffer **out_sbal_ptrs;
4696 int i, j, k;
4697 int rc = 0;
4698
4699 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4700
4701 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4702 GFP_KERNEL);
4703 if (!qib_param_field) {
4704 rc = -ENOMEM;
4705 goto out_free_nothing;
4706 }
4707
4708 qeth_create_qib_param_field(card, qib_param_field);
4709 qeth_create_qib_param_field_blkt(card, qib_param_field);
4710
4711 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
4712 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4713 GFP_KERNEL);
4714 if (!in_sbal_ptrs) {
4715 rc = -ENOMEM;
4716 goto out_free_qib_param;
4717 }
4718 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4719 in_sbal_ptrs[i] = (struct qdio_buffer *)
4720 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
4721 }
4722
4723 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4724 GFP_KERNEL);
4725 if (!queue_start_poll) {
4726 rc = -ENOMEM;
4727 goto out_free_in_sbals;
4728 }
4729 for (i = 0; i < card->qdio.no_in_queues; ++i)
4730 queue_start_poll[i] = card->discipline->start_poll;
4731
4732 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
4733
4734 out_sbal_ptrs =
4735 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4736 sizeof(void *), GFP_KERNEL);
4737 if (!out_sbal_ptrs) {
4738 rc = -ENOMEM;
4739 goto out_free_queue_start_poll;
4740 }
4741 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4742 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4743 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
4744 card->qdio.out_qs[i]->bufs[j]->buffer);
4745 }
4746
4747 memset(&init_data, 0, sizeof(struct qdio_initialize));
4748 init_data.cdev = CARD_DDEV(card);
4749 init_data.q_format = qeth_get_qdio_q_format(card);
4750 init_data.qib_param_field_format = 0;
4751 init_data.qib_param_field = qib_param_field;
4752 init_data.no_input_qs = card->qdio.no_in_queues;
4753 init_data.no_output_qs = card->qdio.no_out_queues;
4754 init_data.input_handler = card->discipline->input_handler;
4755 init_data.output_handler = card->discipline->output_handler;
4756 init_data.queue_start_poll_array = queue_start_poll;
4757 init_data.int_parm = (unsigned long) card;
4758 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4759 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
4760 init_data.output_sbal_state_array = card->qdio.out_bufstates;
4761 init_data.scan_threshold =
4762 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4763
4764 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4765 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
4766 rc = qdio_allocate(&init_data);
4767 if (rc) {
4768 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4769 goto out;
4770 }
4771 rc = qdio_establish(&init_data);
4772 if (rc) {
4773 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4774 qdio_free(CARD_DDEV(card));
4775 }
4776 }
4777
4778 switch (card->options.cq) {
4779 case QETH_CQ_ENABLED:
4780 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4781 break;
4782 case QETH_CQ_DISABLED:
4783 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4784 break;
4785 default:
4786 break;
4787 }
4788 out:
4789 kfree(out_sbal_ptrs);
4790 out_free_queue_start_poll:
4791 kfree(queue_start_poll);
4792 out_free_in_sbals:
4793 kfree(in_sbal_ptrs);
4794 out_free_qib_param:
4795 kfree(qib_param_field);
4796 out_free_nothing:
4797 return rc;
4798 }
4799
4800 static void qeth_core_free_card(struct qeth_card *card)
4801 {
4802
4803 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4804 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4805 qeth_clean_channel(&card->read);
4806 qeth_clean_channel(&card->write);
4807 if (card->dev)
4808 free_netdev(card->dev);
4809 kfree(card->ip_tbd_list);
4810 qeth_free_qdio_buffers(card);
4811 unregister_service_level(&card->qeth_service_level);
4812 kfree(card);
4813 }
4814
4815 void qeth_trace_features(struct qeth_card *card)
4816 {
4817 QETH_CARD_TEXT(card, 2, "features");
4818 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs);
4819 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs);
4820 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs);
4821 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs);
4822 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs);
4823 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs);
4824 QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support);
4825 }
4826 EXPORT_SYMBOL_GPL(qeth_trace_features);
4827
4828 static struct ccw_device_id qeth_ids[] = {
4829 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4830 .driver_info = QETH_CARD_TYPE_OSD},
4831 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4832 .driver_info = QETH_CARD_TYPE_IQD},
4833 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4834 .driver_info = QETH_CARD_TYPE_OSN},
4835 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4836 .driver_info = QETH_CARD_TYPE_OSM},
4837 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4838 .driver_info = QETH_CARD_TYPE_OSX},
4839 {},
4840 };
4841 MODULE_DEVICE_TABLE(ccw, qeth_ids);
4842
4843 static struct ccw_driver qeth_ccw_driver = {
4844 .driver = {
4845 .owner = THIS_MODULE,
4846 .name = "qeth",
4847 },
4848 .ids = qeth_ids,
4849 .probe = ccwgroup_probe_ccwdev,
4850 .remove = ccwgroup_remove_ccwdev,
4851 };
4852
4853 int qeth_core_hardsetup_card(struct qeth_card *card)
4854 {
4855 int retries = 3;
4856 int rc;
4857
4858 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4859 atomic_set(&card->force_alloc_skb, 0);
4860 qeth_update_from_chp_desc(card);
4861 retry:
4862 if (retries < 3)
4863 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4864 dev_name(&card->gdev->dev));
4865 ccw_device_set_offline(CARD_DDEV(card));
4866 ccw_device_set_offline(CARD_WDEV(card));
4867 ccw_device_set_offline(CARD_RDEV(card));
4868 rc = ccw_device_set_online(CARD_RDEV(card));
4869 if (rc)
4870 goto retriable;
4871 rc = ccw_device_set_online(CARD_WDEV(card));
4872 if (rc)
4873 goto retriable;
4874 rc = ccw_device_set_online(CARD_DDEV(card));
4875 if (rc)
4876 goto retriable;
4877 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
4878 retriable:
4879 if (rc == -ERESTARTSYS) {
4880 QETH_DBF_TEXT(SETUP, 2, "break1");
4881 return rc;
4882 } else if (rc) {
4883 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4884 if (--retries < 0)
4885 goto out;
4886 else
4887 goto retry;
4888 }
4889 qeth_determine_capabilities(card);
4890 qeth_init_tokens(card);
4891 qeth_init_func_level(card);
4892 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
4893 if (rc == -ERESTARTSYS) {
4894 QETH_DBF_TEXT(SETUP, 2, "break2");
4895 return rc;
4896 } else if (rc) {
4897 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4898 if (--retries < 0)
4899 goto out;
4900 else
4901 goto retry;
4902 }
4903 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
4904 if (rc == -ERESTARTSYS) {
4905 QETH_DBF_TEXT(SETUP, 2, "break3");
4906 return rc;
4907 } else if (rc) {
4908 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4909 if (--retries < 0)
4910 goto out;
4911 else
4912 goto retry;
4913 }
4914 card->read_or_write_problem = 0;
4915 rc = qeth_mpc_initialize(card);
4916 if (rc) {
4917 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4918 goto out;
4919 }
4920
4921 card->options.ipa4.supported_funcs = 0;
4922 card->options.adp.supported_funcs = 0;
4923 card->info.diagass_support = 0;
4924 qeth_query_ipassists(card, QETH_PROT_IPV4);
4925 if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
4926 qeth_query_setadapterparms(card);
4927 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
4928 qeth_query_setdiagass(card);
4929 return 0;
4930 out:
4931 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
4932 "an error on the device\n");
4933 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
4934 dev_name(&card->gdev->dev), rc);
4935 return rc;
4936 }
4937 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
4938
4939 static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
4940 struct qdio_buffer_element *element,
4941 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
4942 {
4943 struct page *page = virt_to_page(element->addr);
4944 if (*pskb == NULL) {
4945 if (qethbuffer->rx_skb) {
4946 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
4947 *pskb = qethbuffer->rx_skb;
4948 qethbuffer->rx_skb = NULL;
4949 } else {
4950 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
4951 if (!(*pskb))
4952 return -ENOMEM;
4953 }
4954
4955 skb_reserve(*pskb, ETH_HLEN);
4956 if (data_len <= QETH_RX_PULL_LEN) {
4957 memcpy(skb_put(*pskb, data_len), element->addr + offset,
4958 data_len);
4959 } else {
4960 get_page(page);
4961 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
4962 element->addr + offset, QETH_RX_PULL_LEN);
4963 skb_fill_page_desc(*pskb, *pfrag, page,
4964 offset + QETH_RX_PULL_LEN,
4965 data_len - QETH_RX_PULL_LEN);
4966 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
4967 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
4968 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4969 (*pfrag)++;
4970 }
4971 } else {
4972 get_page(page);
4973 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4974 (*pskb)->data_len += data_len;
4975 (*pskb)->len += data_len;
4976 (*pskb)->truesize += data_len;
4977 (*pfrag)++;
4978 }
4979
4980
4981 return 0;
4982 }
4983
4984 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
4985 struct qeth_qdio_buffer *qethbuffer,
4986 struct qdio_buffer_element **__element, int *__offset,
4987 struct qeth_hdr **hdr)
4988 {
4989 struct qdio_buffer_element *element = *__element;
4990 struct qdio_buffer *buffer = qethbuffer->buffer;
4991 int offset = *__offset;
4992 struct sk_buff *skb = NULL;
4993 int skb_len = 0;
4994 void *data_ptr;
4995 int data_len;
4996 int headroom = 0;
4997 int use_rx_sg = 0;
4998 int frag = 0;
4999
5000 /* qeth_hdr must not cross element boundaries */
5001 if (element->length < offset + sizeof(struct qeth_hdr)) {
5002 if (qeth_is_last_sbale(element))
5003 return NULL;
5004 element++;
5005 offset = 0;
5006 if (element->length < sizeof(struct qeth_hdr))
5007 return NULL;
5008 }
5009 *hdr = element->addr + offset;
5010
5011 offset += sizeof(struct qeth_hdr);
5012 switch ((*hdr)->hdr.l2.id) {
5013 case QETH_HEADER_TYPE_LAYER2:
5014 skb_len = (*hdr)->hdr.l2.pkt_length;
5015 break;
5016 case QETH_HEADER_TYPE_LAYER3:
5017 skb_len = (*hdr)->hdr.l3.length;
5018 headroom = ETH_HLEN;
5019 break;
5020 case QETH_HEADER_TYPE_OSN:
5021 skb_len = (*hdr)->hdr.osn.pdu_length;
5022 headroom = sizeof(struct qeth_hdr);
5023 break;
5024 default:
5025 break;
5026 }
5027
5028 if (!skb_len)
5029 return NULL;
5030
5031 if (((skb_len >= card->options.rx_sg_cb) &&
5032 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5033 (!atomic_read(&card->force_alloc_skb))) ||
5034 (card->options.cq == QETH_CQ_ENABLED)) {
5035 use_rx_sg = 1;
5036 } else {
5037 skb = dev_alloc_skb(skb_len + headroom);
5038 if (!skb)
5039 goto no_mem;
5040 if (headroom)
5041 skb_reserve(skb, headroom);
5042 }
5043
5044 data_ptr = element->addr + offset;
5045 while (skb_len) {
5046 data_len = min(skb_len, (int)(element->length - offset));
5047 if (data_len) {
5048 if (use_rx_sg) {
5049 if (qeth_create_skb_frag(qethbuffer, element,
5050 &skb, offset, &frag, data_len))
5051 goto no_mem;
5052 } else {
5053 memcpy(skb_put(skb, data_len), data_ptr,
5054 data_len);
5055 }
5056 }
5057 skb_len -= data_len;
5058 if (skb_len) {
5059 if (qeth_is_last_sbale(element)) {
5060 QETH_CARD_TEXT(card, 4, "unexeob");
5061 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
5062 dev_kfree_skb_any(skb);
5063 card->stats.rx_errors++;
5064 return NULL;
5065 }
5066 element++;
5067 offset = 0;
5068 data_ptr = element->addr;
5069 } else {
5070 offset += data_len;
5071 }
5072 }
5073 *__element = element;
5074 *__offset = offset;
5075 if (use_rx_sg && card->options.performance_stats) {
5076 card->perf_stats.sg_skbs_rx++;
5077 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5078 }
5079 return skb;
5080 no_mem:
5081 if (net_ratelimit()) {
5082 QETH_CARD_TEXT(card, 2, "noskbmem");
5083 }
5084 card->stats.rx_dropped++;
5085 return NULL;
5086 }
5087 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5088
5089 static void qeth_unregister_dbf_views(void)
5090 {
5091 int x;
5092 for (x = 0; x < QETH_DBF_INFOS; x++) {
5093 debug_unregister(qeth_dbf[x].id);
5094 qeth_dbf[x].id = NULL;
5095 }
5096 }
5097
5098 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
5099 {
5100 char dbf_txt_buf[32];
5101 va_list args;
5102
5103 if (level > id->level)
5104 return;
5105 va_start(args, fmt);
5106 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5107 va_end(args);
5108 debug_text_event(id, level, dbf_txt_buf);
5109 }
5110 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5111
5112 static int qeth_register_dbf_views(void)
5113 {
5114 int ret;
5115 int x;
5116
5117 for (x = 0; x < QETH_DBF_INFOS; x++) {
5118 /* register the areas */
5119 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5120 qeth_dbf[x].pages,
5121 qeth_dbf[x].areas,
5122 qeth_dbf[x].len);
5123 if (qeth_dbf[x].id == NULL) {
5124 qeth_unregister_dbf_views();
5125 return -ENOMEM;
5126 }
5127
5128 /* register a view */
5129 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5130 if (ret) {
5131 qeth_unregister_dbf_views();
5132 return ret;
5133 }
5134
5135 /* set a passing level */
5136 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5137 }
5138
5139 return 0;
5140 }
5141
5142 int qeth_core_load_discipline(struct qeth_card *card,
5143 enum qeth_discipline_id discipline)
5144 {
5145 int rc = 0;
5146 mutex_lock(&qeth_mod_mutex);
5147 switch (discipline) {
5148 case QETH_DISCIPLINE_LAYER3:
5149 card->discipline = try_then_request_module(
5150 symbol_get(qeth_l3_discipline), "qeth_l3");
5151 break;
5152 case QETH_DISCIPLINE_LAYER2:
5153 card->discipline = try_then_request_module(
5154 symbol_get(qeth_l2_discipline), "qeth_l2");
5155 break;
5156 }
5157 if (!card->discipline) {
5158 dev_err(&card->gdev->dev, "There is no kernel module to "
5159 "support discipline %d\n", discipline);
5160 rc = -EINVAL;
5161 }
5162 mutex_unlock(&qeth_mod_mutex);
5163 return rc;
5164 }
5165
5166 void qeth_core_free_discipline(struct qeth_card *card)
5167 {
5168 if (card->options.layer2)
5169 symbol_put(qeth_l2_discipline);
5170 else
5171 symbol_put(qeth_l3_discipline);
5172 card->discipline = NULL;
5173 }
5174
5175 static const struct device_type qeth_generic_devtype = {
5176 .name = "qeth_generic",
5177 .groups = qeth_generic_attr_groups,
5178 };
5179 static const struct device_type qeth_osn_devtype = {
5180 .name = "qeth_osn",
5181 .groups = qeth_osn_attr_groups,
5182 };
5183
5184 #define DBF_NAME_LEN 20
5185
5186 struct qeth_dbf_entry {
5187 char dbf_name[DBF_NAME_LEN];
5188 debug_info_t *dbf_info;
5189 struct list_head dbf_list;
5190 };
5191
5192 static LIST_HEAD(qeth_dbf_list);
5193 static DEFINE_MUTEX(qeth_dbf_list_mutex);
5194
5195 static debug_info_t *qeth_get_dbf_entry(char *name)
5196 {
5197 struct qeth_dbf_entry *entry;
5198 debug_info_t *rc = NULL;
5199
5200 mutex_lock(&qeth_dbf_list_mutex);
5201 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5202 if (strcmp(entry->dbf_name, name) == 0) {
5203 rc = entry->dbf_info;
5204 break;
5205 }
5206 }
5207 mutex_unlock(&qeth_dbf_list_mutex);
5208 return rc;
5209 }
5210
5211 static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5212 {
5213 struct qeth_dbf_entry *new_entry;
5214
5215 card->debug = debug_register(name, 2, 1, 8);
5216 if (!card->debug) {
5217 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5218 goto err;
5219 }
5220 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5221 goto err_dbg;
5222 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5223 if (!new_entry)
5224 goto err_dbg;
5225 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5226 new_entry->dbf_info = card->debug;
5227 mutex_lock(&qeth_dbf_list_mutex);
5228 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5229 mutex_unlock(&qeth_dbf_list_mutex);
5230
5231 return 0;
5232
5233 err_dbg:
5234 debug_unregister(card->debug);
5235 err:
5236 return -ENOMEM;
5237 }
5238
5239 static void qeth_clear_dbf_list(void)
5240 {
5241 struct qeth_dbf_entry *entry, *tmp;
5242
5243 mutex_lock(&qeth_dbf_list_mutex);
5244 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5245 list_del(&entry->dbf_list);
5246 debug_unregister(entry->dbf_info);
5247 kfree(entry);
5248 }
5249 mutex_unlock(&qeth_dbf_list_mutex);
5250 }
5251
5252 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5253 {
5254 struct qeth_card *card;
5255 struct device *dev;
5256 int rc;
5257 unsigned long flags;
5258 char dbf_name[DBF_NAME_LEN];
5259
5260 QETH_DBF_TEXT(SETUP, 2, "probedev");
5261
5262 dev = &gdev->dev;
5263 if (!get_device(dev))
5264 return -ENODEV;
5265
5266 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
5267
5268 card = qeth_alloc_card();
5269 if (!card) {
5270 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
5271 rc = -ENOMEM;
5272 goto err_dev;
5273 }
5274
5275 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5276 dev_name(&gdev->dev));
5277 card->debug = qeth_get_dbf_entry(dbf_name);
5278 if (!card->debug) {
5279 rc = qeth_add_dbf_entry(card, dbf_name);
5280 if (rc)
5281 goto err_card;
5282 }
5283
5284 card->read.ccwdev = gdev->cdev[0];
5285 card->write.ccwdev = gdev->cdev[1];
5286 card->data.ccwdev = gdev->cdev[2];
5287 dev_set_drvdata(&gdev->dev, card);
5288 card->gdev = gdev;
5289 gdev->cdev[0]->handler = qeth_irq;
5290 gdev->cdev[1]->handler = qeth_irq;
5291 gdev->cdev[2]->handler = qeth_irq;
5292
5293 rc = qeth_determine_card_type(card);
5294 if (rc) {
5295 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
5296 goto err_card;
5297 }
5298 rc = qeth_setup_card(card);
5299 if (rc) {
5300 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
5301 goto err_card;
5302 }
5303
5304 if (card->info.type == QETH_CARD_TYPE_OSN)
5305 gdev->dev.type = &qeth_osn_devtype;
5306 else
5307 gdev->dev.type = &qeth_generic_devtype;
5308
5309 switch (card->info.type) {
5310 case QETH_CARD_TYPE_OSN:
5311 case QETH_CARD_TYPE_OSM:
5312 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5313 if (rc)
5314 goto err_card;
5315 rc = card->discipline->setup(card->gdev);
5316 if (rc)
5317 goto err_disc;
5318 case QETH_CARD_TYPE_OSD:
5319 case QETH_CARD_TYPE_OSX:
5320 default:
5321 break;
5322 }
5323
5324 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5325 list_add_tail(&card->list, &qeth_core_card_list.list);
5326 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5327
5328 qeth_determine_capabilities(card);
5329 return 0;
5330
5331 err_disc:
5332 qeth_core_free_discipline(card);
5333 err_card:
5334 qeth_core_free_card(card);
5335 err_dev:
5336 put_device(dev);
5337 return rc;
5338 }
5339
5340 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5341 {
5342 unsigned long flags;
5343 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5344
5345 QETH_DBF_TEXT(SETUP, 2, "removedv");
5346
5347 if (card->discipline) {
5348 card->discipline->remove(gdev);
5349 qeth_core_free_discipline(card);
5350 }
5351
5352 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5353 list_del(&card->list);
5354 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5355 qeth_core_free_card(card);
5356 dev_set_drvdata(&gdev->dev, NULL);
5357 put_device(&gdev->dev);
5358 return;
5359 }
5360
5361 static int qeth_core_set_online(struct ccwgroup_device *gdev)
5362 {
5363 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5364 int rc = 0;
5365 int def_discipline;
5366
5367 if (!card->discipline) {
5368 if (card->info.type == QETH_CARD_TYPE_IQD)
5369 def_discipline = QETH_DISCIPLINE_LAYER3;
5370 else
5371 def_discipline = QETH_DISCIPLINE_LAYER2;
5372 rc = qeth_core_load_discipline(card, def_discipline);
5373 if (rc)
5374 goto err;
5375 rc = card->discipline->setup(card->gdev);
5376 if (rc)
5377 goto err;
5378 }
5379 rc = card->discipline->set_online(gdev);
5380 err:
5381 return rc;
5382 }
5383
5384 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5385 {
5386 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5387 return card->discipline->set_offline(gdev);
5388 }
5389
5390 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5391 {
5392 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5393 if (card->discipline && card->discipline->shutdown)
5394 card->discipline->shutdown(gdev);
5395 }
5396
5397 static int qeth_core_prepare(struct ccwgroup_device *gdev)
5398 {
5399 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5400 if (card->discipline && card->discipline->prepare)
5401 return card->discipline->prepare(gdev);
5402 return 0;
5403 }
5404
5405 static void qeth_core_complete(struct ccwgroup_device *gdev)
5406 {
5407 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5408 if (card->discipline && card->discipline->complete)
5409 card->discipline->complete(gdev);
5410 }
5411
5412 static int qeth_core_freeze(struct ccwgroup_device *gdev)
5413 {
5414 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5415 if (card->discipline && card->discipline->freeze)
5416 return card->discipline->freeze(gdev);
5417 return 0;
5418 }
5419
5420 static int qeth_core_thaw(struct ccwgroup_device *gdev)
5421 {
5422 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5423 if (card->discipline && card->discipline->thaw)
5424 return card->discipline->thaw(gdev);
5425 return 0;
5426 }
5427
5428 static int qeth_core_restore(struct ccwgroup_device *gdev)
5429 {
5430 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5431 if (card->discipline && card->discipline->restore)
5432 return card->discipline->restore(gdev);
5433 return 0;
5434 }
5435
5436 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
5437 .driver = {
5438 .owner = THIS_MODULE,
5439 .name = "qeth",
5440 },
5441 .setup = qeth_core_probe_device,
5442 .remove = qeth_core_remove_device,
5443 .set_online = qeth_core_set_online,
5444 .set_offline = qeth_core_set_offline,
5445 .shutdown = qeth_core_shutdown,
5446 .prepare = qeth_core_prepare,
5447 .complete = qeth_core_complete,
5448 .freeze = qeth_core_freeze,
5449 .thaw = qeth_core_thaw,
5450 .restore = qeth_core_restore,
5451 };
5452
5453 static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
5454 const char *buf, size_t count)
5455 {
5456 int err;
5457
5458 err = ccwgroup_create_dev(qeth_core_root_dev,
5459 &qeth_core_ccwgroup_driver, 3, buf);
5460
5461 return err ? err : count;
5462 }
5463 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5464
5465 static struct attribute *qeth_drv_attrs[] = {
5466 &driver_attr_group.attr,
5467 NULL,
5468 };
5469 static struct attribute_group qeth_drv_attr_group = {
5470 .attrs = qeth_drv_attrs,
5471 };
5472 static const struct attribute_group *qeth_drv_attr_groups[] = {
5473 &qeth_drv_attr_group,
5474 NULL,
5475 };
5476
5477 static struct {
5478 const char str[ETH_GSTRING_LEN];
5479 } qeth_ethtool_stats_keys[] = {
5480 /* 0 */{"rx skbs"},
5481 {"rx buffers"},
5482 {"tx skbs"},
5483 {"tx buffers"},
5484 {"tx skbs no packing"},
5485 {"tx buffers no packing"},
5486 {"tx skbs packing"},
5487 {"tx buffers packing"},
5488 {"tx sg skbs"},
5489 {"tx sg frags"},
5490 /* 10 */{"rx sg skbs"},
5491 {"rx sg frags"},
5492 {"rx sg page allocs"},
5493 {"tx large kbytes"},
5494 {"tx large count"},
5495 {"tx pk state ch n->p"},
5496 {"tx pk state ch p->n"},
5497 {"tx pk watermark low"},
5498 {"tx pk watermark high"},
5499 {"queue 0 buffer usage"},
5500 /* 20 */{"queue 1 buffer usage"},
5501 {"queue 2 buffer usage"},
5502 {"queue 3 buffer usage"},
5503 {"rx poll time"},
5504 {"rx poll count"},
5505 {"rx do_QDIO time"},
5506 {"rx do_QDIO count"},
5507 {"tx handler time"},
5508 {"tx handler count"},
5509 {"tx time"},
5510 /* 30 */{"tx count"},
5511 {"tx do_QDIO time"},
5512 {"tx do_QDIO count"},
5513 {"tx csum"},
5514 {"tx lin"},
5515 {"cq handler count"},
5516 {"cq handler time"}
5517 };
5518
5519 int qeth_core_get_sset_count(struct net_device *dev, int stringset)
5520 {
5521 switch (stringset) {
5522 case ETH_SS_STATS:
5523 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5524 default:
5525 return -EINVAL;
5526 }
5527 }
5528 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
5529
5530 void qeth_core_get_ethtool_stats(struct net_device *dev,
5531 struct ethtool_stats *stats, u64 *data)
5532 {
5533 struct qeth_card *card = dev->ml_priv;
5534 data[0] = card->stats.rx_packets -
5535 card->perf_stats.initial_rx_packets;
5536 data[1] = card->perf_stats.bufs_rec;
5537 data[2] = card->stats.tx_packets -
5538 card->perf_stats.initial_tx_packets;
5539 data[3] = card->perf_stats.bufs_sent;
5540 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5541 - card->perf_stats.skbs_sent_pack;
5542 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5543 data[6] = card->perf_stats.skbs_sent_pack;
5544 data[7] = card->perf_stats.bufs_sent_pack;
5545 data[8] = card->perf_stats.sg_skbs_sent;
5546 data[9] = card->perf_stats.sg_frags_sent;
5547 data[10] = card->perf_stats.sg_skbs_rx;
5548 data[11] = card->perf_stats.sg_frags_rx;
5549 data[12] = card->perf_stats.sg_alloc_page_rx;
5550 data[13] = (card->perf_stats.large_send_bytes >> 10);
5551 data[14] = card->perf_stats.large_send_cnt;
5552 data[15] = card->perf_stats.sc_dp_p;
5553 data[16] = card->perf_stats.sc_p_dp;
5554 data[17] = QETH_LOW_WATERMARK_PACK;
5555 data[18] = QETH_HIGH_WATERMARK_PACK;
5556 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5557 data[20] = (card->qdio.no_out_queues > 1) ?
5558 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5559 data[21] = (card->qdio.no_out_queues > 2) ?
5560 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5561 data[22] = (card->qdio.no_out_queues > 3) ?
5562 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5563 data[23] = card->perf_stats.inbound_time;
5564 data[24] = card->perf_stats.inbound_cnt;
5565 data[25] = card->perf_stats.inbound_do_qdio_time;
5566 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5567 data[27] = card->perf_stats.outbound_handler_time;
5568 data[28] = card->perf_stats.outbound_handler_cnt;
5569 data[29] = card->perf_stats.outbound_time;
5570 data[30] = card->perf_stats.outbound_cnt;
5571 data[31] = card->perf_stats.outbound_do_qdio_time;
5572 data[32] = card->perf_stats.outbound_do_qdio_cnt;
5573 data[33] = card->perf_stats.tx_csum;
5574 data[34] = card->perf_stats.tx_lin;
5575 data[35] = card->perf_stats.cq_cnt;
5576 data[36] = card->perf_stats.cq_time;
5577 }
5578 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5579
5580 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5581 {
5582 switch (stringset) {
5583 case ETH_SS_STATS:
5584 memcpy(data, &qeth_ethtool_stats_keys,
5585 sizeof(qeth_ethtool_stats_keys));
5586 break;
5587 default:
5588 WARN_ON(1);
5589 break;
5590 }
5591 }
5592 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5593
5594 void qeth_core_get_drvinfo(struct net_device *dev,
5595 struct ethtool_drvinfo *info)
5596 {
5597 struct qeth_card *card = dev->ml_priv;
5598
5599 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
5600 sizeof(info->driver));
5601 strlcpy(info->version, "1.0", sizeof(info->version));
5602 strlcpy(info->fw_version, card->info.mcl_level,
5603 sizeof(info->fw_version));
5604 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
5605 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
5606 }
5607 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5608
5609 int qeth_core_ethtool_get_settings(struct net_device *netdev,
5610 struct ethtool_cmd *ecmd)
5611 {
5612 struct qeth_card *card = netdev->ml_priv;
5613 enum qeth_link_types link_type;
5614
5615 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5616 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5617 else
5618 link_type = card->info.link_type;
5619
5620 ecmd->transceiver = XCVR_INTERNAL;
5621 ecmd->supported = SUPPORTED_Autoneg;
5622 ecmd->advertising = ADVERTISED_Autoneg;
5623 ecmd->duplex = DUPLEX_FULL;
5624 ecmd->autoneg = AUTONEG_ENABLE;
5625
5626 switch (link_type) {
5627 case QETH_LINK_TYPE_FAST_ETH:
5628 case QETH_LINK_TYPE_LANE_ETH100:
5629 ecmd->supported |= SUPPORTED_10baseT_Half |
5630 SUPPORTED_10baseT_Full |
5631 SUPPORTED_100baseT_Half |
5632 SUPPORTED_100baseT_Full |
5633 SUPPORTED_TP;
5634 ecmd->advertising |= ADVERTISED_10baseT_Half |
5635 ADVERTISED_10baseT_Full |
5636 ADVERTISED_100baseT_Half |
5637 ADVERTISED_100baseT_Full |
5638 ADVERTISED_TP;
5639 ecmd->speed = SPEED_100;
5640 ecmd->port = PORT_TP;
5641 break;
5642
5643 case QETH_LINK_TYPE_GBIT_ETH:
5644 case QETH_LINK_TYPE_LANE_ETH1000:
5645 ecmd->supported |= SUPPORTED_10baseT_Half |
5646 SUPPORTED_10baseT_Full |
5647 SUPPORTED_100baseT_Half |
5648 SUPPORTED_100baseT_Full |
5649 SUPPORTED_1000baseT_Half |
5650 SUPPORTED_1000baseT_Full |
5651 SUPPORTED_FIBRE;
5652 ecmd->advertising |= ADVERTISED_10baseT_Half |
5653 ADVERTISED_10baseT_Full |
5654 ADVERTISED_100baseT_Half |
5655 ADVERTISED_100baseT_Full |
5656 ADVERTISED_1000baseT_Half |
5657 ADVERTISED_1000baseT_Full |
5658 ADVERTISED_FIBRE;
5659 ecmd->speed = SPEED_1000;
5660 ecmd->port = PORT_FIBRE;
5661 break;
5662
5663 case QETH_LINK_TYPE_10GBIT_ETH:
5664 ecmd->supported |= SUPPORTED_10baseT_Half |
5665 SUPPORTED_10baseT_Full |
5666 SUPPORTED_100baseT_Half |
5667 SUPPORTED_100baseT_Full |
5668 SUPPORTED_1000baseT_Half |
5669 SUPPORTED_1000baseT_Full |
5670 SUPPORTED_10000baseT_Full |
5671 SUPPORTED_FIBRE;
5672 ecmd->advertising |= ADVERTISED_10baseT_Half |
5673 ADVERTISED_10baseT_Full |
5674 ADVERTISED_100baseT_Half |
5675 ADVERTISED_100baseT_Full |
5676 ADVERTISED_1000baseT_Half |
5677 ADVERTISED_1000baseT_Full |
5678 ADVERTISED_10000baseT_Full |
5679 ADVERTISED_FIBRE;
5680 ecmd->speed = SPEED_10000;
5681 ecmd->port = PORT_FIBRE;
5682 break;
5683
5684 default:
5685 ecmd->supported |= SUPPORTED_10baseT_Half |
5686 SUPPORTED_10baseT_Full |
5687 SUPPORTED_TP;
5688 ecmd->advertising |= ADVERTISED_10baseT_Half |
5689 ADVERTISED_10baseT_Full |
5690 ADVERTISED_TP;
5691 ecmd->speed = SPEED_10;
5692 ecmd->port = PORT_TP;
5693 }
5694
5695 return 0;
5696 }
5697 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
5698
5699 static int __init qeth_core_init(void)
5700 {
5701 int rc;
5702
5703 pr_info("loading core functions\n");
5704 INIT_LIST_HEAD(&qeth_core_card_list.list);
5705 INIT_LIST_HEAD(&qeth_dbf_list);
5706 rwlock_init(&qeth_core_card_list.rwlock);
5707 mutex_init(&qeth_mod_mutex);
5708
5709 qeth_wq = create_singlethread_workqueue("qeth_wq");
5710
5711 rc = qeth_register_dbf_views();
5712 if (rc)
5713 goto out_err;
5714 qeth_core_root_dev = root_device_register("qeth");
5715 rc = PTR_RET(qeth_core_root_dev);
5716 if (rc)
5717 goto register_err;
5718 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
5719 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
5720 if (!qeth_core_header_cache) {
5721 rc = -ENOMEM;
5722 goto slab_err;
5723 }
5724 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
5725 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
5726 if (!qeth_qdio_outbuf_cache) {
5727 rc = -ENOMEM;
5728 goto cqslab_err;
5729 }
5730 rc = ccw_driver_register(&qeth_ccw_driver);
5731 if (rc)
5732 goto ccw_err;
5733 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
5734 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
5735 if (rc)
5736 goto ccwgroup_err;
5737
5738 return 0;
5739
5740 ccwgroup_err:
5741 ccw_driver_unregister(&qeth_ccw_driver);
5742 ccw_err:
5743 kmem_cache_destroy(qeth_qdio_outbuf_cache);
5744 cqslab_err:
5745 kmem_cache_destroy(qeth_core_header_cache);
5746 slab_err:
5747 root_device_unregister(qeth_core_root_dev);
5748 register_err:
5749 qeth_unregister_dbf_views();
5750 out_err:
5751 pr_err("Initializing the qeth device driver failed\n");
5752 return rc;
5753 }
5754
5755 static void __exit qeth_core_exit(void)
5756 {
5757 qeth_clear_dbf_list();
5758 destroy_workqueue(qeth_wq);
5759 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5760 ccw_driver_unregister(&qeth_ccw_driver);
5761 kmem_cache_destroy(qeth_qdio_outbuf_cache);
5762 kmem_cache_destroy(qeth_core_header_cache);
5763 root_device_unregister(qeth_core_root_dev);
5764 qeth_unregister_dbf_views();
5765 pr_info("core functions removed\n");
5766 }
5767
5768 module_init(qeth_core_init);
5769 module_exit(qeth_core_exit);
5770 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
5771 MODULE_DESCRIPTION("qeth core functions");
5772 MODULE_LICENSE("GPL");
Linux with added FPC-III support