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mfd: wm8350-i2c: Make sure the i2c regmap functions are compiled
[linux/fpc-iii.git] / drivers / scsi / bfa / bfi.h
blob37bd2564e83bbd1e7d1742bfe03d9bf6821e938c
1 /*
2 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
3 * All rights reserved
4 * www.brocade.com
5 *
6 * Linux driver for Brocade Fibre Channel Host Bus Adapter.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License (GPL) Version 2 as
10 * published by the Free Software Foundation
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 */
17
18 #ifndef __BFI_H__
19 #define __BFI_H__
20
21 #include "bfa_defs.h"
22 #include "bfa_defs_svc.h"
23
24 #pragma pack(1)
25
26 /* Per dma segment max size */
27 #define BFI_MEM_DMA_SEG_SZ (131072)
28
29 /* Get number of dma segments required */
30 #define BFI_MEM_DMA_NSEGS(_num_reqs, _req_sz) \
31 ((u16)(((((_num_reqs) * (_req_sz)) + BFI_MEM_DMA_SEG_SZ - 1) & \
32 ~(BFI_MEM_DMA_SEG_SZ - 1)) / BFI_MEM_DMA_SEG_SZ))
33
34 /* Get num dma reqs - that fit in a segment */
35 #define BFI_MEM_NREQS_SEG(_rqsz) (BFI_MEM_DMA_SEG_SZ / (_rqsz))
36
37 /* Get segment num from tag */
38 #define BFI_MEM_SEG_FROM_TAG(_tag, _rqsz) ((_tag) / BFI_MEM_NREQS_SEG(_rqsz))
39
40 /* Get dma req offset in a segment */
41 #define BFI_MEM_SEG_REQ_OFFSET(_tag, _sz) \
42 ((_tag) - (BFI_MEM_SEG_FROM_TAG(_tag, _sz) * BFI_MEM_NREQS_SEG(_sz)))
43
44 /*
45 * BFI FW image type
46 */
47 #define BFI_FLASH_CHUNK_SZ 256 /* Flash chunk size */
48 #define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32))
49
50 /*
51 * Msg header common to all msgs
52 */
53 struct bfi_mhdr_s {
54 u8 msg_class; /* @ref bfi_mclass_t */
55 u8 msg_id; /* msg opcode with in the class */
56 union {
57 struct {
58 u8 qid;
59 u8 fn_lpu; /* msg destination */
60 } h2i;
61 u16 i2htok; /* token in msgs to host */
62 } mtag;
63 };
64
65 #define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu))
66 #define bfi_mhdr_2_fn(_mh) ((_mh)->mtag.h2i.fn_lpu >> 1)
67
68 #define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do { \
69 (_mh).msg_class = (_mc); \
70 (_mh).msg_id = (_op); \
71 (_mh).mtag.h2i.fn_lpu = (_fn_lpu); \
72 } while (0)
73
74 #define bfi_i2h_set(_mh, _mc, _op, _i2htok) do { \
75 (_mh).msg_class = (_mc); \
76 (_mh).msg_id = (_op); \
77 (_mh).mtag.i2htok = (_i2htok); \
78 } while (0)
79
80 /*
81 * Message opcodes: 0-127 to firmware, 128-255 to host
82 */
83 #define BFI_I2H_OPCODE_BASE 128
84 #define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE)
85
86 /*
87 ****************************************************************************
88 *
89 * Scatter Gather Element and Page definition
90 *
91 ****************************************************************************
92 */
93
94 #define BFI_SGE_INLINE 1
95 #define BFI_SGE_INLINE_MAX (BFI_SGE_INLINE + 1)
96
97 /*
98 * SG Flags
99 */
100 enum {
101 BFI_SGE_DATA = 0, /* data address, not last */
102 BFI_SGE_DATA_CPL = 1, /* data addr, last in current page */
103 BFI_SGE_DATA_LAST = 3, /* data address, last */
104 BFI_SGE_LINK = 2, /* link address */
105 BFI_SGE_PGDLEN = 2, /* cumulative data length for page */
106 };
107
108 /*
109 * DMA addresses
110 */
111 union bfi_addr_u {
112 struct {
113 __be32 addr_lo;
114 __be32 addr_hi;
115 } a32;
116 };
117
118 /*
119 * Scatter Gather Element used for fast-path IO requests
120 */
121 struct bfi_sge_s {
122 #ifdef __BIG_ENDIAN
123 u32 flags:2,
124 rsvd:2,
125 sg_len:28;
126 #else
127 u32 sg_len:28,
128 rsvd:2,
129 flags:2;
130 #endif
131 union bfi_addr_u sga;
132 };
133
134 /**
135 * Generic DMA addr-len pair.
136 */
137 struct bfi_alen_s {
138 union bfi_addr_u al_addr; /* DMA addr of buffer */
139 u32 al_len; /* length of buffer */
140 };
141
142 /*
143 * Scatter Gather Page
144 */
145 #define BFI_SGPG_DATA_SGES 7
146 #define BFI_SGPG_SGES_MAX (BFI_SGPG_DATA_SGES + 1)
147 #define BFI_SGPG_RSVD_WD_LEN 8
148 struct bfi_sgpg_s {
149 struct bfi_sge_s sges[BFI_SGPG_SGES_MAX];
150 u32 rsvd[BFI_SGPG_RSVD_WD_LEN];
151 };
152
153 /* FCP module definitions */
154 #define BFI_IO_MAX (2000)
155 #define BFI_IOIM_SNSLEN (256)
156 #define BFI_IOIM_SNSBUF_SEGS \
157 BFI_MEM_DMA_NSEGS(BFI_IO_MAX, BFI_IOIM_SNSLEN)
158
159 /*
160 * Large Message structure - 128 Bytes size Msgs
161 */
162 #define BFI_LMSG_SZ 128
163 #define BFI_LMSG_PL_WSZ \
164 ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr_s)) / 4)
165
166 struct bfi_msg_s {
167 struct bfi_mhdr_s mhdr;
168 u32 pl[BFI_LMSG_PL_WSZ];
169 };
170
171 /*
172 * Mailbox message structure
173 */
174 #define BFI_MBMSG_SZ 7
175 struct bfi_mbmsg_s {
176 struct bfi_mhdr_s mh;
177 u32 pl[BFI_MBMSG_SZ];
178 };
179
180 /*
181 * Supported PCI function class codes (personality)
182 */
183 enum bfi_pcifn_class {
184 BFI_PCIFN_CLASS_FC = 0x0c04,
185 BFI_PCIFN_CLASS_ETH = 0x0200,
186 };
187
188 /*
189 * Message Classes
190 */
191 enum bfi_mclass {
192 BFI_MC_IOC = 1, /* IO Controller (IOC) */
193 BFI_MC_DIAG = 2, /* Diagnostic Msgs */
194 BFI_MC_FLASH = 3, /* Flash message class */
195 BFI_MC_CEE = 4, /* CEE */
196 BFI_MC_FCPORT = 5, /* FC port */
197 BFI_MC_IOCFC = 6, /* FC - IO Controller (IOC) */
198 BFI_MC_ABLK = 7, /* ASIC block configuration */
199 BFI_MC_UF = 8, /* Unsolicited frame receive */
200 BFI_MC_FCXP = 9, /* FC Transport */
201 BFI_MC_LPS = 10, /* lport fc login services */
202 BFI_MC_RPORT = 11, /* Remote port */
203 BFI_MC_ITN = 12, /* I-T nexus (Initiator mode) */
204 BFI_MC_IOIM_READ = 13, /* read IO (Initiator mode) */
205 BFI_MC_IOIM_WRITE = 14, /* write IO (Initiator mode) */
206 BFI_MC_IOIM_IO = 15, /* IO (Initiator mode) */
207 BFI_MC_IOIM = 16, /* IO (Initiator mode) */
208 BFI_MC_IOIM_IOCOM = 17, /* good IO completion */
209 BFI_MC_TSKIM = 18, /* Initiator Task management */
210 BFI_MC_PORT = 21, /* Physical port */
211 BFI_MC_SFP = 22, /* SFP module */
212 BFI_MC_PHY = 25, /* External PHY message class */
213 BFI_MC_FRU = 34,
214 BFI_MC_MAX = 35
215 };
216
217 #define BFI_IOC_MAX_CQS 4
218 #define BFI_IOC_MAX_CQS_ASIC 8
219 #define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */
220
221 /*
222 *----------------------------------------------------------------------
223 * IOC
224 *----------------------------------------------------------------------
225 */
226
227 /*
228 * Different asic generations
229 */
230 enum bfi_asic_gen {
231 BFI_ASIC_GEN_CB = 1, /* crossbow 8G FC */
232 BFI_ASIC_GEN_CT = 2, /* catapult 8G FC or 10G CNA */
233 BFI_ASIC_GEN_CT2 = 3, /* catapult-2 16G FC or 10G CNA */
234 };
235
236 enum bfi_asic_mode {
237 BFI_ASIC_MODE_FC = 1, /* FC upto 8G speed */
238 BFI_ASIC_MODE_FC16 = 2, /* FC upto 16G speed */
239 BFI_ASIC_MODE_ETH = 3, /* Ethernet ports */
240 BFI_ASIC_MODE_COMBO = 4, /* FC 16G and Ethernet 10G port */
241 };
242
243 enum bfi_ioc_h2i_msgs {
244 BFI_IOC_H2I_ENABLE_REQ = 1,
245 BFI_IOC_H2I_DISABLE_REQ = 2,
246 BFI_IOC_H2I_GETATTR_REQ = 3,
247 BFI_IOC_H2I_DBG_SYNC = 4,
248 BFI_IOC_H2I_DBG_DUMP = 5,
249 };
250
251 enum bfi_ioc_i2h_msgs {
252 BFI_IOC_I2H_ENABLE_REPLY = BFA_I2HM(1),
253 BFI_IOC_I2H_DISABLE_REPLY = BFA_I2HM(2),
254 BFI_IOC_I2H_GETATTR_REPLY = BFA_I2HM(3),
255 BFI_IOC_I2H_HBEAT = BFA_I2HM(4),
256 BFI_IOC_I2H_ACQ_ADDR_REPLY = BFA_I2HM(5),
257 };
258
259 /*
260 * BFI_IOC_H2I_GETATTR_REQ message
261 */
262 struct bfi_ioc_getattr_req_s {
263 struct bfi_mhdr_s mh;
264 union bfi_addr_u attr_addr;
265 };
266
267 #define BFI_IOC_ATTR_UUID_SZ 16
268 struct bfi_ioc_attr_s {
269 wwn_t mfg_pwwn; /* Mfg port wwn */
270 wwn_t mfg_nwwn; /* Mfg node wwn */
271 mac_t mfg_mac; /* Mfg mac */
272 u8 port_mode; /* bfi_port_mode */
273 u8 rsvd_a;
274 wwn_t pwwn;
275 wwn_t nwwn;
276 mac_t mac; /* PBC or Mfg mac */
277 u16 rsvd_b;
278 mac_t fcoe_mac;
279 u16 rsvd_c;
280 char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
281 u8 pcie_gen;
282 u8 pcie_lanes_orig;
283 u8 pcie_lanes;
284 u8 rx_bbcredit; /* receive buffer credits */
285 u32 adapter_prop; /* adapter properties */
286 u16 maxfrsize; /* max receive frame size */
287 char asic_rev;
288 u8 rsvd_d;
289 char fw_version[BFA_VERSION_LEN];
290 char optrom_version[BFA_VERSION_LEN];
291 struct bfa_mfg_vpd_s vpd;
292 u32 card_type; /* card type */
293 u8 mfg_day; /* manufacturing day */
294 u8 mfg_month; /* manufacturing month */
295 u16 mfg_year; /* manufacturing year */
296 u8 uuid[BFI_IOC_ATTR_UUID_SZ]; /*!< chinook uuid */
297 };
298
299 /*
300 * BFI_IOC_I2H_GETATTR_REPLY message
301 */
302 struct bfi_ioc_getattr_reply_s {
303 struct bfi_mhdr_s mh; /* Common msg header */
304 u8 status; /* cfg reply status */
305 u8 rsvd[3];
306 };
307
308 /*
309 * Firmware memory page offsets
310 */
311 #define BFI_IOC_SMEM_PG0_CB (0x40)
312 #define BFI_IOC_SMEM_PG0_CT (0x180)
313
314 /*
315 * Firmware statistic offset
316 */
317 #define BFI_IOC_FWSTATS_OFF (0x6B40)
318 #define BFI_IOC_FWSTATS_SZ (4096)
319
320 /*
321 * Firmware trace offset
322 */
323 #define BFI_IOC_TRC_OFF (0x4b00)
324 #define BFI_IOC_TRC_ENTS 256
325
326 #define BFI_IOC_FW_SIGNATURE (0xbfadbfad)
327 #define BFI_IOC_MD5SUM_SZ 4
328 struct bfi_ioc_image_hdr_s {
329 u32 signature; /* constant signature */
330 u8 asic_gen; /* asic generation */
331 u8 asic_mode;
332 u8 port0_mode; /* device mode for port 0 */
333 u8 port1_mode; /* device mode for port 1 */
334 u32 exec; /* exec vector */
335 u32 bootenv; /* fimware boot env */
336 u32 rsvd_b[4];
337 u32 md5sum[BFI_IOC_MD5SUM_SZ];
338 };
339
340 #define BFI_FWBOOT_DEVMODE_OFF 4
341 #define BFI_FWBOOT_TYPE_OFF 8
342 #define BFI_FWBOOT_ENV_OFF 12
343 #define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \
344 (((u32)(__asic_gen)) << 24 | \
345 ((u32)(__asic_mode)) << 16 | \
346 ((u32)(__p0_mode)) << 8 | \
347 ((u32)(__p1_mode)))
348
349 #define BFI_FWBOOT_TYPE_NORMAL 0
350 #define BFI_FWBOOT_TYPE_MEMTEST 2
351 #define BFI_FWBOOT_ENV_OS 0
352
353 enum bfi_port_mode {
354 BFI_PORT_MODE_FC = 1,
355 BFI_PORT_MODE_ETH = 2,
356 };
357
358 struct bfi_ioc_hbeat_s {
359 struct bfi_mhdr_s mh; /* common msg header */
360 u32 hb_count; /* current heart beat count */
361 };
362
363 /*
364 * IOC hardware/firmware state
365 */
366 enum bfi_ioc_state {
367 BFI_IOC_UNINIT = 0, /* not initialized */
368 BFI_IOC_INITING = 1, /* h/w is being initialized */
369 BFI_IOC_HWINIT = 2, /* h/w is initialized */
370 BFI_IOC_CFG = 3, /* IOC configuration in progress */
371 BFI_IOC_OP = 4, /* IOC is operational */
372 BFI_IOC_DISABLING = 5, /* IOC is being disabled */
373 BFI_IOC_DISABLED = 6, /* IOC is disabled */
374 BFI_IOC_CFG_DISABLED = 7, /* IOC is being disabled;transient */
375 BFI_IOC_FAIL = 8, /* IOC heart-beat failure */
376 BFI_IOC_MEMTEST = 9, /* IOC is doing memtest */
377 };
378
379 #define BFA_IOC_CB_JOIN_SH 16
380 #define BFA_IOC_CB_FWSTATE_MASK 0x0000ffff
381 #define BFA_IOC_CB_JOIN_MASK 0xffff0000
382
383 #define BFI_IOC_ENDIAN_SIG 0x12345678
384
385 enum {
386 BFI_ADAPTER_TYPE_FC = 0x01, /* FC adapters */
387 BFI_ADAPTER_TYPE_MK = 0x0f0000, /* adapter type mask */
388 BFI_ADAPTER_TYPE_SH = 16, /* adapter type shift */
389 BFI_ADAPTER_NPORTS_MK = 0xff00, /* number of ports mask */
390 BFI_ADAPTER_NPORTS_SH = 8, /* number of ports shift */
391 BFI_ADAPTER_SPEED_MK = 0xff, /* adapter speed mask */
392 BFI_ADAPTER_SPEED_SH = 0, /* adapter speed shift */
393 BFI_ADAPTER_PROTO = 0x100000, /* prototype adapaters */
394 BFI_ADAPTER_TTV = 0x200000, /* TTV debug capable */
395 BFI_ADAPTER_UNSUPP = 0x400000, /* unknown adapter type */
396 };
397
398 #define BFI_ADAPTER_GETP(__prop, __adap_prop) \
399 (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \
400 BFI_ADAPTER_ ## __prop ## _SH)
401 #define BFI_ADAPTER_SETP(__prop, __val) \
402 ((__val) << BFI_ADAPTER_ ## __prop ## _SH)
403 #define BFI_ADAPTER_IS_PROTO(__adap_type) \
404 ((__adap_type) & BFI_ADAPTER_PROTO)
405 #define BFI_ADAPTER_IS_TTV(__adap_type) \
406 ((__adap_type) & BFI_ADAPTER_TTV)
407 #define BFI_ADAPTER_IS_UNSUPP(__adap_type) \
408 ((__adap_type) & BFI_ADAPTER_UNSUPP)
409 #define BFI_ADAPTER_IS_SPECIAL(__adap_type) \
410 ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \
411 BFI_ADAPTER_UNSUPP))
412
413 /*
414 * BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages
415 */
416 struct bfi_ioc_ctrl_req_s {
417 struct bfi_mhdr_s mh;
418 u16 clscode;
419 u16 rsvd;
420 u32 tv_sec;
421 };
422 #define bfi_ioc_enable_req_t struct bfi_ioc_ctrl_req_s;
423 #define bfi_ioc_disable_req_t struct bfi_ioc_ctrl_req_s;
424
425 /*
426 * BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages
427 */
428 struct bfi_ioc_ctrl_reply_s {
429 struct bfi_mhdr_s mh; /* Common msg header */
430 u8 status; /* enable/disable status */
431 u8 port_mode; /* bfa_mode_s */
432 u8 cap_bm; /* capability bit mask */
433 u8 rsvd;
434 };
435 #define bfi_ioc_enable_reply_t struct bfi_ioc_ctrl_reply_s;
436 #define bfi_ioc_disable_reply_t struct bfi_ioc_ctrl_reply_s;
437
438 #define BFI_IOC_MSGSZ 8
439 /*
440 * H2I Messages
441 */
442 union bfi_ioc_h2i_msg_u {
443 struct bfi_mhdr_s mh;
444 struct bfi_ioc_ctrl_req_s enable_req;
445 struct bfi_ioc_ctrl_req_s disable_req;
446 struct bfi_ioc_getattr_req_s getattr_req;
447 u32 mboxmsg[BFI_IOC_MSGSZ];
448 };
449
450 /*
451 * I2H Messages
452 */
453 union bfi_ioc_i2h_msg_u {
454 struct bfi_mhdr_s mh;
455 struct bfi_ioc_ctrl_reply_s fw_event;
456 u32 mboxmsg[BFI_IOC_MSGSZ];
457 };
458
459
460 /*
461 *----------------------------------------------------------------------
462 * PBC
463 *----------------------------------------------------------------------
464 */
465
466 #define BFI_PBC_MAX_BLUNS 8
467 #define BFI_PBC_MAX_VPORTS 16
468 #define BFI_PBC_PORT_DISABLED 2
469
470 /*
471 * PBC boot lun configuration
472 */
473 struct bfi_pbc_blun_s {
474 wwn_t tgt_pwwn;
475 struct scsi_lun tgt_lun;
476 };
477
478 /*
479 * PBC virtual port configuration
480 */
481 struct bfi_pbc_vport_s {
482 wwn_t vp_pwwn;
483 wwn_t vp_nwwn;
484 };
485
486 /*
487 * BFI pre-boot configuration information
488 */
489 struct bfi_pbc_s {
490 u8 port_enabled;
491 u8 boot_enabled;
492 u8 nbluns;
493 u8 nvports;
494 u8 port_speed;
495 u8 rsvd_a;
496 u16 hss;
497 wwn_t pbc_pwwn;
498 wwn_t pbc_nwwn;
499 struct bfi_pbc_blun_s blun[BFI_PBC_MAX_BLUNS];
500 struct bfi_pbc_vport_s vport[BFI_PBC_MAX_VPORTS];
501 };
502
503 /*
504 *----------------------------------------------------------------------
505 * MSGQ
506 *----------------------------------------------------------------------
507 */
508 #define BFI_MSGQ_FULL(_q) (((_q->pi + 1) % _q->q_depth) == _q->ci)
509 #define BFI_MSGQ_EMPTY(_q) (_q->pi == _q->ci)
510 #define BFI_MSGQ_UPDATE_CI(_q) (_q->ci = (_q->ci + 1) % _q->q_depth)
511 #define BFI_MSGQ_UPDATE_PI(_q) (_q->pi = (_q->pi + 1) % _q->q_depth)
512
513 /* q_depth must be power of 2 */
514 #define BFI_MSGQ_FREE_CNT(_q) ((_q->ci - _q->pi - 1) & (_q->q_depth - 1))
515
516 enum bfi_msgq_h2i_msgs_e {
517 BFI_MSGQ_H2I_INIT_REQ = 1,
518 BFI_MSGQ_H2I_DOORBELL = 2,
519 BFI_MSGQ_H2I_SHUTDOWN = 3,
520 };
521
522 enum bfi_msgq_i2h_msgs_e {
523 BFI_MSGQ_I2H_INIT_RSP = 1,
524 BFI_MSGQ_I2H_DOORBELL = 2,
525 };
526
527
528 /* Messages(commands/responsed/AENS will have the following header */
529 struct bfi_msgq_mhdr_s {
530 u8 msg_class;
531 u8 msg_id;
532 u16 msg_token;
533 u16 num_entries;
534 u8 enet_id;
535 u8 rsvd[1];
536 };
537
538 #define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do { \
539 (_mh).msg_class = (_mc); \
540 (_mh).msg_id = (_mid); \
541 (_mh).msg_token = (_tok); \
542 (_mh).enet_id = (_enet_id); \
543 } while (0)
544
545 /*
546 * Mailbox for messaging interface
547 *
548 */
549 #define BFI_MSGQ_CMD_ENTRY_SIZE (64) /* TBD */
550 #define BFI_MSGQ_RSP_ENTRY_SIZE (64) /* TBD */
551 #define BFI_MSGQ_MSG_SIZE_MAX (2048) /* TBD */
552
553 struct bfi_msgq_s {
554 union bfi_addr_u addr;
555 u16 q_depth; /* Total num of entries in the queue */
556 u8 rsvd[2];
557 };
558
559 /* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
560 struct bfi_msgq_cfg_req_s {
561 struct bfi_mhdr_s mh;
562 struct bfi_msgq_s cmdq;
563 struct bfi_msgq_s rspq;
564 };
565
566 /* BFI_ENET_MSGQ_CFG_RSP */
567 struct bfi_msgq_cfg_rsp_s {
568 struct bfi_mhdr_s mh;
569 u8 cmd_status;
570 u8 rsvd[3];
571 };
572
573
574 /* BFI_MSGQ_H2I_DOORBELL */
575 struct bfi_msgq_h2i_db_s {
576 struct bfi_mhdr_s mh;
577 u16 cmdq_pi;
578 u16 rspq_ci;
579 };
580
581 /* BFI_MSGQ_I2H_DOORBELL */
582 struct bfi_msgq_i2h_db_s {
583 struct bfi_mhdr_s mh;
584 u16 rspq_pi;
585 u16 cmdq_ci;
586 };
587
588 #pragma pack()
589
590 /* BFI port specific */
591 #pragma pack(1)
592
593 enum bfi_port_h2i {
594 BFI_PORT_H2I_ENABLE_REQ = (1),
595 BFI_PORT_H2I_DISABLE_REQ = (2),
596 BFI_PORT_H2I_GET_STATS_REQ = (3),
597 BFI_PORT_H2I_CLEAR_STATS_REQ = (4),
598 };
599
600 enum bfi_port_i2h {
601 BFI_PORT_I2H_ENABLE_RSP = BFA_I2HM(1),
602 BFI_PORT_I2H_DISABLE_RSP = BFA_I2HM(2),
603 BFI_PORT_I2H_GET_STATS_RSP = BFA_I2HM(3),
604 BFI_PORT_I2H_CLEAR_STATS_RSP = BFA_I2HM(4),
605 };
606
607 /*
608 * Generic REQ type
609 */
610 struct bfi_port_generic_req_s {
611 struct bfi_mhdr_s mh; /* msg header */
612 u32 msgtag; /* msgtag for reply */
613 u32 rsvd;
614 };
615
616 /*
617 * Generic RSP type
618 */
619 struct bfi_port_generic_rsp_s {
620 struct bfi_mhdr_s mh; /* common msg header */
621 u8 status; /* port enable status */
622 u8 rsvd[3];
623 u32 msgtag; /* msgtag for reply */
624 };
625
626 /*
627 * BFI_PORT_H2I_GET_STATS_REQ
628 */
629 struct bfi_port_get_stats_req_s {
630 struct bfi_mhdr_s mh; /* common msg header */
631 union bfi_addr_u dma_addr;
632 };
633
634 union bfi_port_h2i_msg_u {
635 struct bfi_mhdr_s mh;
636 struct bfi_port_generic_req_s enable_req;
637 struct bfi_port_generic_req_s disable_req;
638 struct bfi_port_get_stats_req_s getstats_req;
639 struct bfi_port_generic_req_s clearstats_req;
640 };
641
642 union bfi_port_i2h_msg_u {
643 struct bfi_mhdr_s mh;
644 struct bfi_port_generic_rsp_s enable_rsp;
645 struct bfi_port_generic_rsp_s disable_rsp;
646 struct bfi_port_generic_rsp_s getstats_rsp;
647 struct bfi_port_generic_rsp_s clearstats_rsp;
648 };
649
650 /*
651 *----------------------------------------------------------------------
652 * ABLK
653 *----------------------------------------------------------------------
654 */
655 enum bfi_ablk_h2i_msgs_e {
656 BFI_ABLK_H2I_QUERY = 1,
657 BFI_ABLK_H2I_ADPT_CONFIG = 2,
658 BFI_ABLK_H2I_PORT_CONFIG = 3,
659 BFI_ABLK_H2I_PF_CREATE = 4,
660 BFI_ABLK_H2I_PF_DELETE = 5,
661 BFI_ABLK_H2I_PF_UPDATE = 6,
662 BFI_ABLK_H2I_OPTROM_ENABLE = 7,
663 BFI_ABLK_H2I_OPTROM_DISABLE = 8,
664 };
665
666 enum bfi_ablk_i2h_msgs_e {
667 BFI_ABLK_I2H_QUERY = BFA_I2HM(BFI_ABLK_H2I_QUERY),
668 BFI_ABLK_I2H_ADPT_CONFIG = BFA_I2HM(BFI_ABLK_H2I_ADPT_CONFIG),
669 BFI_ABLK_I2H_PORT_CONFIG = BFA_I2HM(BFI_ABLK_H2I_PORT_CONFIG),
670 BFI_ABLK_I2H_PF_CREATE = BFA_I2HM(BFI_ABLK_H2I_PF_CREATE),
671 BFI_ABLK_I2H_PF_DELETE = BFA_I2HM(BFI_ABLK_H2I_PF_DELETE),
672 BFI_ABLK_I2H_PF_UPDATE = BFA_I2HM(BFI_ABLK_H2I_PF_UPDATE),
673 BFI_ABLK_I2H_OPTROM_ENABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_ENABLE),
674 BFI_ABLK_I2H_OPTROM_DISABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_DISABLE),
675 };
676
677 /* BFI_ABLK_H2I_QUERY */
678 struct bfi_ablk_h2i_query_s {
679 struct bfi_mhdr_s mh;
680 union bfi_addr_u addr;
681 };
682
683 /* BFI_ABL_H2I_ADPT_CONFIG, BFI_ABLK_H2I_PORT_CONFIG */
684 struct bfi_ablk_h2i_cfg_req_s {
685 struct bfi_mhdr_s mh;
686 u8 mode;
687 u8 port;
688 u8 max_pf;
689 u8 max_vf;
690 };
691
692 /*
693 * BFI_ABLK_H2I_PF_CREATE, BFI_ABLK_H2I_PF_DELETE,
694 */
695 struct bfi_ablk_h2i_pf_req_s {
696 struct bfi_mhdr_s mh;
697 u8 pcifn;
698 u8 port;
699 u16 pers;
700 u16 bw_min; /* percent BW @ max speed */
701 u16 bw_max; /* percent BW @ max speed */
702 };
703
704 /* BFI_ABLK_H2I_OPTROM_ENABLE, BFI_ABLK_H2I_OPTROM_DISABLE */
705 struct bfi_ablk_h2i_optrom_s {
706 struct bfi_mhdr_s mh;
707 };
708
709 /*
710 * BFI_ABLK_I2H_QUERY
711 * BFI_ABLK_I2H_PORT_CONFIG
712 * BFI_ABLK_I2H_PF_CREATE
713 * BFI_ABLK_I2H_PF_DELETE
714 * BFI_ABLK_I2H_PF_UPDATE
715 * BFI_ABLK_I2H_OPTROM_ENABLE
716 * BFI_ABLK_I2H_OPTROM_DISABLE
717 */
718 struct bfi_ablk_i2h_rsp_s {
719 struct bfi_mhdr_s mh;
720 u8 status;
721 u8 pcifn;
722 u8 port_mode;
723 };
724
725
726 /*
727 * CEE module specific messages
728 */
729
730 /* Mailbox commands from host to firmware */
731 enum bfi_cee_h2i_msgs_e {
732 BFI_CEE_H2I_GET_CFG_REQ = 1,
733 BFI_CEE_H2I_RESET_STATS = 2,
734 BFI_CEE_H2I_GET_STATS_REQ = 3,
735 };
736
737 enum bfi_cee_i2h_msgs_e {
738 BFI_CEE_I2H_GET_CFG_RSP = BFA_I2HM(1),
739 BFI_CEE_I2H_RESET_STATS_RSP = BFA_I2HM(2),
740 BFI_CEE_I2H_GET_STATS_RSP = BFA_I2HM(3),
741 };
742
743 /*
744 * H2I command structure for resetting the stats
745 */
746 struct bfi_cee_reset_stats_s {
747 struct bfi_mhdr_s mh;
748 };
749
750 /*
751 * Get configuration command from host
752 */
753 struct bfi_cee_get_req_s {
754 struct bfi_mhdr_s mh;
755 union bfi_addr_u dma_addr;
756 };
757
758 /*
759 * Reply message from firmware
760 */
761 struct bfi_cee_get_rsp_s {
762 struct bfi_mhdr_s mh;
763 u8 cmd_status;
764 u8 rsvd[3];
765 };
766
767 /*
768 * Reply message from firmware
769 */
770 struct bfi_cee_stats_rsp_s {
771 struct bfi_mhdr_s mh;
772 u8 cmd_status;
773 u8 rsvd[3];
774 };
775
776 /* Mailbox message structures from firmware to host */
777 union bfi_cee_i2h_msg_u {
778 struct bfi_mhdr_s mh;
779 struct bfi_cee_get_rsp_s get_rsp;
780 struct bfi_cee_stats_rsp_s stats_rsp;
781 };
782
783 /*
784 * SFP related
785 */
786
787 enum bfi_sfp_h2i_e {
788 BFI_SFP_H2I_SHOW = 1,
789 BFI_SFP_H2I_SCN = 2,
790 };
791
792 enum bfi_sfp_i2h_e {
793 BFI_SFP_I2H_SHOW = BFA_I2HM(BFI_SFP_H2I_SHOW),
794 BFI_SFP_I2H_SCN = BFA_I2HM(BFI_SFP_H2I_SCN),
795 };
796
797 /*
798 * SFP state change notification
799 */
800 struct bfi_sfp_scn_s {
801 struct bfi_mhdr_s mhr; /* host msg header */
802 u8 event;
803 u8 sfpid;
804 u8 pomlvl; /* pom level: normal/warning/alarm */
805 u8 is_elb; /* e-loopback */
806 };
807
808 /*
809 * SFP state
810 */
811 enum bfa_sfp_stat_e {
812 BFA_SFP_STATE_INIT = 0, /* SFP state is uninit */
813 BFA_SFP_STATE_REMOVED = 1, /* SFP is removed */
814 BFA_SFP_STATE_INSERTED = 2, /* SFP is inserted */
815 BFA_SFP_STATE_VALID = 3, /* SFP is valid */
816 BFA_SFP_STATE_UNSUPPORT = 4, /* SFP is unsupport */
817 BFA_SFP_STATE_FAILED = 5, /* SFP i2c read fail */
818 };
819
820 /*
821 * SFP memory access type
822 */
823 enum bfi_sfp_mem_e {
824 BFI_SFP_MEM_ALL = 0x1, /* access all data field */
825 BFI_SFP_MEM_DIAGEXT = 0x2, /* access diag ext data field only */
826 };
827
828 struct bfi_sfp_req_s {
829 struct bfi_mhdr_s mh;
830 u8 memtype;
831 u8 rsvd[3];
832 struct bfi_alen_s alen;
833 };
834
835 struct bfi_sfp_rsp_s {
836 struct bfi_mhdr_s mh;
837 u8 status;
838 u8 state;
839 u8 rsvd[2];
840 };
841
842 /*
843 * FLASH module specific
844 */
845 enum bfi_flash_h2i_msgs {
846 BFI_FLASH_H2I_QUERY_REQ = 1,
847 BFI_FLASH_H2I_ERASE_REQ = 2,
848 BFI_FLASH_H2I_WRITE_REQ = 3,
849 BFI_FLASH_H2I_READ_REQ = 4,
850 BFI_FLASH_H2I_BOOT_VER_REQ = 5,
851 };
852
853 enum bfi_flash_i2h_msgs {
854 BFI_FLASH_I2H_QUERY_RSP = BFA_I2HM(1),
855 BFI_FLASH_I2H_ERASE_RSP = BFA_I2HM(2),
856 BFI_FLASH_I2H_WRITE_RSP = BFA_I2HM(3),
857 BFI_FLASH_I2H_READ_RSP = BFA_I2HM(4),
858 BFI_FLASH_I2H_BOOT_VER_RSP = BFA_I2HM(5),
859 BFI_FLASH_I2H_EVENT = BFA_I2HM(127),
860 };
861
862 /*
863 * Flash query request
864 */
865 struct bfi_flash_query_req_s {
866 struct bfi_mhdr_s mh; /* Common msg header */
867 struct bfi_alen_s alen;
868 };
869
870 /*
871 * Flash erase request
872 */
873 struct bfi_flash_erase_req_s {
874 struct bfi_mhdr_s mh; /* Common msg header */
875 u32 type; /* partition type */
876 u8 instance; /* partition instance */
877 u8 rsv[3];
878 };
879
880 /*
881 * Flash write request
882 */
883 struct bfi_flash_write_req_s {
884 struct bfi_mhdr_s mh; /* Common msg header */
885 struct bfi_alen_s alen;
886 u32 type; /* partition type */
887 u8 instance; /* partition instance */
888 u8 last;
889 u8 rsv[2];
890 u32 offset;
891 u32 length;
892 };
893
894 /*
895 * Flash read request
896 */
897 struct bfi_flash_read_req_s {
898 struct bfi_mhdr_s mh; /* Common msg header */
899 u32 type; /* partition type */
900 u8 instance; /* partition instance */
901 u8 rsv[3];
902 u32 offset;
903 u32 length;
904 struct bfi_alen_s alen;
905 };
906
907 /*
908 * Flash query response
909 */
910 struct bfi_flash_query_rsp_s {
911 struct bfi_mhdr_s mh; /* Common msg header */
912 u32 status;
913 };
914
915 /*
916 * Flash read response
917 */
918 struct bfi_flash_read_rsp_s {
919 struct bfi_mhdr_s mh; /* Common msg header */
920 u32 type; /* partition type */
921 u8 instance; /* partition instance */
922 u8 rsv[3];
923 u32 status;
924 u32 length;
925 };
926
927 /*
928 * Flash write response
929 */
930 struct bfi_flash_write_rsp_s {
931 struct bfi_mhdr_s mh; /* Common msg header */
932 u32 type; /* partition type */
933 u8 instance; /* partition instance */
934 u8 rsv[3];
935 u32 status;
936 u32 length;
937 };
938
939 /*
940 * Flash erase response
941 */
942 struct bfi_flash_erase_rsp_s {
943 struct bfi_mhdr_s mh; /* Common msg header */
944 u32 type; /* partition type */
945 u8 instance; /* partition instance */
946 u8 rsv[3];
947 u32 status;
948 };
949
950 /*
951 * Flash event notification
952 */
953 struct bfi_flash_event_s {
954 struct bfi_mhdr_s mh; /* Common msg header */
955 bfa_status_t status;
956 u32 param;
957 };
958
959 /*
960 *----------------------------------------------------------------------
961 * DIAG
962 *----------------------------------------------------------------------
963 */
964 enum bfi_diag_h2i {
965 BFI_DIAG_H2I_PORTBEACON = 1,
966 BFI_DIAG_H2I_LOOPBACK = 2,
967 BFI_DIAG_H2I_FWPING = 3,
968 BFI_DIAG_H2I_TEMPSENSOR = 4,
969 BFI_DIAG_H2I_LEDTEST = 5,
970 BFI_DIAG_H2I_QTEST = 6,
971 BFI_DIAG_H2I_DPORT = 7,
972 };
973
974 enum bfi_diag_i2h {
975 BFI_DIAG_I2H_PORTBEACON = BFA_I2HM(BFI_DIAG_H2I_PORTBEACON),
976 BFI_DIAG_I2H_LOOPBACK = BFA_I2HM(BFI_DIAG_H2I_LOOPBACK),
977 BFI_DIAG_I2H_FWPING = BFA_I2HM(BFI_DIAG_H2I_FWPING),
978 BFI_DIAG_I2H_TEMPSENSOR = BFA_I2HM(BFI_DIAG_H2I_TEMPSENSOR),
979 BFI_DIAG_I2H_LEDTEST = BFA_I2HM(BFI_DIAG_H2I_LEDTEST),
980 BFI_DIAG_I2H_QTEST = BFA_I2HM(BFI_DIAG_H2I_QTEST),
981 BFI_DIAG_I2H_DPORT = BFA_I2HM(BFI_DIAG_H2I_DPORT),
982 BFI_DIAG_I2H_DPORT_SCN = BFA_I2HM(8),
983 };
984
985 #define BFI_DIAG_MAX_SGES 2
986 #define BFI_DIAG_DMA_BUF_SZ (2 * 1024)
987 #define BFI_BOOT_MEMTEST_RES_ADDR 0x900
988 #define BFI_BOOT_MEMTEST_RES_SIG 0xA0A1A2A3
989
990 struct bfi_diag_lb_req_s {
991 struct bfi_mhdr_s mh;
992 u32 loopcnt;
993 u32 pattern;
994 u8 lb_mode; /*!< bfa_port_opmode_t */
995 u8 speed; /*!< bfa_port_speed_t */
996 u8 rsvd[2];
997 };
998
999 struct bfi_diag_lb_rsp_s {
1000 struct bfi_mhdr_s mh; /* 4 bytes */
1001 struct bfa_diag_loopback_result_s res; /* 16 bytes */
1002 };
1003
1004 struct bfi_diag_fwping_req_s {
1005 struct bfi_mhdr_s mh; /* 4 bytes */
1006 struct bfi_alen_s alen; /* 12 bytes */
1007 u32 data; /* user input data pattern */
1008 u32 count; /* user input dma count */
1009 u8 qtag; /* track CPE vc */
1010 u8 rsv[3];
1011 };
1012
1013 struct bfi_diag_fwping_rsp_s {
1014 struct bfi_mhdr_s mh; /* 4 bytes */
1015 u32 data; /* user input data pattern */
1016 u8 qtag; /* track CPE vc */
1017 u8 dma_status; /* dma status */
1018 u8 rsv[2];
1019 };
1020
1021 /*
1022 * Temperature Sensor
1023 */
1024 struct bfi_diag_ts_req_s {
1025 struct bfi_mhdr_s mh; /* 4 bytes */
1026 u16 temp; /* 10-bit A/D value */
1027 u16 brd_temp; /* 9-bit board temp */
1028 u8 status;
1029 u8 ts_junc; /* show junction tempsensor */
1030 u8 ts_brd; /* show board tempsensor */
1031 u8 rsv;
1032 };
1033 #define bfi_diag_ts_rsp_t struct bfi_diag_ts_req_s
1034
1035 struct bfi_diag_ledtest_req_s {
1036 struct bfi_mhdr_s mh; /* 4 bytes */
1037 u8 cmd;
1038 u8 color;
1039 u8 portid;
1040 u8 led; /* bitmap of LEDs to be tested */
1041 u16 freq; /* no. of blinks every 10 secs */
1042 u8 rsv[2];
1043 };
1044
1045 /* notify host led operation is done */
1046 struct bfi_diag_ledtest_rsp_s {
1047 struct bfi_mhdr_s mh; /* 4 bytes */
1048 };
1049
1050 struct bfi_diag_portbeacon_req_s {
1051 struct bfi_mhdr_s mh; /* 4 bytes */
1052 u32 period; /* beaconing period */
1053 u8 beacon; /* 1: beacon on */
1054 u8 rsvd[3];
1055 };
1056
1057 /* notify host the beacon is off */
1058 struct bfi_diag_portbeacon_rsp_s {
1059 struct bfi_mhdr_s mh; /* 4 bytes */
1060 };
1061
1062 struct bfi_diag_qtest_req_s {
1063 struct bfi_mhdr_s mh; /* 4 bytes */
1064 u32 data[BFI_LMSG_PL_WSZ]; /* fill up tcm prefetch area */
1065 };
1066 #define bfi_diag_qtest_rsp_t struct bfi_diag_qtest_req_s
1067
1068 /*
1069 * D-port test
1070 */
1071 enum bfi_dport_req {
1072 BFI_DPORT_DISABLE = 0, /* disable dport request */
1073 BFI_DPORT_ENABLE = 1, /* enable dport request */
1074 BFI_DPORT_START = 2, /* start dport request */
1075 BFI_DPORT_SHOW = 3, /* show dport request */
1076 BFI_DPORT_DYN_DISABLE = 4, /* disable dynamic dport request */
1077 };
1078
1079 enum bfi_dport_scn {
1080 BFI_DPORT_SCN_TESTSTART = 1,
1081 BFI_DPORT_SCN_TESTCOMP = 2,
1082 BFI_DPORT_SCN_SFP_REMOVED = 3,
1083 BFI_DPORT_SCN_DDPORT_ENABLE = 4,
1084 BFI_DPORT_SCN_DDPORT_DISABLE = 5,
1085 BFI_DPORT_SCN_FCPORT_DISABLE = 6,
1086 BFI_DPORT_SCN_SUBTESTSTART = 7,
1087 BFI_DPORT_SCN_TESTSKIP = 8,
1088 BFI_DPORT_SCN_DDPORT_DISABLED = 9,
1089 };
1090
1091 struct bfi_diag_dport_req_s {
1092 struct bfi_mhdr_s mh; /* 4 bytes */
1093 u8 req; /* request 1: enable 0: disable */
1094 u8 rsvd[3];
1095 u32 lpcnt;
1096 u32 payload;
1097 };
1098
1099 struct bfi_diag_dport_rsp_s {
1100 struct bfi_mhdr_s mh; /* header 4 bytes */
1101 bfa_status_t status; /* reply status */
1102 wwn_t pwwn; /* switch port wwn. 8 bytes */
1103 wwn_t nwwn; /* switch node wwn. 8 bytes */
1104 };
1105
1106 struct bfi_diag_dport_scn_teststart_s {
1107 wwn_t pwwn; /* switch port wwn. 8 bytes */
1108 wwn_t nwwn; /* switch node wwn. 8 bytes */
1109 u8 type; /* bfa_diag_dport_test_type_e */
1110 u8 rsvd[3];
1111 u32 numfrm; /* from switch uint in 1M */
1112 };
1113
1114 struct bfi_diag_dport_scn_testcomp_s {
1115 u8 status; /* bfa_diag_dport_test_status_e */
1116 u8 speed; /* bfa_port_speed_t */
1117 u16 numbuffer; /* from switch */
1118 u8 subtest_status[DPORT_TEST_MAX]; /* 4 bytes */
1119 u32 latency; /* from switch */
1120 u32 distance; /* from swtich unit in meters */
1121 /* Buffers required to saturate the link */
1122 u16 frm_sz; /* from switch for buf_reqd */
1123 u8 rsvd[2];
1124 };
1125
1126 struct bfi_diag_dport_scn_s { /* max size == RDS_RMESZ */
1127 struct bfi_mhdr_s mh; /* header 4 bytes */
1128 u8 state; /* new state */
1129 u8 rsvd[3];
1130 union {
1131 struct bfi_diag_dport_scn_teststart_s teststart;
1132 struct bfi_diag_dport_scn_testcomp_s testcomp;
1133 } info;
1134 };
1135
1136 union bfi_diag_dport_msg_u {
1137 struct bfi_diag_dport_req_s req;
1138 struct bfi_diag_dport_rsp_s rsp;
1139 struct bfi_diag_dport_scn_s scn;
1140 };
1141
1142 /*
1143 * PHY module specific
1144 */
1145 enum bfi_phy_h2i_msgs_e {
1146 BFI_PHY_H2I_QUERY_REQ = 1,
1147 BFI_PHY_H2I_STATS_REQ = 2,
1148 BFI_PHY_H2I_WRITE_REQ = 3,
1149 BFI_PHY_H2I_READ_REQ = 4,
1150 };
1151
1152 enum bfi_phy_i2h_msgs_e {
1153 BFI_PHY_I2H_QUERY_RSP = BFA_I2HM(1),
1154 BFI_PHY_I2H_STATS_RSP = BFA_I2HM(2),
1155 BFI_PHY_I2H_WRITE_RSP = BFA_I2HM(3),
1156 BFI_PHY_I2H_READ_RSP = BFA_I2HM(4),
1157 };
1158
1159 /*
1160 * External PHY query request
1161 */
1162 struct bfi_phy_query_req_s {
1163 struct bfi_mhdr_s mh; /* Common msg header */
1164 u8 instance;
1165 u8 rsv[3];
1166 struct bfi_alen_s alen;
1167 };
1168
1169 /*
1170 * External PHY stats request
1171 */
1172 struct bfi_phy_stats_req_s {
1173 struct bfi_mhdr_s mh; /* Common msg header */
1174 u8 instance;
1175 u8 rsv[3];
1176 struct bfi_alen_s alen;
1177 };
1178
1179 /*
1180 * External PHY write request
1181 */
1182 struct bfi_phy_write_req_s {
1183 struct bfi_mhdr_s mh; /* Common msg header */
1184 u8 instance;
1185 u8 last;
1186 u8 rsv[2];
1187 u32 offset;
1188 u32 length;
1189 struct bfi_alen_s alen;
1190 };
1191
1192 /*
1193 * External PHY read request
1194 */
1195 struct bfi_phy_read_req_s {
1196 struct bfi_mhdr_s mh; /* Common msg header */
1197 u8 instance;
1198 u8 rsv[3];
1199 u32 offset;
1200 u32 length;
1201 struct bfi_alen_s alen;
1202 };
1203
1204 /*
1205 * External PHY query response
1206 */
1207 struct bfi_phy_query_rsp_s {
1208 struct bfi_mhdr_s mh; /* Common msg header */
1209 u32 status;
1210 };
1211
1212 /*
1213 * External PHY stats response
1214 */
1215 struct bfi_phy_stats_rsp_s {
1216 struct bfi_mhdr_s mh; /* Common msg header */
1217 u32 status;
1218 };
1219
1220 /*
1221 * External PHY read response
1222 */
1223 struct bfi_phy_read_rsp_s {
1224 struct bfi_mhdr_s mh; /* Common msg header */
1225 u32 status;
1226 u32 length;
1227 };
1228
1229 /*
1230 * External PHY write response
1231 */
1232 struct bfi_phy_write_rsp_s {
1233 struct bfi_mhdr_s mh; /* Common msg header */
1234 u32 status;
1235 u32 length;
1236 };
1237
1238 enum bfi_fru_h2i_msgs {
1239 BFI_FRUVPD_H2I_WRITE_REQ = 1,
1240 BFI_FRUVPD_H2I_READ_REQ = 2,
1241 BFI_TFRU_H2I_WRITE_REQ = 3,
1242 BFI_TFRU_H2I_READ_REQ = 4,
1243 };
1244
1245 enum bfi_fru_i2h_msgs {
1246 BFI_FRUVPD_I2H_WRITE_RSP = BFA_I2HM(1),
1247 BFI_FRUVPD_I2H_READ_RSP = BFA_I2HM(2),
1248 BFI_TFRU_I2H_WRITE_RSP = BFA_I2HM(3),
1249 BFI_TFRU_I2H_READ_RSP = BFA_I2HM(4),
1250 };
1251
1252 /*
1253 * FRU write request
1254 */
1255 struct bfi_fru_write_req_s {
1256 struct bfi_mhdr_s mh; /* Common msg header */
1257 u8 last;
1258 u8 rsv_1[3];
1259 u8 trfr_cmpl;
1260 u8 rsv_2[3];
1261 u32 offset;
1262 u32 length;
1263 struct bfi_alen_s alen;
1264 };
1265
1266 /*
1267 * FRU read request
1268 */
1269 struct bfi_fru_read_req_s {
1270 struct bfi_mhdr_s mh; /* Common msg header */
1271 u32 offset;
1272 u32 length;
1273 struct bfi_alen_s alen;
1274 };
1275
1276 /*
1277 * FRU response
1278 */
1279 struct bfi_fru_rsp_s {
1280 struct bfi_mhdr_s mh; /* Common msg header */
1281 u32 status;
1282 u32 length;
1283 };
1284 #pragma pack()
1285
1286 #endif /* __BFI_H__ */
Linux with added FPC-III support