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mfd: wm8350-i2c: Make sure the i2c regmap functions are compiled
[linux/fpc-iii.git] / drivers / scsi / mvsas / mv_sas.c
blob783288db47c018bcf38d9e8cf85a4162d9998a38
1 /*
2 * Marvell 88SE64xx/88SE94xx main function
3 *
4 * Copyright 2007 Red Hat, Inc.
5 * Copyright 2008 Marvell. <kewei@marvell.com>
6 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
7 *
8 * This file is licensed under GPLv2.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; version 2 of the
13 * License.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
23 * USA
24 */
25
26 #include "mv_sas.h"
27
28 static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag)
29 {
30 if (task->lldd_task) {
31 struct mvs_slot_info *slot;
32 slot = task->lldd_task;
33 *tag = slot->slot_tag;
34 return 1;
35 }
36 return 0;
37 }
38
39 void mvs_tag_clear(struct mvs_info *mvi, u32 tag)
40 {
41 void *bitmap = mvi->tags;
42 clear_bit(tag, bitmap);
43 }
44
45 void mvs_tag_free(struct mvs_info *mvi, u32 tag)
46 {
47 mvs_tag_clear(mvi, tag);
48 }
49
50 void mvs_tag_set(struct mvs_info *mvi, unsigned int tag)
51 {
52 void *bitmap = mvi->tags;
53 set_bit(tag, bitmap);
54 }
55
56 inline int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out)
57 {
58 unsigned int index, tag;
59 void *bitmap = mvi->tags;
60
61 index = find_first_zero_bit(bitmap, mvi->tags_num);
62 tag = index;
63 if (tag >= mvi->tags_num)
64 return -SAS_QUEUE_FULL;
65 mvs_tag_set(mvi, tag);
66 *tag_out = tag;
67 return 0;
68 }
69
70 void mvs_tag_init(struct mvs_info *mvi)
71 {
72 int i;
73 for (i = 0; i < mvi->tags_num; ++i)
74 mvs_tag_clear(mvi, i);
75 }
76
77 struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev)
78 {
79 unsigned long i = 0, j = 0, hi = 0;
80 struct sas_ha_struct *sha = dev->port->ha;
81 struct mvs_info *mvi = NULL;
82 struct asd_sas_phy *phy;
83
84 while (sha->sas_port[i]) {
85 if (sha->sas_port[i] == dev->port) {
86 phy = container_of(sha->sas_port[i]->phy_list.next,
87 struct asd_sas_phy, port_phy_el);
88 j = 0;
89 while (sha->sas_phy[j]) {
90 if (sha->sas_phy[j] == phy)
91 break;
92 j++;
93 }
94 break;
95 }
96 i++;
97 }
98 hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
99 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
100
101 return mvi;
102
103 }
104
105 int mvs_find_dev_phyno(struct domain_device *dev, int *phyno)
106 {
107 unsigned long i = 0, j = 0, n = 0, num = 0;
108 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
109 struct mvs_info *mvi = mvi_dev->mvi_info;
110 struct sas_ha_struct *sha = dev->port->ha;
111
112 while (sha->sas_port[i]) {
113 if (sha->sas_port[i] == dev->port) {
114 struct asd_sas_phy *phy;
115 list_for_each_entry(phy,
116 &sha->sas_port[i]->phy_list, port_phy_el) {
117 j = 0;
118 while (sha->sas_phy[j]) {
119 if (sha->sas_phy[j] == phy)
120 break;
121 j++;
122 }
123 phyno[n] = (j >= mvi->chip->n_phy) ?
124 (j - mvi->chip->n_phy) : j;
125 num++;
126 n++;
127 }
128 break;
129 }
130 i++;
131 }
132 return num;
133 }
134
135 struct mvs_device *mvs_find_dev_by_reg_set(struct mvs_info *mvi,
136 u8 reg_set)
137 {
138 u32 dev_no;
139 for (dev_no = 0; dev_no < MVS_MAX_DEVICES; dev_no++) {
140 if (mvi->devices[dev_no].taskfileset == MVS_ID_NOT_MAPPED)
141 continue;
142
143 if (mvi->devices[dev_no].taskfileset == reg_set)
144 return &mvi->devices[dev_no];
145 }
146 return NULL;
147 }
148
149 static inline void mvs_free_reg_set(struct mvs_info *mvi,
150 struct mvs_device *dev)
151 {
152 if (!dev) {
153 mv_printk("device has been free.\n");
154 return;
155 }
156 if (dev->taskfileset == MVS_ID_NOT_MAPPED)
157 return;
158 MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset);
159 }
160
161 static inline u8 mvs_assign_reg_set(struct mvs_info *mvi,
162 struct mvs_device *dev)
163 {
164 if (dev->taskfileset != MVS_ID_NOT_MAPPED)
165 return 0;
166 return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset);
167 }
168
169 void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard)
170 {
171 u32 no;
172 for_each_phy(phy_mask, phy_mask, no) {
173 if (!(phy_mask & 1))
174 continue;
175 MVS_CHIP_DISP->phy_reset(mvi, no, hard);
176 }
177 }
178
179 int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
180 void *funcdata)
181 {
182 int rc = 0, phy_id = sas_phy->id;
183 u32 tmp, i = 0, hi;
184 struct sas_ha_struct *sha = sas_phy->ha;
185 struct mvs_info *mvi = NULL;
186
187 while (sha->sas_phy[i]) {
188 if (sha->sas_phy[i] == sas_phy)
189 break;
190 i++;
191 }
192 hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
193 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
194
195 switch (func) {
196 case PHY_FUNC_SET_LINK_RATE:
197 MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata);
198 break;
199
200 case PHY_FUNC_HARD_RESET:
201 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id);
202 if (tmp & PHY_RST_HARD)
203 break;
204 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_HARD_RESET);
205 break;
206
207 case PHY_FUNC_LINK_RESET:
208 MVS_CHIP_DISP->phy_enable(mvi, phy_id);
209 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_SOFT_RESET);
210 break;
211
212 case PHY_FUNC_DISABLE:
213 MVS_CHIP_DISP->phy_disable(mvi, phy_id);
214 break;
215 case PHY_FUNC_RELEASE_SPINUP_HOLD:
216 default:
217 rc = -ENOSYS;
218 }
219 msleep(200);
220 return rc;
221 }
222
223 void mvs_set_sas_addr(struct mvs_info *mvi, int port_id, u32 off_lo,
224 u32 off_hi, u64 sas_addr)
225 {
226 u32 lo = (u32)sas_addr;
227 u32 hi = (u32)(sas_addr>>32);
228
229 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo);
230 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo);
231 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi);
232 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi);
233 }
234
235 static void mvs_bytes_dmaed(struct mvs_info *mvi, int i)
236 {
237 struct mvs_phy *phy = &mvi->phy[i];
238 struct asd_sas_phy *sas_phy = &phy->sas_phy;
239 struct sas_ha_struct *sas_ha;
240 if (!phy->phy_attached)
241 return;
242
243 if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK)
244 && phy->phy_type & PORT_TYPE_SAS) {
245 return;
246 }
247
248 sas_ha = mvi->sas;
249 sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE);
250
251 if (sas_phy->phy) {
252 struct sas_phy *sphy = sas_phy->phy;
253
254 sphy->negotiated_linkrate = sas_phy->linkrate;
255 sphy->minimum_linkrate = phy->minimum_linkrate;
256 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
257 sphy->maximum_linkrate = phy->maximum_linkrate;
258 sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate();
259 }
260
261 if (phy->phy_type & PORT_TYPE_SAS) {
262 struct sas_identify_frame *id;
263
264 id = (struct sas_identify_frame *)phy->frame_rcvd;
265 id->dev_type = phy->identify.device_type;
266 id->initiator_bits = SAS_PROTOCOL_ALL;
267 id->target_bits = phy->identify.target_port_protocols;
268
269 /* direct attached SAS device */
270 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {
271 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);
272 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x00);
273 }
274 } else if (phy->phy_type & PORT_TYPE_SATA) {
275 /*Nothing*/
276 }
277 mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy);
278
279 sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
280
281 mvi->sas->notify_port_event(sas_phy,
282 PORTE_BYTES_DMAED);
283 }
284
285 void mvs_scan_start(struct Scsi_Host *shost)
286 {
287 int i, j;
288 unsigned short core_nr;
289 struct mvs_info *mvi;
290 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
291 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
292
293 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host;
294
295 for (j = 0; j < core_nr; j++) {
296 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j];
297 for (i = 0; i < mvi->chip->n_phy; ++i)
298 mvs_bytes_dmaed(mvi, i);
299 }
300 mvs_prv->scan_finished = 1;
301 }
302
303 int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time)
304 {
305 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
306 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
307
308 if (mvs_prv->scan_finished == 0)
309 return 0;
310
311 sas_drain_work(sha);
312 return 1;
313 }
314
315 static int mvs_task_prep_smp(struct mvs_info *mvi,
316 struct mvs_task_exec_info *tei)
317 {
318 int elem, rc, i;
319 struct sas_ha_struct *sha = mvi->sas;
320 struct sas_task *task = tei->task;
321 struct mvs_cmd_hdr *hdr = tei->hdr;
322 struct domain_device *dev = task->dev;
323 struct asd_sas_port *sas_port = dev->port;
324 struct sas_phy *sphy = dev->phy;
325 struct asd_sas_phy *sas_phy = sha->sas_phy[sphy->number];
326 struct scatterlist *sg_req, *sg_resp;
327 u32 req_len, resp_len, tag = tei->tag;
328 void *buf_tmp;
329 u8 *buf_oaf;
330 dma_addr_t buf_tmp_dma;
331 void *buf_prd;
332 struct mvs_slot_info *slot = &mvi->slot_info[tag];
333 u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
334
335 /*
336 * DMA-map SMP request, response buffers
337 */
338 sg_req = &task->smp_task.smp_req;
339 elem = dma_map_sg(mvi->dev, sg_req, 1, PCI_DMA_TODEVICE);
340 if (!elem)
341 return -ENOMEM;
342 req_len = sg_dma_len(sg_req);
343
344 sg_resp = &task->smp_task.smp_resp;
345 elem = dma_map_sg(mvi->dev, sg_resp, 1, PCI_DMA_FROMDEVICE);
346 if (!elem) {
347 rc = -ENOMEM;
348 goto err_out;
349 }
350 resp_len = SB_RFB_MAX;
351
352 /* must be in dwords */
353 if ((req_len & 0x3) || (resp_len & 0x3)) {
354 rc = -EINVAL;
355 goto err_out_2;
356 }
357
358 /*
359 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
360 */
361
362 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */
363 buf_tmp = slot->buf;
364 buf_tmp_dma = slot->buf_dma;
365
366 hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req));
367
368 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
369 buf_oaf = buf_tmp;
370 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
371
372 buf_tmp += MVS_OAF_SZ;
373 buf_tmp_dma += MVS_OAF_SZ;
374
375 /* region 3: PRD table *********************************** */
376 buf_prd = buf_tmp;
377 if (tei->n_elem)
378 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
379 else
380 hdr->prd_tbl = 0;
381
382 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
383 buf_tmp += i;
384 buf_tmp_dma += i;
385
386 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
387 slot->response = buf_tmp;
388 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
389 if (mvi->flags & MVF_FLAG_SOC)
390 hdr->reserved[0] = 0;
391
392 /*
393 * Fill in TX ring and command slot header
394 */
395 slot->tx = mvi->tx_prod;
396 mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) |
397 TXQ_MODE_I | tag |
398 (MVS_PHY_ID << TXQ_PHY_SHIFT));
399
400 hdr->flags |= flags;
401 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4));
402 hdr->tags = cpu_to_le32(tag);
403 hdr->data_len = 0;
404
405 /* generate open address frame hdr (first 12 bytes) */
406 /* initiator, SMP, ftype 1h */
407 buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01;
408 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
409 *(u16 *)(buf_oaf + 2) = 0xFFFF; /* SAS SPEC */
410 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
411
412 /* fill in PRD (scatter/gather) table, if any */
413 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
414
415 return 0;
416
417 err_out_2:
418 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1,
419 PCI_DMA_FROMDEVICE);
420 err_out:
421 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1,
422 PCI_DMA_TODEVICE);
423 return rc;
424 }
425
426 static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag)
427 {
428 struct ata_queued_cmd *qc = task->uldd_task;
429
430 if (qc) {
431 if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
432 qc->tf.command == ATA_CMD_FPDMA_READ) {
433 *tag = qc->tag;
434 return 1;
435 }
436 }
437
438 return 0;
439 }
440
441 static int mvs_task_prep_ata(struct mvs_info *mvi,
442 struct mvs_task_exec_info *tei)
443 {
444 struct sas_task *task = tei->task;
445 struct domain_device *dev = task->dev;
446 struct mvs_device *mvi_dev = dev->lldd_dev;
447 struct mvs_cmd_hdr *hdr = tei->hdr;
448 struct asd_sas_port *sas_port = dev->port;
449 struct mvs_slot_info *slot;
450 void *buf_prd;
451 u32 tag = tei->tag, hdr_tag;
452 u32 flags, del_q;
453 void *buf_tmp;
454 u8 *buf_cmd, *buf_oaf;
455 dma_addr_t buf_tmp_dma;
456 u32 i, req_len, resp_len;
457 const u32 max_resp_len = SB_RFB_MAX;
458
459 if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) {
460 mv_dprintk("Have not enough regiset for dev %d.\n",
461 mvi_dev->device_id);
462 return -EBUSY;
463 }
464 slot = &mvi->slot_info[tag];
465 slot->tx = mvi->tx_prod;
466 del_q = TXQ_MODE_I | tag |
467 (TXQ_CMD_STP << TXQ_CMD_SHIFT) |
468 ((sas_port->phy_mask & TXQ_PHY_MASK) << TXQ_PHY_SHIFT) |
469 (mvi_dev->taskfileset << TXQ_SRS_SHIFT);
470 mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q);
471
472 if (task->data_dir == DMA_FROM_DEVICE)
473 flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT);
474 else
475 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
476
477 if (task->ata_task.use_ncq)
478 flags |= MCH_FPDMA;
479 if (dev->sata_dev.command_set == ATAPI_COMMAND_SET) {
480 if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI)
481 flags |= MCH_ATAPI;
482 }
483
484 hdr->flags = cpu_to_le32(flags);
485
486 if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag))
487 task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3);
488 else
489 hdr_tag = tag;
490
491 hdr->tags = cpu_to_le32(hdr_tag);
492
493 hdr->data_len = cpu_to_le32(task->total_xfer_len);
494
495 /*
496 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
497 */
498
499 /* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */
500 buf_cmd = buf_tmp = slot->buf;
501 buf_tmp_dma = slot->buf_dma;
502
503 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
504
505 buf_tmp += MVS_ATA_CMD_SZ;
506 buf_tmp_dma += MVS_ATA_CMD_SZ;
507
508 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
509 /* used for STP. unused for SATA? */
510 buf_oaf = buf_tmp;
511 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
512
513 buf_tmp += MVS_OAF_SZ;
514 buf_tmp_dma += MVS_OAF_SZ;
515
516 /* region 3: PRD table ********************************************* */
517 buf_prd = buf_tmp;
518
519 if (tei->n_elem)
520 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
521 else
522 hdr->prd_tbl = 0;
523 i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count();
524
525 buf_tmp += i;
526 buf_tmp_dma += i;
527
528 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
529 slot->response = buf_tmp;
530 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
531 if (mvi->flags & MVF_FLAG_SOC)
532 hdr->reserved[0] = 0;
533
534 req_len = sizeof(struct host_to_dev_fis);
535 resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ -
536 sizeof(struct mvs_err_info) - i;
537
538 /* request, response lengths */
539 resp_len = min(resp_len, max_resp_len);
540 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
541
542 if (likely(!task->ata_task.device_control_reg_update))
543 task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */
544 /* fill in command FIS and ATAPI CDB */
545 memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis));
546 if (dev->sata_dev.command_set == ATAPI_COMMAND_SET)
547 memcpy(buf_cmd + STP_ATAPI_CMD,
548 task->ata_task.atapi_packet, 16);
549
550 /* generate open address frame hdr (first 12 bytes) */
551 /* initiator, STP, ftype 1h */
552 buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1;
553 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
554 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
555 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
556
557 /* fill in PRD (scatter/gather) table, if any */
558 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
559
560 if (task->data_dir == DMA_FROM_DEVICE)
561 MVS_CHIP_DISP->dma_fix(mvi, sas_port->phy_mask,
562 TRASH_BUCKET_SIZE, tei->n_elem, buf_prd);
563
564 return 0;
565 }
566
567 static int mvs_task_prep_ssp(struct mvs_info *mvi,
568 struct mvs_task_exec_info *tei, int is_tmf,
569 struct mvs_tmf_task *tmf)
570 {
571 struct sas_task *task = tei->task;
572 struct mvs_cmd_hdr *hdr = tei->hdr;
573 struct mvs_port *port = tei->port;
574 struct domain_device *dev = task->dev;
575 struct mvs_device *mvi_dev = dev->lldd_dev;
576 struct asd_sas_port *sas_port = dev->port;
577 struct mvs_slot_info *slot;
578 void *buf_prd;
579 struct ssp_frame_hdr *ssp_hdr;
580 void *buf_tmp;
581 u8 *buf_cmd, *buf_oaf, fburst = 0;
582 dma_addr_t buf_tmp_dma;
583 u32 flags;
584 u32 resp_len, req_len, i, tag = tei->tag;
585 const u32 max_resp_len = SB_RFB_MAX;
586 u32 phy_mask;
587
588 slot = &mvi->slot_info[tag];
589
590 phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap :
591 sas_port->phy_mask) & TXQ_PHY_MASK;
592
593 slot->tx = mvi->tx_prod;
594 mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag |
595 (TXQ_CMD_SSP << TXQ_CMD_SHIFT) |
596 (phy_mask << TXQ_PHY_SHIFT));
597
598 flags = MCH_RETRY;
599 if (task->ssp_task.enable_first_burst) {
600 flags |= MCH_FBURST;
601 fburst = (1 << 7);
602 }
603 if (is_tmf)
604 flags |= (MCH_SSP_FR_TASK << MCH_SSP_FR_TYPE_SHIFT);
605 else
606 flags |= (MCH_SSP_FR_CMD << MCH_SSP_FR_TYPE_SHIFT);
607
608 hdr->flags = cpu_to_le32(flags | (tei->n_elem << MCH_PRD_LEN_SHIFT));
609 hdr->tags = cpu_to_le32(tag);
610 hdr->data_len = cpu_to_le32(task->total_xfer_len);
611
612 /*
613 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
614 */
615
616 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */
617 buf_cmd = buf_tmp = slot->buf;
618 buf_tmp_dma = slot->buf_dma;
619
620 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
621
622 buf_tmp += MVS_SSP_CMD_SZ;
623 buf_tmp_dma += MVS_SSP_CMD_SZ;
624
625 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
626 buf_oaf = buf_tmp;
627 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
628
629 buf_tmp += MVS_OAF_SZ;
630 buf_tmp_dma += MVS_OAF_SZ;
631
632 /* region 3: PRD table ********************************************* */
633 buf_prd = buf_tmp;
634 if (tei->n_elem)
635 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
636 else
637 hdr->prd_tbl = 0;
638
639 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
640 buf_tmp += i;
641 buf_tmp_dma += i;
642
643 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
644 slot->response = buf_tmp;
645 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
646 if (mvi->flags & MVF_FLAG_SOC)
647 hdr->reserved[0] = 0;
648
649 resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ -
650 sizeof(struct mvs_err_info) - i;
651 resp_len = min(resp_len, max_resp_len);
652
653 req_len = sizeof(struct ssp_frame_hdr) + 28;
654
655 /* request, response lengths */
656 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
657
658 /* generate open address frame hdr (first 12 bytes) */
659 /* initiator, SSP, ftype 1h */
660 buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1;
661 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
662 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
663 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
664
665 /* fill in SSP frame header (Command Table.SSP frame header) */
666 ssp_hdr = (struct ssp_frame_hdr *)buf_cmd;
667
668 if (is_tmf)
669 ssp_hdr->frame_type = SSP_TASK;
670 else
671 ssp_hdr->frame_type = SSP_COMMAND;
672
673 memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr,
674 HASHED_SAS_ADDR_SIZE);
675 memcpy(ssp_hdr->hashed_src_addr,
676 dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE);
677 ssp_hdr->tag = cpu_to_be16(tag);
678
679 /* fill in IU for TASK and Command Frame */
680 buf_cmd += sizeof(*ssp_hdr);
681 memcpy(buf_cmd, &task->ssp_task.LUN, 8);
682
683 if (ssp_hdr->frame_type != SSP_TASK) {
684 buf_cmd[9] = fburst | task->ssp_task.task_attr |
685 (task->ssp_task.task_prio << 3);
686 memcpy(buf_cmd + 12, task->ssp_task.cmd->cmnd,
687 task->ssp_task.cmd->cmd_len);
688 } else{
689 buf_cmd[10] = tmf->tmf;
690 switch (tmf->tmf) {
691 case TMF_ABORT_TASK:
692 case TMF_QUERY_TASK:
693 buf_cmd[12] =
694 (tmf->tag_of_task_to_be_managed >> 8) & 0xff;
695 buf_cmd[13] =
696 tmf->tag_of_task_to_be_managed & 0xff;
697 break;
698 default:
699 break;
700 }
701 }
702 /* fill in PRD (scatter/gather) table, if any */
703 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
704 return 0;
705 }
706
707 #define DEV_IS_GONE(mvi_dev) ((!mvi_dev || (mvi_dev->dev_type == SAS_PHY_UNUSED)))
708 static int mvs_task_prep(struct sas_task *task, struct mvs_info *mvi, int is_tmf,
709 struct mvs_tmf_task *tmf, int *pass)
710 {
711 struct domain_device *dev = task->dev;
712 struct mvs_device *mvi_dev = dev->lldd_dev;
713 struct mvs_task_exec_info tei;
714 struct mvs_slot_info *slot;
715 u32 tag = 0xdeadbeef, n_elem = 0;
716 int rc = 0;
717
718 if (!dev->port) {
719 struct task_status_struct *tsm = &task->task_status;
720
721 tsm->resp = SAS_TASK_UNDELIVERED;
722 tsm->stat = SAS_PHY_DOWN;
723 /*
724 * libsas will use dev->port, should
725 * not call task_done for sata
726 */
727 if (dev->dev_type != SAS_SATA_DEV)
728 task->task_done(task);
729 return rc;
730 }
731
732 if (DEV_IS_GONE(mvi_dev)) {
733 if (mvi_dev)
734 mv_dprintk("device %d not ready.\n",
735 mvi_dev->device_id);
736 else
737 mv_dprintk("device %016llx not ready.\n",
738 SAS_ADDR(dev->sas_addr));
739
740 rc = SAS_PHY_DOWN;
741 return rc;
742 }
743 tei.port = dev->port->lldd_port;
744 if (tei.port && !tei.port->port_attached && !tmf) {
745 if (sas_protocol_ata(task->task_proto)) {
746 struct task_status_struct *ts = &task->task_status;
747 mv_dprintk("SATA/STP port %d does not attach"
748 "device.\n", dev->port->id);
749 ts->resp = SAS_TASK_COMPLETE;
750 ts->stat = SAS_PHY_DOWN;
751
752 task->task_done(task);
753
754 } else {
755 struct task_status_struct *ts = &task->task_status;
756 mv_dprintk("SAS port %d does not attach"
757 "device.\n", dev->port->id);
758 ts->resp = SAS_TASK_UNDELIVERED;
759 ts->stat = SAS_PHY_DOWN;
760 task->task_done(task);
761 }
762 return rc;
763 }
764
765 if (!sas_protocol_ata(task->task_proto)) {
766 if (task->num_scatter) {
767 n_elem = dma_map_sg(mvi->dev,
768 task->scatter,
769 task->num_scatter,
770 task->data_dir);
771 if (!n_elem) {
772 rc = -ENOMEM;
773 goto prep_out;
774 }
775 }
776 } else {
777 n_elem = task->num_scatter;
778 }
779
780 rc = mvs_tag_alloc(mvi, &tag);
781 if (rc)
782 goto err_out;
783
784 slot = &mvi->slot_info[tag];
785
786 task->lldd_task = NULL;
787 slot->n_elem = n_elem;
788 slot->slot_tag = tag;
789
790 slot->buf = pci_pool_alloc(mvi->dma_pool, GFP_ATOMIC, &slot->buf_dma);
791 if (!slot->buf)
792 goto err_out_tag;
793 memset(slot->buf, 0, MVS_SLOT_BUF_SZ);
794
795 tei.task = task;
796 tei.hdr = &mvi->slot[tag];
797 tei.tag = tag;
798 tei.n_elem = n_elem;
799 switch (task->task_proto) {
800 case SAS_PROTOCOL_SMP:
801 rc = mvs_task_prep_smp(mvi, &tei);
802 break;
803 case SAS_PROTOCOL_SSP:
804 rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf);
805 break;
806 case SAS_PROTOCOL_SATA:
807 case SAS_PROTOCOL_STP:
808 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
809 rc = mvs_task_prep_ata(mvi, &tei);
810 break;
811 default:
812 dev_printk(KERN_ERR, mvi->dev,
813 "unknown sas_task proto: 0x%x\n",
814 task->task_proto);
815 rc = -EINVAL;
816 break;
817 }
818
819 if (rc) {
820 mv_dprintk("rc is %x\n", rc);
821 goto err_out_slot_buf;
822 }
823 slot->task = task;
824 slot->port = tei.port;
825 task->lldd_task = slot;
826 list_add_tail(&slot->entry, &tei.port->list);
827 spin_lock(&task->task_state_lock);
828 task->task_state_flags |= SAS_TASK_AT_INITIATOR;
829 spin_unlock(&task->task_state_lock);
830
831 mvi_dev->running_req++;
832 ++(*pass);
833 mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1);
834
835 return rc;
836
837 err_out_slot_buf:
838 pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
839 err_out_tag:
840 mvs_tag_free(mvi, tag);
841 err_out:
842
843 dev_printk(KERN_ERR, mvi->dev, "mvsas prep failed[%d]!\n", rc);
844 if (!sas_protocol_ata(task->task_proto))
845 if (n_elem)
846 dma_unmap_sg(mvi->dev, task->scatter, n_elem,
847 task->data_dir);
848 prep_out:
849 return rc;
850 }
851
852 static struct mvs_task_list *mvs_task_alloc_list(int *num, gfp_t gfp_flags)
853 {
854 struct mvs_task_list *first = NULL;
855
856 for (; *num > 0; --*num) {
857 struct mvs_task_list *mvs_list = kmem_cache_zalloc(mvs_task_list_cache, gfp_flags);
858
859 if (!mvs_list)
860 break;
861
862 INIT_LIST_HEAD(&mvs_list->list);
863 if (!first)
864 first = mvs_list;
865 else
866 list_add_tail(&mvs_list->list, &first->list);
867
868 }
869
870 return first;
871 }
872
873 static inline void mvs_task_free_list(struct mvs_task_list *mvs_list)
874 {
875 LIST_HEAD(list);
876 struct list_head *pos, *a;
877 struct mvs_task_list *mlist = NULL;
878
879 __list_add(&list, mvs_list->list.prev, &mvs_list->list);
880
881 list_for_each_safe(pos, a, &list) {
882 list_del_init(pos);
883 mlist = list_entry(pos, struct mvs_task_list, list);
884 kmem_cache_free(mvs_task_list_cache, mlist);
885 }
886 }
887
888 static int mvs_task_exec(struct sas_task *task, const int num, gfp_t gfp_flags,
889 struct completion *completion, int is_tmf,
890 struct mvs_tmf_task *tmf)
891 {
892 struct mvs_info *mvi = NULL;
893 u32 rc = 0;
894 u32 pass = 0;
895 unsigned long flags = 0;
896
897 mvi = ((struct mvs_device *)task->dev->lldd_dev)->mvi_info;
898
899 spin_lock_irqsave(&mvi->lock, flags);
900 rc = mvs_task_prep(task, mvi, is_tmf, tmf, &pass);
901 if (rc)
902 dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc);
903
904 if (likely(pass))
905 MVS_CHIP_DISP->start_delivery(mvi, (mvi->tx_prod - 1) &
906 (MVS_CHIP_SLOT_SZ - 1));
907 spin_unlock_irqrestore(&mvi->lock, flags);
908
909 return rc;
910 }
911
912 static int mvs_collector_task_exec(struct sas_task *task, const int num, gfp_t gfp_flags,
913 struct completion *completion, int is_tmf,
914 struct mvs_tmf_task *tmf)
915 {
916 struct domain_device *dev = task->dev;
917 struct mvs_prv_info *mpi = dev->port->ha->lldd_ha;
918 struct mvs_info *mvi = NULL;
919 struct sas_task *t = task;
920 struct mvs_task_list *mvs_list = NULL, *a;
921 LIST_HEAD(q);
922 int pass[2] = {0};
923 u32 rc = 0;
924 u32 n = num;
925 unsigned long flags = 0;
926
927 mvs_list = mvs_task_alloc_list(&n, gfp_flags);
928 if (n) {
929 printk(KERN_ERR "%s: mvs alloc list failed.\n", __func__);
930 rc = -ENOMEM;
931 goto free_list;
932 }
933
934 __list_add(&q, mvs_list->list.prev, &mvs_list->list);
935
936 list_for_each_entry(a, &q, list) {
937 a->task = t;
938 t = list_entry(t->list.next, struct sas_task, list);
939 }
940
941 list_for_each_entry(a, &q , list) {
942
943 t = a->task;
944 mvi = ((struct mvs_device *)t->dev->lldd_dev)->mvi_info;
945
946 spin_lock_irqsave(&mvi->lock, flags);
947 rc = mvs_task_prep(t, mvi, is_tmf, tmf, &pass[mvi->id]);
948 if (rc)
949 dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc);
950 spin_unlock_irqrestore(&mvi->lock, flags);
951 }
952
953 if (likely(pass[0]))
954 MVS_CHIP_DISP->start_delivery(mpi->mvi[0],
955 (mpi->mvi[0]->tx_prod - 1) & (MVS_CHIP_SLOT_SZ - 1));
956
957 if (likely(pass[1]))
958 MVS_CHIP_DISP->start_delivery(mpi->mvi[1],
959 (mpi->mvi[1]->tx_prod - 1) & (MVS_CHIP_SLOT_SZ - 1));
960
961 list_del_init(&q);
962
963 free_list:
964 if (mvs_list)
965 mvs_task_free_list(mvs_list);
966
967 return rc;
968 }
969
970 int mvs_queue_command(struct sas_task *task, const int num,
971 gfp_t gfp_flags)
972 {
973 struct mvs_device *mvi_dev = task->dev->lldd_dev;
974 struct sas_ha_struct *sas = mvi_dev->mvi_info->sas;
975
976 if (sas->lldd_max_execute_num < 2)
977 return mvs_task_exec(task, num, gfp_flags, NULL, 0, NULL);
978 else
979 return mvs_collector_task_exec(task, num, gfp_flags, NULL, 0, NULL);
980 }
981
982 static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc)
983 {
984 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
985 mvs_tag_clear(mvi, slot_idx);
986 }
987
988 static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task,
989 struct mvs_slot_info *slot, u32 slot_idx)
990 {
991 if (!slot)
992 return;
993 if (!slot->task)
994 return;
995 if (!sas_protocol_ata(task->task_proto))
996 if (slot->n_elem)
997 dma_unmap_sg(mvi->dev, task->scatter,
998 slot->n_elem, task->data_dir);
999
1000 switch (task->task_proto) {
1001 case SAS_PROTOCOL_SMP:
1002 dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1,
1003 PCI_DMA_FROMDEVICE);
1004 dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1,
1005 PCI_DMA_TODEVICE);
1006 break;
1007
1008 case SAS_PROTOCOL_SATA:
1009 case SAS_PROTOCOL_STP:
1010 case SAS_PROTOCOL_SSP:
1011 default:
1012 /* do nothing */
1013 break;
1014 }
1015
1016 if (slot->buf) {
1017 pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
1018 slot->buf = NULL;
1019 }
1020 list_del_init(&slot->entry);
1021 task->lldd_task = NULL;
1022 slot->task = NULL;
1023 slot->port = NULL;
1024 slot->slot_tag = 0xFFFFFFFF;
1025 mvs_slot_free(mvi, slot_idx);
1026 }
1027
1028 static void mvs_update_wideport(struct mvs_info *mvi, int phy_no)
1029 {
1030 struct mvs_phy *phy = &mvi->phy[phy_no];
1031 struct mvs_port *port = phy->port;
1032 int j, no;
1033
1034 for_each_phy(port->wide_port_phymap, j, no) {
1035 if (j & 1) {
1036 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
1037 PHYR_WIDE_PORT);
1038 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
1039 port->wide_port_phymap);
1040 } else {
1041 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
1042 PHYR_WIDE_PORT);
1043 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
1044 0);
1045 }
1046 }
1047 }
1048
1049 static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i)
1050 {
1051 u32 tmp;
1052 struct mvs_phy *phy = &mvi->phy[i];
1053 struct mvs_port *port = phy->port;
1054
1055 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i);
1056 if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) {
1057 if (!port)
1058 phy->phy_attached = 1;
1059 return tmp;
1060 }
1061
1062 if (port) {
1063 if (phy->phy_type & PORT_TYPE_SAS) {
1064 port->wide_port_phymap &= ~(1U << i);
1065 if (!port->wide_port_phymap)
1066 port->port_attached = 0;
1067 mvs_update_wideport(mvi, i);
1068 } else if (phy->phy_type & PORT_TYPE_SATA)
1069 port->port_attached = 0;
1070 phy->port = NULL;
1071 phy->phy_attached = 0;
1072 phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA);
1073 }
1074 return 0;
1075 }
1076
1077 static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf)
1078 {
1079 u32 *s = (u32 *) buf;
1080
1081 if (!s)
1082 return NULL;
1083
1084 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3);
1085 s[3] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
1086
1087 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2);
1088 s[2] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
1089
1090 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1);
1091 s[1] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
1092
1093 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0);
1094 s[0] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
1095
1096 if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01))
1097 s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10);
1098
1099 return s;
1100 }
1101
1102 static u32 mvs_is_sig_fis_received(u32 irq_status)
1103 {
1104 return irq_status & PHYEV_SIG_FIS;
1105 }
1106
1107 static void mvs_sig_remove_timer(struct mvs_phy *phy)
1108 {
1109 if (phy->timer.function)
1110 del_timer(&phy->timer);
1111 phy->timer.function = NULL;
1112 }
1113
1114 void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st)
1115 {
1116 struct mvs_phy *phy = &mvi->phy[i];
1117 struct sas_identify_frame *id;
1118
1119 id = (struct sas_identify_frame *)phy->frame_rcvd;
1120
1121 if (get_st) {
1122 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i);
1123 phy->phy_status = mvs_is_phy_ready(mvi, i);
1124 }
1125
1126 if (phy->phy_status) {
1127 int oob_done = 0;
1128 struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy;
1129
1130 oob_done = MVS_CHIP_DISP->oob_done(mvi, i);
1131
1132 MVS_CHIP_DISP->fix_phy_info(mvi, i, id);
1133 if (phy->phy_type & PORT_TYPE_SATA) {
1134 phy->identify.target_port_protocols = SAS_PROTOCOL_STP;
1135 if (mvs_is_sig_fis_received(phy->irq_status)) {
1136 mvs_sig_remove_timer(phy);
1137 phy->phy_attached = 1;
1138 phy->att_dev_sas_addr =
1139 i + mvi->id * mvi->chip->n_phy;
1140 if (oob_done)
1141 sas_phy->oob_mode = SATA_OOB_MODE;
1142 phy->frame_rcvd_size =
1143 sizeof(struct dev_to_host_fis);
1144 mvs_get_d2h_reg(mvi, i, id);
1145 } else {
1146 u32 tmp;
1147 dev_printk(KERN_DEBUG, mvi->dev,
1148 "Phy%d : No sig fis\n", i);
1149 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i);
1150 MVS_CHIP_DISP->write_port_irq_mask(mvi, i,
1151 tmp | PHYEV_SIG_FIS);
1152 phy->phy_attached = 0;
1153 phy->phy_type &= ~PORT_TYPE_SATA;
1154 goto out_done;
1155 }
1156 } else if (phy->phy_type & PORT_TYPE_SAS
1157 || phy->att_dev_info & PORT_SSP_INIT_MASK) {
1158 phy->phy_attached = 1;
1159 phy->identify.device_type =
1160 phy->att_dev_info & PORT_DEV_TYPE_MASK;
1161
1162 if (phy->identify.device_type == SAS_END_DEVICE)
1163 phy->identify.target_port_protocols =
1164 SAS_PROTOCOL_SSP;
1165 else if (phy->identify.device_type != SAS_PHY_UNUSED)
1166 phy->identify.target_port_protocols =
1167 SAS_PROTOCOL_SMP;
1168 if (oob_done)
1169 sas_phy->oob_mode = SAS_OOB_MODE;
1170 phy->frame_rcvd_size =
1171 sizeof(struct sas_identify_frame);
1172 }
1173 memcpy(sas_phy->attached_sas_addr,
1174 &phy->att_dev_sas_addr, SAS_ADDR_SIZE);
1175
1176 if (MVS_CHIP_DISP->phy_work_around)
1177 MVS_CHIP_DISP->phy_work_around(mvi, i);
1178 }
1179 mv_dprintk("phy %d attach dev info is %x\n",
1180 i + mvi->id * mvi->chip->n_phy, phy->att_dev_info);
1181 mv_dprintk("phy %d attach sas addr is %llx\n",
1182 i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr);
1183 out_done:
1184 if (get_st)
1185 MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status);
1186 }
1187
1188 static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock)
1189 {
1190 struct sas_ha_struct *sas_ha = sas_phy->ha;
1191 struct mvs_info *mvi = NULL; int i = 0, hi;
1192 struct mvs_phy *phy = sas_phy->lldd_phy;
1193 struct asd_sas_port *sas_port = sas_phy->port;
1194 struct mvs_port *port;
1195 unsigned long flags = 0;
1196 if (!sas_port)
1197 return;
1198
1199 while (sas_ha->sas_phy[i]) {
1200 if (sas_ha->sas_phy[i] == sas_phy)
1201 break;
1202 i++;
1203 }
1204 hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy;
1205 mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi];
1206 if (i >= mvi->chip->n_phy)
1207 port = &mvi->port[i - mvi->chip->n_phy];
1208 else
1209 port = &mvi->port[i];
1210 if (lock)
1211 spin_lock_irqsave(&mvi->lock, flags);
1212 port->port_attached = 1;
1213 phy->port = port;
1214 sas_port->lldd_port = port;
1215 if (phy->phy_type & PORT_TYPE_SAS) {
1216 port->wide_port_phymap = sas_port->phy_mask;
1217 mv_printk("set wide port phy map %x\n", sas_port->phy_mask);
1218 mvs_update_wideport(mvi, sas_phy->id);
1219
1220 /* direct attached SAS device */
1221 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {
1222 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);
1223 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x04);
1224 }
1225 }
1226 if (lock)
1227 spin_unlock_irqrestore(&mvi->lock, flags);
1228 }
1229
1230 static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock)
1231 {
1232 struct domain_device *dev;
1233 struct mvs_phy *phy = sas_phy->lldd_phy;
1234 struct mvs_info *mvi = phy->mvi;
1235 struct asd_sas_port *port = sas_phy->port;
1236 int phy_no = 0;
1237
1238 while (phy != &mvi->phy[phy_no]) {
1239 phy_no++;
1240 if (phy_no >= MVS_MAX_PHYS)
1241 return;
1242 }
1243 list_for_each_entry(dev, &port->dev_list, dev_list_node)
1244 mvs_do_release_task(phy->mvi, phy_no, dev);
1245
1246 }
1247
1248
1249 void mvs_port_formed(struct asd_sas_phy *sas_phy)
1250 {
1251 mvs_port_notify_formed(sas_phy, 1);
1252 }
1253
1254 void mvs_port_deformed(struct asd_sas_phy *sas_phy)
1255 {
1256 mvs_port_notify_deformed(sas_phy, 1);
1257 }
1258
1259 struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi)
1260 {
1261 u32 dev;
1262 for (dev = 0; dev < MVS_MAX_DEVICES; dev++) {
1263 if (mvi->devices[dev].dev_type == SAS_PHY_UNUSED) {
1264 mvi->devices[dev].device_id = dev;
1265 return &mvi->devices[dev];
1266 }
1267 }
1268
1269 if (dev == MVS_MAX_DEVICES)
1270 mv_printk("max support %d devices, ignore ..\n",
1271 MVS_MAX_DEVICES);
1272
1273 return NULL;
1274 }
1275
1276 void mvs_free_dev(struct mvs_device *mvi_dev)
1277 {
1278 u32 id = mvi_dev->device_id;
1279 memset(mvi_dev, 0, sizeof(*mvi_dev));
1280 mvi_dev->device_id = id;
1281 mvi_dev->dev_type = SAS_PHY_UNUSED;
1282 mvi_dev->dev_status = MVS_DEV_NORMAL;
1283 mvi_dev->taskfileset = MVS_ID_NOT_MAPPED;
1284 }
1285
1286 int mvs_dev_found_notify(struct domain_device *dev, int lock)
1287 {
1288 unsigned long flags = 0;
1289 int res = 0;
1290 struct mvs_info *mvi = NULL;
1291 struct domain_device *parent_dev = dev->parent;
1292 struct mvs_device *mvi_device;
1293
1294 mvi = mvs_find_dev_mvi(dev);
1295
1296 if (lock)
1297 spin_lock_irqsave(&mvi->lock, flags);
1298
1299 mvi_device = mvs_alloc_dev(mvi);
1300 if (!mvi_device) {
1301 res = -1;
1302 goto found_out;
1303 }
1304 dev->lldd_dev = mvi_device;
1305 mvi_device->dev_status = MVS_DEV_NORMAL;
1306 mvi_device->dev_type = dev->dev_type;
1307 mvi_device->mvi_info = mvi;
1308 mvi_device->sas_device = dev;
1309 if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type)) {
1310 int phy_id;
1311 u8 phy_num = parent_dev->ex_dev.num_phys;
1312 struct ex_phy *phy;
1313 for (phy_id = 0; phy_id < phy_num; phy_id++) {
1314 phy = &parent_dev->ex_dev.ex_phy[phy_id];
1315 if (SAS_ADDR(phy->attached_sas_addr) ==
1316 SAS_ADDR(dev->sas_addr)) {
1317 mvi_device->attached_phy = phy_id;
1318 break;
1319 }
1320 }
1321
1322 if (phy_id == phy_num) {
1323 mv_printk("Error: no attached dev:%016llx"
1324 "at ex:%016llx.\n",
1325 SAS_ADDR(dev->sas_addr),
1326 SAS_ADDR(parent_dev->sas_addr));
1327 res = -1;
1328 }
1329 }
1330
1331 found_out:
1332 if (lock)
1333 spin_unlock_irqrestore(&mvi->lock, flags);
1334 return res;
1335 }
1336
1337 int mvs_dev_found(struct domain_device *dev)
1338 {
1339 return mvs_dev_found_notify(dev, 1);
1340 }
1341
1342 void mvs_dev_gone_notify(struct domain_device *dev)
1343 {
1344 unsigned long flags = 0;
1345 struct mvs_device *mvi_dev = dev->lldd_dev;
1346 struct mvs_info *mvi = mvi_dev->mvi_info;
1347
1348 spin_lock_irqsave(&mvi->lock, flags);
1349
1350 if (mvi_dev) {
1351 mv_dprintk("found dev[%d:%x] is gone.\n",
1352 mvi_dev->device_id, mvi_dev->dev_type);
1353 mvs_release_task(mvi, dev);
1354 mvs_free_reg_set(mvi, mvi_dev);
1355 mvs_free_dev(mvi_dev);
1356 } else {
1357 mv_dprintk("found dev has gone.\n");
1358 }
1359 dev->lldd_dev = NULL;
1360 mvi_dev->sas_device = NULL;
1361
1362 spin_unlock_irqrestore(&mvi->lock, flags);
1363 }
1364
1365
1366 void mvs_dev_gone(struct domain_device *dev)
1367 {
1368 mvs_dev_gone_notify(dev);
1369 }
1370
1371 static void mvs_task_done(struct sas_task *task)
1372 {
1373 if (!del_timer(&task->slow_task->timer))
1374 return;
1375 complete(&task->slow_task->completion);
1376 }
1377
1378 static void mvs_tmf_timedout(unsigned long data)
1379 {
1380 struct sas_task *task = (struct sas_task *)data;
1381
1382 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1383 complete(&task->slow_task->completion);
1384 }
1385
1386 #define MVS_TASK_TIMEOUT 20
1387 static int mvs_exec_internal_tmf_task(struct domain_device *dev,
1388 void *parameter, u32 para_len, struct mvs_tmf_task *tmf)
1389 {
1390 int res, retry;
1391 struct sas_task *task = NULL;
1392
1393 for (retry = 0; retry < 3; retry++) {
1394 task = sas_alloc_slow_task(GFP_KERNEL);
1395 if (!task)
1396 return -ENOMEM;
1397
1398 task->dev = dev;
1399 task->task_proto = dev->tproto;
1400
1401 memcpy(&task->ssp_task, parameter, para_len);
1402 task->task_done = mvs_task_done;
1403
1404 task->slow_task->timer.data = (unsigned long) task;
1405 task->slow_task->timer.function = mvs_tmf_timedout;
1406 task->slow_task->timer.expires = jiffies + MVS_TASK_TIMEOUT*HZ;
1407 add_timer(&task->slow_task->timer);
1408
1409 res = mvs_task_exec(task, 1, GFP_KERNEL, NULL, 1, tmf);
1410
1411 if (res) {
1412 del_timer(&task->slow_task->timer);
1413 mv_printk("executing internel task failed:%d\n", res);
1414 goto ex_err;
1415 }
1416
1417 wait_for_completion(&task->slow_task->completion);
1418 res = TMF_RESP_FUNC_FAILED;
1419 /* Even TMF timed out, return direct. */
1420 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1421 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
1422 mv_printk("TMF task[%x] timeout.\n", tmf->tmf);
1423 goto ex_err;
1424 }
1425 }
1426
1427 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1428 task->task_status.stat == SAM_STAT_GOOD) {
1429 res = TMF_RESP_FUNC_COMPLETE;
1430 break;
1431 }
1432
1433 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1434 task->task_status.stat == SAS_DATA_UNDERRUN) {
1435 /* no error, but return the number of bytes of
1436 * underrun */
1437 res = task->task_status.residual;
1438 break;
1439 }
1440
1441 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1442 task->task_status.stat == SAS_DATA_OVERRUN) {
1443 mv_dprintk("blocked task error.\n");
1444 res = -EMSGSIZE;
1445 break;
1446 } else {
1447 mv_dprintk(" task to dev %016llx response: 0x%x "
1448 "status 0x%x\n",
1449 SAS_ADDR(dev->sas_addr),
1450 task->task_status.resp,
1451 task->task_status.stat);
1452 sas_free_task(task);
1453 task = NULL;
1454
1455 }
1456 }
1457 ex_err:
1458 BUG_ON(retry == 3 && task != NULL);
1459 sas_free_task(task);
1460 return res;
1461 }
1462
1463 static int mvs_debug_issue_ssp_tmf(struct domain_device *dev,
1464 u8 *lun, struct mvs_tmf_task *tmf)
1465 {
1466 struct sas_ssp_task ssp_task;
1467 if (!(dev->tproto & SAS_PROTOCOL_SSP))
1468 return TMF_RESP_FUNC_ESUPP;
1469
1470 memcpy(ssp_task.LUN, lun, 8);
1471
1472 return mvs_exec_internal_tmf_task(dev, &ssp_task,
1473 sizeof(ssp_task), tmf);
1474 }
1475
1476
1477 /* Standard mandates link reset for ATA (type 0)
1478 and hard reset for SSP (type 1) , only for RECOVERY */
1479 static int mvs_debug_I_T_nexus_reset(struct domain_device *dev)
1480 {
1481 int rc;
1482 struct sas_phy *phy = sas_get_local_phy(dev);
1483 int reset_type = (dev->dev_type == SAS_SATA_DEV ||
1484 (dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;
1485 rc = sas_phy_reset(phy, reset_type);
1486 sas_put_local_phy(phy);
1487 msleep(2000);
1488 return rc;
1489 }
1490
1491 /* mandatory SAM-3 */
1492 int mvs_lu_reset(struct domain_device *dev, u8 *lun)
1493 {
1494 unsigned long flags;
1495 int rc = TMF_RESP_FUNC_FAILED;
1496 struct mvs_tmf_task tmf_task;
1497 struct mvs_device * mvi_dev = dev->lldd_dev;
1498 struct mvs_info *mvi = mvi_dev->mvi_info;
1499
1500 tmf_task.tmf = TMF_LU_RESET;
1501 mvi_dev->dev_status = MVS_DEV_EH;
1502 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1503 if (rc == TMF_RESP_FUNC_COMPLETE) {
1504 spin_lock_irqsave(&mvi->lock, flags);
1505 mvs_release_task(mvi, dev);
1506 spin_unlock_irqrestore(&mvi->lock, flags);
1507 }
1508 /* If failed, fall-through I_T_Nexus reset */
1509 mv_printk("%s for device[%x]:rc= %d\n", __func__,
1510 mvi_dev->device_id, rc);
1511 return rc;
1512 }
1513
1514 int mvs_I_T_nexus_reset(struct domain_device *dev)
1515 {
1516 unsigned long flags;
1517 int rc = TMF_RESP_FUNC_FAILED;
1518 struct mvs_device * mvi_dev = (struct mvs_device *)dev->lldd_dev;
1519 struct mvs_info *mvi = mvi_dev->mvi_info;
1520
1521 if (mvi_dev->dev_status != MVS_DEV_EH)
1522 return TMF_RESP_FUNC_COMPLETE;
1523 else
1524 mvi_dev->dev_status = MVS_DEV_NORMAL;
1525 rc = mvs_debug_I_T_nexus_reset(dev);
1526 mv_printk("%s for device[%x]:rc= %d\n",
1527 __func__, mvi_dev->device_id, rc);
1528
1529 spin_lock_irqsave(&mvi->lock, flags);
1530 mvs_release_task(mvi, dev);
1531 spin_unlock_irqrestore(&mvi->lock, flags);
1532
1533 return rc;
1534 }
1535 /* optional SAM-3 */
1536 int mvs_query_task(struct sas_task *task)
1537 {
1538 u32 tag;
1539 struct scsi_lun lun;
1540 struct mvs_tmf_task tmf_task;
1541 int rc = TMF_RESP_FUNC_FAILED;
1542
1543 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1544 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1545 struct domain_device *dev = task->dev;
1546 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1547 struct mvs_info *mvi = mvi_dev->mvi_info;
1548
1549 int_to_scsilun(cmnd->device->lun, &lun);
1550 rc = mvs_find_tag(mvi, task, &tag);
1551 if (rc == 0) {
1552 rc = TMF_RESP_FUNC_FAILED;
1553 return rc;
1554 }
1555
1556 tmf_task.tmf = TMF_QUERY_TASK;
1557 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
1558
1559 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
1560 switch (rc) {
1561 /* The task is still in Lun, release it then */
1562 case TMF_RESP_FUNC_SUCC:
1563 /* The task is not in Lun or failed, reset the phy */
1564 case TMF_RESP_FUNC_FAILED:
1565 case TMF_RESP_FUNC_COMPLETE:
1566 break;
1567 }
1568 }
1569 mv_printk("%s:rc= %d\n", __func__, rc);
1570 return rc;
1571 }
1572
1573 /* mandatory SAM-3, still need free task/slot info */
1574 int mvs_abort_task(struct sas_task *task)
1575 {
1576 struct scsi_lun lun;
1577 struct mvs_tmf_task tmf_task;
1578 struct domain_device *dev = task->dev;
1579 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1580 struct mvs_info *mvi;
1581 int rc = TMF_RESP_FUNC_FAILED;
1582 unsigned long flags;
1583 u32 tag;
1584
1585 if (!mvi_dev) {
1586 mv_printk("Device has removed\n");
1587 return TMF_RESP_FUNC_FAILED;
1588 }
1589
1590 mvi = mvi_dev->mvi_info;
1591
1592 spin_lock_irqsave(&task->task_state_lock, flags);
1593 if (task->task_state_flags & SAS_TASK_STATE_DONE) {
1594 spin_unlock_irqrestore(&task->task_state_lock, flags);
1595 rc = TMF_RESP_FUNC_COMPLETE;
1596 goto out;
1597 }
1598 spin_unlock_irqrestore(&task->task_state_lock, flags);
1599 mvi_dev->dev_status = MVS_DEV_EH;
1600 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1601 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1602
1603 int_to_scsilun(cmnd->device->lun, &lun);
1604 rc = mvs_find_tag(mvi, task, &tag);
1605 if (rc == 0) {
1606 mv_printk("No such tag in %s\n", __func__);
1607 rc = TMF_RESP_FUNC_FAILED;
1608 return rc;
1609 }
1610
1611 tmf_task.tmf = TMF_ABORT_TASK;
1612 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
1613
1614 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
1615
1616 /* if successful, clear the task and callback forwards.*/
1617 if (rc == TMF_RESP_FUNC_COMPLETE) {
1618 u32 slot_no;
1619 struct mvs_slot_info *slot;
1620
1621 if (task->lldd_task) {
1622 slot = task->lldd_task;
1623 slot_no = (u32) (slot - mvi->slot_info);
1624 spin_lock_irqsave(&mvi->lock, flags);
1625 mvs_slot_complete(mvi, slot_no, 1);
1626 spin_unlock_irqrestore(&mvi->lock, flags);
1627 }
1628 }
1629
1630 } else if (task->task_proto & SAS_PROTOCOL_SATA ||
1631 task->task_proto & SAS_PROTOCOL_STP) {
1632 if (SAS_SATA_DEV == dev->dev_type) {
1633 struct mvs_slot_info *slot = task->lldd_task;
1634 u32 slot_idx = (u32)(slot - mvi->slot_info);
1635 mv_dprintk("mvs_abort_task() mvi=%p task=%p "
1636 "slot=%p slot_idx=x%x\n",
1637 mvi, task, slot, slot_idx);
1638 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1639 mvs_slot_task_free(mvi, task, slot, slot_idx);
1640 rc = TMF_RESP_FUNC_COMPLETE;
1641 goto out;
1642 }
1643
1644 }
1645 out:
1646 if (rc != TMF_RESP_FUNC_COMPLETE)
1647 mv_printk("%s:rc= %d\n", __func__, rc);
1648 return rc;
1649 }
1650
1651 int mvs_abort_task_set(struct domain_device *dev, u8 *lun)
1652 {
1653 int rc = TMF_RESP_FUNC_FAILED;
1654 struct mvs_tmf_task tmf_task;
1655
1656 tmf_task.tmf = TMF_ABORT_TASK_SET;
1657 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1658
1659 return rc;
1660 }
1661
1662 int mvs_clear_aca(struct domain_device *dev, u8 *lun)
1663 {
1664 int rc = TMF_RESP_FUNC_FAILED;
1665 struct mvs_tmf_task tmf_task;
1666
1667 tmf_task.tmf = TMF_CLEAR_ACA;
1668 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1669
1670 return rc;
1671 }
1672
1673 int mvs_clear_task_set(struct domain_device *dev, u8 *lun)
1674 {
1675 int rc = TMF_RESP_FUNC_FAILED;
1676 struct mvs_tmf_task tmf_task;
1677
1678 tmf_task.tmf = TMF_CLEAR_TASK_SET;
1679 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1680
1681 return rc;
1682 }
1683
1684 static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task,
1685 u32 slot_idx, int err)
1686 {
1687 struct mvs_device *mvi_dev = task->dev->lldd_dev;
1688 struct task_status_struct *tstat = &task->task_status;
1689 struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf;
1690 int stat = SAM_STAT_GOOD;
1691
1692
1693 resp->frame_len = sizeof(struct dev_to_host_fis);
1694 memcpy(&resp->ending_fis[0],
1695 SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset),
1696 sizeof(struct dev_to_host_fis));
1697 tstat->buf_valid_size = sizeof(*resp);
1698 if (unlikely(err)) {
1699 if (unlikely(err & CMD_ISS_STPD))
1700 stat = SAS_OPEN_REJECT;
1701 else
1702 stat = SAS_PROTO_RESPONSE;
1703 }
1704
1705 return stat;
1706 }
1707
1708 void mvs_set_sense(u8 *buffer, int len, int d_sense,
1709 int key, int asc, int ascq)
1710 {
1711 memset(buffer, 0, len);
1712
1713 if (d_sense) {
1714 /* Descriptor format */
1715 if (len < 4) {
1716 mv_printk("Length %d of sense buffer too small to "
1717 "fit sense %x:%x:%x", len, key, asc, ascq);
1718 }
1719
1720 buffer[0] = 0x72; /* Response Code */
1721 if (len > 1)
1722 buffer[1] = key; /* Sense Key */
1723 if (len > 2)
1724 buffer[2] = asc; /* ASC */
1725 if (len > 3)
1726 buffer[3] = ascq; /* ASCQ */
1727 } else {
1728 if (len < 14) {
1729 mv_printk("Length %d of sense buffer too small to "
1730 "fit sense %x:%x:%x", len, key, asc, ascq);
1731 }
1732
1733 buffer[0] = 0x70; /* Response Code */
1734 if (len > 2)
1735 buffer[2] = key; /* Sense Key */
1736 if (len > 7)
1737 buffer[7] = 0x0a; /* Additional Sense Length */
1738 if (len > 12)
1739 buffer[12] = asc; /* ASC */
1740 if (len > 13)
1741 buffer[13] = ascq; /* ASCQ */
1742 }
1743
1744 return;
1745 }
1746
1747 void mvs_fill_ssp_resp_iu(struct ssp_response_iu *iu,
1748 u8 key, u8 asc, u8 asc_q)
1749 {
1750 iu->datapres = 2;
1751 iu->response_data_len = 0;
1752 iu->sense_data_len = 17;
1753 iu->status = 02;
1754 mvs_set_sense(iu->sense_data, 17, 0,
1755 key, asc, asc_q);
1756 }
1757
1758 static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task,
1759 u32 slot_idx)
1760 {
1761 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1762 int stat;
1763 u32 err_dw0 = le32_to_cpu(*(u32 *)slot->response);
1764 u32 err_dw1 = le32_to_cpu(*((u32 *)slot->response + 1));
1765 u32 tfs = 0;
1766 enum mvs_port_type type = PORT_TYPE_SAS;
1767
1768 if (err_dw0 & CMD_ISS_STPD)
1769 MVS_CHIP_DISP->issue_stop(mvi, type, tfs);
1770
1771 MVS_CHIP_DISP->command_active(mvi, slot_idx);
1772
1773 stat = SAM_STAT_CHECK_CONDITION;
1774 switch (task->task_proto) {
1775 case SAS_PROTOCOL_SSP:
1776 {
1777 stat = SAS_ABORTED_TASK;
1778 if ((err_dw0 & NO_DEST) || err_dw1 & bit(31)) {
1779 struct ssp_response_iu *iu = slot->response +
1780 sizeof(struct mvs_err_info);
1781 mvs_fill_ssp_resp_iu(iu, NOT_READY, 0x04, 01);
1782 sas_ssp_task_response(mvi->dev, task, iu);
1783 stat = SAM_STAT_CHECK_CONDITION;
1784 }
1785 if (err_dw1 & bit(31))
1786 mv_printk("reuse same slot, retry command.\n");
1787 break;
1788 }
1789 case SAS_PROTOCOL_SMP:
1790 stat = SAM_STAT_CHECK_CONDITION;
1791 break;
1792
1793 case SAS_PROTOCOL_SATA:
1794 case SAS_PROTOCOL_STP:
1795 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
1796 {
1797 task->ata_task.use_ncq = 0;
1798 stat = SAS_PROTO_RESPONSE;
1799 mvs_sata_done(mvi, task, slot_idx, err_dw0);
1800 }
1801 break;
1802 default:
1803 break;
1804 }
1805
1806 return stat;
1807 }
1808
1809 int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags)
1810 {
1811 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
1812 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1813 struct sas_task *task = slot->task;
1814 struct mvs_device *mvi_dev = NULL;
1815 struct task_status_struct *tstat;
1816 struct domain_device *dev;
1817 u32 aborted;
1818
1819 void *to;
1820 enum exec_status sts;
1821
1822 if (unlikely(!task || !task->lldd_task || !task->dev))
1823 return -1;
1824
1825 tstat = &task->task_status;
1826 dev = task->dev;
1827 mvi_dev = dev->lldd_dev;
1828
1829 spin_lock(&task->task_state_lock);
1830 task->task_state_flags &=
1831 ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR);
1832 task->task_state_flags |= SAS_TASK_STATE_DONE;
1833 /* race condition*/
1834 aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED;
1835 spin_unlock(&task->task_state_lock);
1836
1837 memset(tstat, 0, sizeof(*tstat));
1838 tstat->resp = SAS_TASK_COMPLETE;
1839
1840 if (unlikely(aborted)) {
1841 tstat->stat = SAS_ABORTED_TASK;
1842 if (mvi_dev && mvi_dev->running_req)
1843 mvi_dev->running_req--;
1844 if (sas_protocol_ata(task->task_proto))
1845 mvs_free_reg_set(mvi, mvi_dev);
1846
1847 mvs_slot_task_free(mvi, task, slot, slot_idx);
1848 return -1;
1849 }
1850
1851 /* when no device attaching, go ahead and complete by error handling*/
1852 if (unlikely(!mvi_dev || flags)) {
1853 if (!mvi_dev)
1854 mv_dprintk("port has not device.\n");
1855 tstat->stat = SAS_PHY_DOWN;
1856 goto out;
1857 }
1858
1859 /*
1860 * error info record present; slot->response is 32 bit aligned but may
1861 * not be 64 bit aligned, so check for zero in two 32 bit reads
1862 */
1863 if (unlikely((rx_desc & RXQ_ERR)
1864 && (*((u32 *)slot->response)
1865 || *(((u32 *)slot->response) + 1)))) {
1866 mv_dprintk("port %d slot %d rx_desc %X has error info"
1867 "%016llX.\n", slot->port->sas_port.id, slot_idx,
1868 rx_desc, get_unaligned_le64(slot->response));
1869 tstat->stat = mvs_slot_err(mvi, task, slot_idx);
1870 tstat->resp = SAS_TASK_COMPLETE;
1871 goto out;
1872 }
1873
1874 switch (task->task_proto) {
1875 case SAS_PROTOCOL_SSP:
1876 /* hw says status == 0, datapres == 0 */
1877 if (rx_desc & RXQ_GOOD) {
1878 tstat->stat = SAM_STAT_GOOD;
1879 tstat->resp = SAS_TASK_COMPLETE;
1880 }
1881 /* response frame present */
1882 else if (rx_desc & RXQ_RSP) {
1883 struct ssp_response_iu *iu = slot->response +
1884 sizeof(struct mvs_err_info);
1885 sas_ssp_task_response(mvi->dev, task, iu);
1886 } else
1887 tstat->stat = SAM_STAT_CHECK_CONDITION;
1888 break;
1889
1890 case SAS_PROTOCOL_SMP: {
1891 struct scatterlist *sg_resp = &task->smp_task.smp_resp;
1892 tstat->stat = SAM_STAT_GOOD;
1893 to = kmap_atomic(sg_page(sg_resp));
1894 memcpy(to + sg_resp->offset,
1895 slot->response + sizeof(struct mvs_err_info),
1896 sg_dma_len(sg_resp));
1897 kunmap_atomic(to);
1898 break;
1899 }
1900
1901 case SAS_PROTOCOL_SATA:
1902 case SAS_PROTOCOL_STP:
1903 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: {
1904 tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0);
1905 break;
1906 }
1907
1908 default:
1909 tstat->stat = SAM_STAT_CHECK_CONDITION;
1910 break;
1911 }
1912 if (!slot->port->port_attached) {
1913 mv_dprintk("port %d has removed.\n", slot->port->sas_port.id);
1914 tstat->stat = SAS_PHY_DOWN;
1915 }
1916
1917
1918 out:
1919 if (mvi_dev && mvi_dev->running_req) {
1920 mvi_dev->running_req--;
1921 if (sas_protocol_ata(task->task_proto) && !mvi_dev->running_req)
1922 mvs_free_reg_set(mvi, mvi_dev);
1923 }
1924 mvs_slot_task_free(mvi, task, slot, slot_idx);
1925 sts = tstat->stat;
1926
1927 spin_unlock(&mvi->lock);
1928 if (task->task_done)
1929 task->task_done(task);
1930
1931 spin_lock(&mvi->lock);
1932
1933 return sts;
1934 }
1935
1936 void mvs_do_release_task(struct mvs_info *mvi,
1937 int phy_no, struct domain_device *dev)
1938 {
1939 u32 slot_idx;
1940 struct mvs_phy *phy;
1941 struct mvs_port *port;
1942 struct mvs_slot_info *slot, *slot2;
1943
1944 phy = &mvi->phy[phy_no];
1945 port = phy->port;
1946 if (!port)
1947 return;
1948 /* clean cmpl queue in case request is already finished */
1949 mvs_int_rx(mvi, false);
1950
1951
1952
1953 list_for_each_entry_safe(slot, slot2, &port->list, entry) {
1954 struct sas_task *task;
1955 slot_idx = (u32) (slot - mvi->slot_info);
1956 task = slot->task;
1957
1958 if (dev && task->dev != dev)
1959 continue;
1960
1961 mv_printk("Release slot [%x] tag[%x], task [%p]:\n",
1962 slot_idx, slot->slot_tag, task);
1963 MVS_CHIP_DISP->command_active(mvi, slot_idx);
1964
1965 mvs_slot_complete(mvi, slot_idx, 1);
1966 }
1967 }
1968
1969 void mvs_release_task(struct mvs_info *mvi,
1970 struct domain_device *dev)
1971 {
1972 int i, phyno[WIDE_PORT_MAX_PHY], num;
1973 num = mvs_find_dev_phyno(dev, phyno);
1974 for (i = 0; i < num; i++)
1975 mvs_do_release_task(mvi, phyno[i], dev);
1976 }
1977
1978 static void mvs_phy_disconnected(struct mvs_phy *phy)
1979 {
1980 phy->phy_attached = 0;
1981 phy->att_dev_info = 0;
1982 phy->att_dev_sas_addr = 0;
1983 }
1984
1985 static void mvs_work_queue(struct work_struct *work)
1986 {
1987 struct delayed_work *dw = container_of(work, struct delayed_work, work);
1988 struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q);
1989 struct mvs_info *mvi = mwq->mvi;
1990 unsigned long flags;
1991 u32 phy_no = (unsigned long) mwq->data;
1992 struct sas_ha_struct *sas_ha = mvi->sas;
1993 struct mvs_phy *phy = &mvi->phy[phy_no];
1994 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1995
1996 spin_lock_irqsave(&mvi->lock, flags);
1997 if (mwq->handler & PHY_PLUG_EVENT) {
1998
1999 if (phy->phy_event & PHY_PLUG_OUT) {
2000 u32 tmp;
2001 struct sas_identify_frame *id;
2002 id = (struct sas_identify_frame *)phy->frame_rcvd;
2003 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no);
2004 phy->phy_event &= ~PHY_PLUG_OUT;
2005 if (!(tmp & PHY_READY_MASK)) {
2006 sas_phy_disconnected(sas_phy);
2007 mvs_phy_disconnected(phy);
2008 sas_ha->notify_phy_event(sas_phy,
2009 PHYE_LOSS_OF_SIGNAL);
2010 mv_dprintk("phy%d Removed Device\n", phy_no);
2011 } else {
2012 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
2013 mvs_update_phyinfo(mvi, phy_no, 1);
2014 mvs_bytes_dmaed(mvi, phy_no);
2015 mvs_port_notify_formed(sas_phy, 0);
2016 mv_dprintk("phy%d Attached Device\n", phy_no);
2017 }
2018 }
2019 } else if (mwq->handler & EXP_BRCT_CHG) {
2020 phy->phy_event &= ~EXP_BRCT_CHG;
2021 sas_ha->notify_port_event(sas_phy,
2022 PORTE_BROADCAST_RCVD);
2023 mv_dprintk("phy%d Got Broadcast Change\n", phy_no);
2024 }
2025 list_del(&mwq->entry);
2026 spin_unlock_irqrestore(&mvi->lock, flags);
2027 kfree(mwq);
2028 }
2029
2030 static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler)
2031 {
2032 struct mvs_wq *mwq;
2033 int ret = 0;
2034
2035 mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC);
2036 if (mwq) {
2037 mwq->mvi = mvi;
2038 mwq->data = data;
2039 mwq->handler = handler;
2040 MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq);
2041 list_add_tail(&mwq->entry, &mvi->wq_list);
2042 schedule_delayed_work(&mwq->work_q, HZ * 2);
2043 } else
2044 ret = -ENOMEM;
2045
2046 return ret;
2047 }
2048
2049 static void mvs_sig_time_out(unsigned long tphy)
2050 {
2051 struct mvs_phy *phy = (struct mvs_phy *)tphy;
2052 struct mvs_info *mvi = phy->mvi;
2053 u8 phy_no;
2054
2055 for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) {
2056 if (&mvi->phy[phy_no] == phy) {
2057 mv_dprintk("Get signature time out, reset phy %d\n",
2058 phy_no+mvi->id*mvi->chip->n_phy);
2059 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_HARD_RESET);
2060 }
2061 }
2062 }
2063
2064 void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events)
2065 {
2066 u32 tmp;
2067 struct mvs_phy *phy = &mvi->phy[phy_no];
2068
2069 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no);
2070 MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status);
2071 mv_dprintk("phy %d ctrl sts=0x%08X.\n", phy_no+mvi->id*mvi->chip->n_phy,
2072 MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no));
2073 mv_dprintk("phy %d irq sts = 0x%08X\n", phy_no+mvi->id*mvi->chip->n_phy,
2074 phy->irq_status);
2075
2076 /*
2077 * events is port event now ,
2078 * we need check the interrupt status which belongs to per port.
2079 */
2080
2081 if (phy->irq_status & PHYEV_DCDR_ERR) {
2082 mv_dprintk("phy %d STP decoding error.\n",
2083 phy_no + mvi->id*mvi->chip->n_phy);
2084 }
2085
2086 if (phy->irq_status & PHYEV_POOF) {
2087 mdelay(500);
2088 if (!(phy->phy_event & PHY_PLUG_OUT)) {
2089 int dev_sata = phy->phy_type & PORT_TYPE_SATA;
2090 int ready;
2091 mvs_do_release_task(mvi, phy_no, NULL);
2092 phy->phy_event |= PHY_PLUG_OUT;
2093 MVS_CHIP_DISP->clear_srs_irq(mvi, 0, 1);
2094 mvs_handle_event(mvi,
2095 (void *)(unsigned long)phy_no,
2096 PHY_PLUG_EVENT);
2097 ready = mvs_is_phy_ready(mvi, phy_no);
2098 if (ready || dev_sata) {
2099 if (MVS_CHIP_DISP->stp_reset)
2100 MVS_CHIP_DISP->stp_reset(mvi,
2101 phy_no);
2102 else
2103 MVS_CHIP_DISP->phy_reset(mvi,
2104 phy_no, MVS_SOFT_RESET);
2105 return;
2106 }
2107 }
2108 }
2109
2110 if (phy->irq_status & PHYEV_COMWAKE) {
2111 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no);
2112 MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no,
2113 tmp | PHYEV_SIG_FIS);
2114 if (phy->timer.function == NULL) {
2115 phy->timer.data = (unsigned long)phy;
2116 phy->timer.function = mvs_sig_time_out;
2117 phy->timer.expires = jiffies + 5*HZ;
2118 add_timer(&phy->timer);
2119 }
2120 }
2121 if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) {
2122 phy->phy_status = mvs_is_phy_ready(mvi, phy_no);
2123 mv_dprintk("notify plug in on phy[%d]\n", phy_no);
2124 if (phy->phy_status) {
2125 mdelay(10);
2126 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
2127 if (phy->phy_type & PORT_TYPE_SATA) {
2128 tmp = MVS_CHIP_DISP->read_port_irq_mask(
2129 mvi, phy_no);
2130 tmp &= ~PHYEV_SIG_FIS;
2131 MVS_CHIP_DISP->write_port_irq_mask(mvi,
2132 phy_no, tmp);
2133 }
2134 mvs_update_phyinfo(mvi, phy_no, 0);
2135 if (phy->phy_type & PORT_TYPE_SAS) {
2136 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_PHY_TUNE);
2137 mdelay(10);
2138 }
2139
2140 mvs_bytes_dmaed(mvi, phy_no);
2141 /* whether driver is going to handle hot plug */
2142 if (phy->phy_event & PHY_PLUG_OUT) {
2143 mvs_port_notify_formed(&phy->sas_phy, 0);
2144 phy->phy_event &= ~PHY_PLUG_OUT;
2145 }
2146 } else {
2147 mv_dprintk("plugin interrupt but phy%d is gone\n",
2148 phy_no + mvi->id*mvi->chip->n_phy);
2149 }
2150 } else if (phy->irq_status & PHYEV_BROAD_CH) {
2151 mv_dprintk("phy %d broadcast change.\n",
2152 phy_no + mvi->id*mvi->chip->n_phy);
2153 mvs_handle_event(mvi, (void *)(unsigned long)phy_no,
2154 EXP_BRCT_CHG);
2155 }
2156 }
2157
2158 int mvs_int_rx(struct mvs_info *mvi, bool self_clear)
2159 {
2160 u32 rx_prod_idx, rx_desc;
2161 bool attn = false;
2162
2163 /* the first dword in the RX ring is special: it contains
2164 * a mirror of the hardware's RX producer index, so that
2165 * we don't have to stall the CPU reading that register.
2166 * The actual RX ring is offset by one dword, due to this.
2167 */
2168 rx_prod_idx = mvi->rx_cons;
2169 mvi->rx_cons = le32_to_cpu(mvi->rx[0]);
2170 if (mvi->rx_cons == 0xfff) /* h/w hasn't touched RX ring yet */
2171 return 0;
2172
2173 /* The CMPL_Q may come late, read from register and try again
2174 * note: if coalescing is enabled,
2175 * it will need to read from register every time for sure
2176 */
2177 if (unlikely(mvi->rx_cons == rx_prod_idx))
2178 mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK;
2179
2180 if (mvi->rx_cons == rx_prod_idx)
2181 return 0;
2182
2183 while (mvi->rx_cons != rx_prod_idx) {
2184 /* increment our internal RX consumer pointer */
2185 rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1);
2186 rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]);
2187
2188 if (likely(rx_desc & RXQ_DONE))
2189 mvs_slot_complete(mvi, rx_desc, 0);
2190 if (rx_desc & RXQ_ATTN) {
2191 attn = true;
2192 } else if (rx_desc & RXQ_ERR) {
2193 if (!(rx_desc & RXQ_DONE))
2194 mvs_slot_complete(mvi, rx_desc, 0);
2195 } else if (rx_desc & RXQ_SLOT_RESET) {
2196 mvs_slot_free(mvi, rx_desc);
2197 }
2198 }
2199
2200 if (attn && self_clear)
2201 MVS_CHIP_DISP->int_full(mvi);
2202 return 0;
2203 }
2204
Linux with added FPC-III support