drivers/scsi/qla2xxx/qla_bsg.h

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #ifndef __QLA_BSG_H
   8 #define __QLA_BSG_H
   9
  10 /* BSG Vendor specific commands */
  11 #define QL_VND_LOOPBACK         0x01
  12 #define QL_VND_A84_RESET        0x02
  13 #define QL_VND_A84_UPDATE_FW    0x03
  14 #define QL_VND_A84_MGMT_CMD     0x04
  15 #define QL_VND_IIDMA            0x05
  16 #define QL_VND_FCP_PRIO_CFG_CMD 0x06
  17 #define QL_VND_READ_FLASH       0x07
  18 #define QL_VND_UPDATE_FLASH     0x08
  19 #define QL_VND_SET_FRU_VERSION  0x0B
  20 #define QL_VND_READ_FRU_STATUS  0x0C
  21 #define QL_VND_WRITE_FRU_STATUS 0x0D
  22 #define QL_VND_DIAG_IO_CMD      0x0A
  23 #define QL_VND_WRITE_I2C        0x10
  24 #define QL_VND_READ_I2C         0x11
  25 #define QL_VND_FX00_MGMT_CMD    0x12
  26
  27 /* BSG Vendor specific subcode returns */
  28 #define EXT_STATUS_OK                   0
  29 #define EXT_STATUS_ERR                  1
  30 #define EXT_STATUS_BUSY                 2
  31 #define EXT_STATUS_INVALID_PARAM        6
  32 #define EXT_STATUS_DATA_OVERRUN         7
  33 #define EXT_STATUS_DATA_UNDERRUN        8
  34 #define EXT_STATUS_MAILBOX              11
  35 #define EXT_STATUS_NO_MEMORY            17
  36 #define EXT_STATUS_DEVICE_OFFLINE       22
  37
  38 /*
  39  * To support bidirectional iocb
  40  * BSG Vendor specific returns
  41  */
  42 #define EXT_STATUS_NOT_SUPPORTED        27
  43 #define EXT_STATUS_INVALID_CFG          28
  44 #define EXT_STATUS_DMA_ERR              29
  45 #define EXT_STATUS_TIMEOUT              30
  46 #define EXT_STATUS_THREAD_FAILED        31
  47 #define EXT_STATUS_DATA_CMP_FAILED      32
  48
  49 /* BSG definations for interpreting CommandSent field */
  50 #define INT_DEF_LB_LOOPBACK_CMD         0
  51 #define INT_DEF_LB_ECHO_CMD             1
  52
  53 /* Loopback related definations */
  54 #define INTERNAL_LOOPBACK               0xF1
  55 #define EXTERNAL_LOOPBACK               0xF2
  56 #define ENABLE_INTERNAL_LOOPBACK        0x02
  57 #define ENABLE_EXTERNAL_LOOPBACK        0x04
  58 #define INTERNAL_LOOPBACK_MASK          0x000E
  59 #define MAX_ELS_FRAME_PAYLOAD           252
  60 #define ELS_OPCODE_BYTE                 0x10
  61
  62 /* BSG Vendor specific definations */
  63 #define A84_ISSUE_WRITE_TYPE_CMD        0
  64 #define A84_ISSUE_READ_TYPE_CMD         1
  65 #define A84_CLEANUP_CMD                 2
  66 #define A84_ISSUE_RESET_OP_FW           3
  67 #define A84_ISSUE_RESET_DIAG_FW         4
  68 #define A84_ISSUE_UPDATE_OPFW_CMD       5
  69 #define A84_ISSUE_UPDATE_DIAGFW_CMD     6
  70
  71 struct qla84_mgmt_param {
  72         union {
  73                 struct {
  74                         uint32_t start_addr;
  75                 } mem; /* for QLA84_MGMT_READ/WRITE_MEM */
  76                 struct {
  77                         uint32_t id;
  78 #define QLA84_MGMT_CONFIG_ID_UIF        1
  79 #define QLA84_MGMT_CONFIG_ID_FCOE_COS   2
  80 #define QLA84_MGMT_CONFIG_ID_PAUSE      3
  81 #define QLA84_MGMT_CONFIG_ID_TIMEOUTS   4
  82
  83                 uint32_t param0;
  84                 uint32_t param1;
  85         } config; /* for QLA84_MGMT_CHNG_CONFIG */
  86
  87         struct {
  88                 uint32_t type;
  89 #define QLA84_MGMT_INFO_CONFIG_LOG_DATA         1 /* Get Config Log Data */
  90 #define QLA84_MGMT_INFO_LOG_DATA                2 /* Get Log Data */
  91 #define QLA84_MGMT_INFO_PORT_STAT               3 /* Get Port Statistics */
  92 #define QLA84_MGMT_INFO_LIF_STAT                4 /* Get LIF Statistics  */
  93 #define QLA84_MGMT_INFO_ASIC_STAT               5 /* Get ASIC Statistics */
  94 #define QLA84_MGMT_INFO_CONFIG_PARAMS           6 /* Get Config Parameters */
  95 #define QLA84_MGMT_INFO_PANIC_LOG               7 /* Get Panic Log */
  96
  97                 uint32_t context;
  98 /*
  99 * context definitions for QLA84_MGMT_INFO_CONFIG_LOG_DATA
 100 */
 101 #define IC_LOG_DATA_LOG_ID_DEBUG_LOG                    0
 102 #define IC_LOG_DATA_LOG_ID_LEARN_LOG                    1
 103 #define IC_LOG_DATA_LOG_ID_FC_ACL_INGRESS_LOG           2
 104 #define IC_LOG_DATA_LOG_ID_FC_ACL_EGRESS_LOG            3
 105 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_INGRESS_LOG     4
 106 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_EGRESS_LOG      5
 107 #define IC_LOG_DATA_LOG_ID_MESSAGE_TRANSMIT_LOG         6
 108 #define IC_LOG_DATA_LOG_ID_MESSAGE_RECEIVE_LOG          7
 109 #define IC_LOG_DATA_LOG_ID_LINK_EVENT_LOG               8
 110 #define IC_LOG_DATA_LOG_ID_DCX_LOG                      9
 111
 112 /*
 113 * context definitions for QLA84_MGMT_INFO_PORT_STAT
 114 */
 115 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT0   0
 116 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT1   1
 117 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT0        2
 118 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT1        3
 119 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT0         4
 120 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT1         5
 121
 122
 123 /*
 124 * context definitions for QLA84_MGMT_INFO_LIF_STAT
 125 */
 126 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT0     0
 127 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT1     1
 128 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT0           2
 129 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT1           3
 130 #define IC_LIF_STATISTICS_LIF_NUMBER_CPU                6
 131
 132                 } info; /* for QLA84_MGMT_GET_INFO */
 133         } u;
 134 };
 135
 136 struct qla84_msg_mgmt {
 137         uint16_t cmd;
 138 #define QLA84_MGMT_READ_MEM     0x00
 139 #define QLA84_MGMT_WRITE_MEM    0x01
 140 #define QLA84_MGMT_CHNG_CONFIG  0x02
 141 #define QLA84_MGMT_GET_INFO     0x03
 142         uint16_t rsrvd;
 143         struct qla84_mgmt_param mgmtp;/* parameters for cmd */
 144         uint32_t len; /* bytes in payload following this struct */
 145         uint8_t payload[0]; /* payload for cmd */
 146 };
 147
 148 struct qla_bsg_a84_mgmt {
 149         struct qla84_msg_mgmt mgmt;
 150 } __attribute__ ((packed));
 151
 152 struct qla_scsi_addr {
 153         uint16_t bus;
 154         uint16_t target;
 155 } __attribute__ ((packed));
 156
 157 struct qla_ext_dest_addr {
 158         union {
 159                 uint8_t wwnn[8];
 160                 uint8_t wwpn[8];
 161                 uint8_t id[4];
 162                 struct qla_scsi_addr scsi_addr;
 163         } dest_addr;
 164         uint16_t dest_type;
 165 #define EXT_DEF_TYPE_WWPN       2
 166         uint16_t lun;
 167         uint16_t padding[2];
 168 } __attribute__ ((packed));
 169
 170 struct qla_port_param {
 171         struct qla_ext_dest_addr fc_scsi_addr;
 172         uint16_t mode;
 173         uint16_t speed;
 174 } __attribute__ ((packed));
 175
 176
 177 /* FRU VPD */
 178
 179 #define MAX_FRU_SIZE    36
 180
 181 struct qla_field_address {
 182         uint16_t offset;
 183         uint16_t device;
 184         uint16_t option;
 185 } __packed;
 186
 187 struct qla_field_info {
 188         uint8_t version[MAX_FRU_SIZE];
 189 } __packed;
 190
 191 struct qla_image_version {
 192         struct qla_field_address field_address;
 193         struct qla_field_info field_info;
 194 } __packed;
 195
 196 struct qla_image_version_list {
 197         uint32_t count;
 198         struct qla_image_version version[0];
 199 } __packed;
 200
 201 struct qla_status_reg {
 202         struct qla_field_address field_address;
 203         uint8_t status_reg;
 204         uint8_t reserved[7];
 205 } __packed;
 206
 207 struct qla_i2c_access {
 208         uint16_t device;
 209         uint16_t offset;
 210         uint16_t option;
 211         uint16_t length;
 212         uint8_t  buffer[0x40];
 213 } __packed;
 214
 215 #endif