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mfd: wm8350-i2c: Make sure the i2c regmap functions are compiled
[linux/fpc-iii.git] / drivers / scsi / qla2xxx / qla_init.c
blobdf67a0649410c567d046de749f7e178ec022891f
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2013 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_gbl.h"
9
10 #include <linux/delay.h>
11 #include <linux/slab.h>
12 #include <linux/vmalloc.h>
13
14 #include "qla_devtbl.h"
15
16 #ifdef CONFIG_SPARC
17 #include <asm/prom.h>
18 #endif
19
20 #include <target/target_core_base.h>
21 #include "qla_target.h"
22
23 /*
24 * QLogic ISP2x00 Hardware Support Function Prototypes.
25 */
26 static int qla2x00_isp_firmware(scsi_qla_host_t *);
27 static int qla2x00_setup_chip(scsi_qla_host_t *);
28 static int qla2x00_fw_ready(scsi_qla_host_t *);
29 static int qla2x00_configure_hba(scsi_qla_host_t *);
30 static int qla2x00_configure_loop(scsi_qla_host_t *);
31 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
32 static int qla2x00_configure_fabric(scsi_qla_host_t *);
33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
34 static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
35 uint16_t *);
36
37 static int qla2x00_restart_isp(scsi_qla_host_t *);
38
39 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
40 static int qla84xx_init_chip(scsi_qla_host_t *);
41 static int qla25xx_init_queues(struct qla_hw_data *);
42
43 /* SRB Extensions ---------------------------------------------------------- */
44
45 void
46 qla2x00_sp_timeout(unsigned long __data)
47 {
48 srb_t *sp = (srb_t *)__data;
49 struct srb_iocb *iocb;
50 fc_port_t *fcport = sp->fcport;
51 struct qla_hw_data *ha = fcport->vha->hw;
52 struct req_que *req;
53 unsigned long flags;
54
55 spin_lock_irqsave(&ha->hardware_lock, flags);
56 req = ha->req_q_map[0];
57 req->outstanding_cmds[sp->handle] = NULL;
58 iocb = &sp->u.iocb_cmd;
59 iocb->timeout(sp);
60 sp->free(fcport->vha, sp);
61 spin_unlock_irqrestore(&ha->hardware_lock, flags);
62 }
63
64 void
65 qla2x00_sp_free(void *data, void *ptr)
66 {
67 srb_t *sp = (srb_t *)ptr;
68 struct srb_iocb *iocb = &sp->u.iocb_cmd;
69 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
70
71 del_timer(&iocb->timer);
72 qla2x00_rel_sp(vha, sp);
73 }
74
75 /* Asynchronous Login/Logout Routines -------------------------------------- */
76
77 unsigned long
78 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
79 {
80 unsigned long tmo;
81 struct qla_hw_data *ha = vha->hw;
82
83 /* Firmware should use switch negotiated r_a_tov for timeout. */
84 tmo = ha->r_a_tov / 10 * 2;
85 if (IS_QLAFX00(ha)) {
86 tmo = FX00_DEF_RATOV * 2;
87 } else if (!IS_FWI2_CAPABLE(ha)) {
88 /*
89 * Except for earlier ISPs where the timeout is seeded from the
90 * initialization control block.
91 */
92 tmo = ha->login_timeout;
93 }
94 return tmo;
95 }
96
97 static void
98 qla2x00_async_iocb_timeout(void *data)
99 {
100 srb_t *sp = (srb_t *)data;
101 fc_port_t *fcport = sp->fcport;
102
103 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
104 "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n",
105 sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area,
106 fcport->d_id.b.al_pa);
107
108 fcport->flags &= ~FCF_ASYNC_SENT;
109 if (sp->type == SRB_LOGIN_CMD) {
110 struct srb_iocb *lio = &sp->u.iocb_cmd;
111 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
112 /* Retry as needed. */
113 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
114 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
115 QLA_LOGIO_LOGIN_RETRIED : 0;
116 qla2x00_post_async_login_done_work(fcport->vha, fcport,
117 lio->u.logio.data);
118 }
119 }
120
121 static void
122 qla2x00_async_login_sp_done(void *data, void *ptr, int res)
123 {
124 srb_t *sp = (srb_t *)ptr;
125 struct srb_iocb *lio = &sp->u.iocb_cmd;
126 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
127
128 if (!test_bit(UNLOADING, &vha->dpc_flags))
129 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
130 lio->u.logio.data);
131 sp->free(sp->fcport->vha, sp);
132 }
133
134 int
135 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
136 uint16_t *data)
137 {
138 srb_t *sp;
139 struct srb_iocb *lio;
140 int rval;
141
142 rval = QLA_FUNCTION_FAILED;
143 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
144 if (!sp)
145 goto done;
146
147 sp->type = SRB_LOGIN_CMD;
148 sp->name = "login";
149 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
150
151 lio = &sp->u.iocb_cmd;
152 lio->timeout = qla2x00_async_iocb_timeout;
153 sp->done = qla2x00_async_login_sp_done;
154 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
155 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
156 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
157 rval = qla2x00_start_sp(sp);
158 if (rval != QLA_SUCCESS)
159 goto done_free_sp;
160
161 ql_dbg(ql_dbg_disc, vha, 0x2072,
162 "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x "
163 "retries=%d.\n", sp->handle, fcport->loop_id,
164 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
165 fcport->login_retry);
166 return rval;
167
168 done_free_sp:
169 sp->free(fcport->vha, sp);
170 done:
171 return rval;
172 }
173
174 static void
175 qla2x00_async_logout_sp_done(void *data, void *ptr, int res)
176 {
177 srb_t *sp = (srb_t *)ptr;
178 struct srb_iocb *lio = &sp->u.iocb_cmd;
179 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
180
181 if (!test_bit(UNLOADING, &vha->dpc_flags))
182 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
183 lio->u.logio.data);
184 sp->free(sp->fcport->vha, sp);
185 }
186
187 int
188 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
189 {
190 srb_t *sp;
191 struct srb_iocb *lio;
192 int rval;
193
194 rval = QLA_FUNCTION_FAILED;
195 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
196 if (!sp)
197 goto done;
198
199 sp->type = SRB_LOGOUT_CMD;
200 sp->name = "logout";
201 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
202
203 lio = &sp->u.iocb_cmd;
204 lio->timeout = qla2x00_async_iocb_timeout;
205 sp->done = qla2x00_async_logout_sp_done;
206 rval = qla2x00_start_sp(sp);
207 if (rval != QLA_SUCCESS)
208 goto done_free_sp;
209
210 ql_dbg(ql_dbg_disc, vha, 0x2070,
211 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
212 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
213 fcport->d_id.b.area, fcport->d_id.b.al_pa);
214 return rval;
215
216 done_free_sp:
217 sp->free(fcport->vha, sp);
218 done:
219 return rval;
220 }
221
222 static void
223 qla2x00_async_adisc_sp_done(void *data, void *ptr, int res)
224 {
225 srb_t *sp = (srb_t *)ptr;
226 struct srb_iocb *lio = &sp->u.iocb_cmd;
227 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
228
229 if (!test_bit(UNLOADING, &vha->dpc_flags))
230 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
231 lio->u.logio.data);
232 sp->free(sp->fcport->vha, sp);
233 }
234
235 int
236 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
237 uint16_t *data)
238 {
239 srb_t *sp;
240 struct srb_iocb *lio;
241 int rval;
242
243 rval = QLA_FUNCTION_FAILED;
244 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
245 if (!sp)
246 goto done;
247
248 sp->type = SRB_ADISC_CMD;
249 sp->name = "adisc";
250 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
251
252 lio = &sp->u.iocb_cmd;
253 lio->timeout = qla2x00_async_iocb_timeout;
254 sp->done = qla2x00_async_adisc_sp_done;
255 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
256 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
257 rval = qla2x00_start_sp(sp);
258 if (rval != QLA_SUCCESS)
259 goto done_free_sp;
260
261 ql_dbg(ql_dbg_disc, vha, 0x206f,
262 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n",
263 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
264 fcport->d_id.b.area, fcport->d_id.b.al_pa);
265 return rval;
266
267 done_free_sp:
268 sp->free(fcport->vha, sp);
269 done:
270 return rval;
271 }
272
273 static void
274 qla2x00_async_tm_cmd_done(void *data, void *ptr, int res)
275 {
276 srb_t *sp = (srb_t *)ptr;
277 struct srb_iocb *iocb = &sp->u.iocb_cmd;
278 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
279 uint32_t flags;
280 uint16_t lun;
281 int rval;
282
283 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
284 flags = iocb->u.tmf.flags;
285 lun = (uint16_t)iocb->u.tmf.lun;
286
287 /* Issue Marker IOCB */
288 rval = qla2x00_marker(vha, vha->hw->req_q_map[0],
289 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun,
290 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
291
292 if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
293 ql_dbg(ql_dbg_taskm, vha, 0x8030,
294 "TM IOCB failed (%x).\n", rval);
295 }
296 }
297 sp->free(sp->fcport->vha, sp);
298 }
299
300 int
301 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t tm_flags, uint32_t lun,
302 uint32_t tag)
303 {
304 struct scsi_qla_host *vha = fcport->vha;
305 srb_t *sp;
306 struct srb_iocb *tcf;
307 int rval;
308
309 rval = QLA_FUNCTION_FAILED;
310 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
311 if (!sp)
312 goto done;
313
314 sp->type = SRB_TM_CMD;
315 sp->name = "tmf";
316 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
317
318 tcf = &sp->u.iocb_cmd;
319 tcf->u.tmf.flags = tm_flags;
320 tcf->u.tmf.lun = lun;
321 tcf->u.tmf.data = tag;
322 tcf->timeout = qla2x00_async_iocb_timeout;
323 sp->done = qla2x00_async_tm_cmd_done;
324
325 rval = qla2x00_start_sp(sp);
326 if (rval != QLA_SUCCESS)
327 goto done_free_sp;
328
329 ql_dbg(ql_dbg_taskm, vha, 0x802f,
330 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
331 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
332 fcport->d_id.b.area, fcport->d_id.b.al_pa);
333 return rval;
334
335 done_free_sp:
336 sp->free(fcport->vha, sp);
337 done:
338 return rval;
339 }
340
341 void
342 qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
343 uint16_t *data)
344 {
345 int rval;
346
347 switch (data[0]) {
348 case MBS_COMMAND_COMPLETE:
349 /*
350 * Driver must validate login state - If PRLI not complete,
351 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
352 * requests.
353 */
354 rval = qla2x00_get_port_database(vha, fcport, 0);
355 if (rval == QLA_NOT_LOGGED_IN) {
356 fcport->flags &= ~FCF_ASYNC_SENT;
357 fcport->flags |= FCF_LOGIN_NEEDED;
358 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
359 break;
360 }
361
362 if (rval != QLA_SUCCESS) {
363 qla2x00_post_async_logout_work(vha, fcport, NULL);
364 qla2x00_post_async_login_work(vha, fcport, NULL);
365 break;
366 }
367 if (fcport->flags & FCF_FCP2_DEVICE) {
368 qla2x00_post_async_adisc_work(vha, fcport, data);
369 break;
370 }
371 qla2x00_update_fcport(vha, fcport);
372 break;
373 case MBS_COMMAND_ERROR:
374 fcport->flags &= ~FCF_ASYNC_SENT;
375 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
376 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
377 else
378 qla2x00_mark_device_lost(vha, fcport, 1, 0);
379 break;
380 case MBS_PORT_ID_USED:
381 fcport->loop_id = data[1];
382 qla2x00_post_async_logout_work(vha, fcport, NULL);
383 qla2x00_post_async_login_work(vha, fcport, NULL);
384 break;
385 case MBS_LOOP_ID_USED:
386 fcport->loop_id++;
387 rval = qla2x00_find_new_loop_id(vha, fcport);
388 if (rval != QLA_SUCCESS) {
389 fcport->flags &= ~FCF_ASYNC_SENT;
390 qla2x00_mark_device_lost(vha, fcport, 1, 0);
391 break;
392 }
393 qla2x00_post_async_login_work(vha, fcport, NULL);
394 break;
395 }
396 return;
397 }
398
399 void
400 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
401 uint16_t *data)
402 {
403 qla2x00_mark_device_lost(vha, fcport, 1, 0);
404 return;
405 }
406
407 void
408 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
409 uint16_t *data)
410 {
411 if (data[0] == MBS_COMMAND_COMPLETE) {
412 qla2x00_update_fcport(vha, fcport);
413
414 return;
415 }
416
417 /* Retry login. */
418 fcport->flags &= ~FCF_ASYNC_SENT;
419 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
420 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
421 else
422 qla2x00_mark_device_lost(vha, fcport, 1, 0);
423
424 return;
425 }
426
427 /****************************************************************************/
428 /* QLogic ISP2x00 Hardware Support Functions. */
429 /****************************************************************************/
430
431 static int
432 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
433 {
434 int rval = QLA_SUCCESS;
435 struct qla_hw_data *ha = vha->hw;
436 uint32_t idc_major_ver, idc_minor_ver;
437 uint16_t config[4];
438
439 qla83xx_idc_lock(vha, 0);
440
441 /* SV: TODO: Assign initialization timeout from
442 * flash-info / other param
443 */
444 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
445 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
446
447 /* Set our fcoe function presence */
448 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
449 ql_dbg(ql_dbg_p3p, vha, 0xb077,
450 "Error while setting DRV-Presence.\n");
451 rval = QLA_FUNCTION_FAILED;
452 goto exit;
453 }
454
455 /* Decide the reset ownership */
456 qla83xx_reset_ownership(vha);
457
458 /*
459 * On first protocol driver load:
460 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
461 * register.
462 * Others: Check compatibility with current IDC Major version.
463 */
464 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
465 if (ha->flags.nic_core_reset_owner) {
466 /* Set IDC Major version */
467 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
468 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
469
470 /* Clearing IDC-Lock-Recovery register */
471 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
472 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
473 /*
474 * Clear further IDC participation if we are not compatible with
475 * the current IDC Major Version.
476 */
477 ql_log(ql_log_warn, vha, 0xb07d,
478 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
479 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
480 __qla83xx_clear_drv_presence(vha);
481 rval = QLA_FUNCTION_FAILED;
482 goto exit;
483 }
484 /* Each function sets its supported Minor version. */
485 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
486 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
487 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
488
489 if (ha->flags.nic_core_reset_owner) {
490 memset(config, 0, sizeof(config));
491 if (!qla81xx_get_port_config(vha, config))
492 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
493 QLA8XXX_DEV_READY);
494 }
495
496 rval = qla83xx_idc_state_handler(vha);
497
498 exit:
499 qla83xx_idc_unlock(vha, 0);
500
501 return rval;
502 }
503
504 /*
505 * qla2x00_initialize_adapter
506 * Initialize board.
507 *
508 * Input:
509 * ha = adapter block pointer.
510 *
511 * Returns:
512 * 0 = success
513 */
514 int
515 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
516 {
517 int rval;
518 struct qla_hw_data *ha = vha->hw;
519 struct req_que *req = ha->req_q_map[0];
520
521 /* Clear adapter flags. */
522 vha->flags.online = 0;
523 ha->flags.chip_reset_done = 0;
524 vha->flags.reset_active = 0;
525 ha->flags.pci_channel_io_perm_failure = 0;
526 ha->flags.eeh_busy = 0;
527 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
528 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
529 atomic_set(&vha->loop_state, LOOP_DOWN);
530 vha->device_flags = DFLG_NO_CABLE;
531 vha->dpc_flags = 0;
532 vha->flags.management_server_logged_in = 0;
533 vha->marker_needed = 0;
534 ha->isp_abort_cnt = 0;
535 ha->beacon_blink_led = 0;
536
537 set_bit(0, ha->req_qid_map);
538 set_bit(0, ha->rsp_qid_map);
539
540 ql_dbg(ql_dbg_init, vha, 0x0040,
541 "Configuring PCI space...\n");
542 rval = ha->isp_ops->pci_config(vha);
543 if (rval) {
544 ql_log(ql_log_warn, vha, 0x0044,
545 "Unable to configure PCI space.\n");
546 return (rval);
547 }
548
549 ha->isp_ops->reset_chip(vha);
550
551 rval = qla2xxx_get_flash_info(vha);
552 if (rval) {
553 ql_log(ql_log_fatal, vha, 0x004f,
554 "Unable to validate FLASH data.\n");
555 return rval;
556 }
557
558 if (IS_QLA8044(ha)) {
559 qla8044_read_reset_template(vha);
560
561 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
562 * If DONRESET_BIT0 is set, drivers should not set dev_state
563 * to NEED_RESET. But if NEED_RESET is set, drivers should
564 * should honor the reset. */
565 if (ql2xdontresethba == 1)
566 qla8044_set_idc_dontreset(vha);
567 }
568
569 ha->isp_ops->get_flash_version(vha, req->ring);
570 ql_dbg(ql_dbg_init, vha, 0x0061,
571 "Configure NVRAM parameters...\n");
572
573 ha->isp_ops->nvram_config(vha);
574
575 if (ha->flags.disable_serdes) {
576 /* Mask HBA via NVRAM settings? */
577 ql_log(ql_log_info, vha, 0x0077,
578 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
579 return QLA_FUNCTION_FAILED;
580 }
581
582 ql_dbg(ql_dbg_init, vha, 0x0078,
583 "Verifying loaded RISC code...\n");
584
585 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
586 rval = ha->isp_ops->chip_diag(vha);
587 if (rval)
588 return (rval);
589 rval = qla2x00_setup_chip(vha);
590 if (rval)
591 return (rval);
592 }
593
594 if (IS_QLA84XX(ha)) {
595 ha->cs84xx = qla84xx_get_chip(vha);
596 if (!ha->cs84xx) {
597 ql_log(ql_log_warn, vha, 0x00d0,
598 "Unable to configure ISP84XX.\n");
599 return QLA_FUNCTION_FAILED;
600 }
601 }
602
603 if (qla_ini_mode_enabled(vha))
604 rval = qla2x00_init_rings(vha);
605
606 ha->flags.chip_reset_done = 1;
607
608 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
609 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
610 rval = qla84xx_init_chip(vha);
611 if (rval != QLA_SUCCESS) {
612 ql_log(ql_log_warn, vha, 0x00d4,
613 "Unable to initialize ISP84XX.\n");
614 qla84xx_put_chip(vha);
615 }
616 }
617
618 /* Load the NIC Core f/w if we are the first protocol driver. */
619 if (IS_QLA8031(ha)) {
620 rval = qla83xx_nic_core_fw_load(vha);
621 if (rval)
622 ql_log(ql_log_warn, vha, 0x0124,
623 "Error in initializing NIC Core f/w.\n");
624 }
625
626 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
627 qla24xx_read_fcp_prio_cfg(vha);
628
629 if (IS_P3P_TYPE(ha))
630 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
631 else
632 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
633
634 return (rval);
635 }
636
637 /**
638 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
639 * @ha: HA context
640 *
641 * Returns 0 on success.
642 */
643 int
644 qla2100_pci_config(scsi_qla_host_t *vha)
645 {
646 uint16_t w;
647 unsigned long flags;
648 struct qla_hw_data *ha = vha->hw;
649 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
650
651 pci_set_master(ha->pdev);
652 pci_try_set_mwi(ha->pdev);
653
654 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
655 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
656 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
657
658 pci_disable_rom(ha->pdev);
659
660 /* Get PCI bus information. */
661 spin_lock_irqsave(&ha->hardware_lock, flags);
662 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
663 spin_unlock_irqrestore(&ha->hardware_lock, flags);
664
665 return QLA_SUCCESS;
666 }
667
668 /**
669 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
670 * @ha: HA context
671 *
672 * Returns 0 on success.
673 */
674 int
675 qla2300_pci_config(scsi_qla_host_t *vha)
676 {
677 uint16_t w;
678 unsigned long flags = 0;
679 uint32_t cnt;
680 struct qla_hw_data *ha = vha->hw;
681 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
682
683 pci_set_master(ha->pdev);
684 pci_try_set_mwi(ha->pdev);
685
686 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
687 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
688
689 if (IS_QLA2322(ha) || IS_QLA6322(ha))
690 w &= ~PCI_COMMAND_INTX_DISABLE;
691 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
692
693 /*
694 * If this is a 2300 card and not 2312, reset the
695 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
696 * the 2310 also reports itself as a 2300 so we need to get the
697 * fb revision level -- a 6 indicates it really is a 2300 and
698 * not a 2310.
699 */
700 if (IS_QLA2300(ha)) {
701 spin_lock_irqsave(&ha->hardware_lock, flags);
702
703 /* Pause RISC. */
704 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
705 for (cnt = 0; cnt < 30000; cnt++) {
706 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
707 break;
708
709 udelay(10);
710 }
711
712 /* Select FPM registers. */
713 WRT_REG_WORD(&reg->ctrl_status, 0x20);
714 RD_REG_WORD(&reg->ctrl_status);
715
716 /* Get the fb rev level */
717 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
718
719 if (ha->fb_rev == FPM_2300)
720 pci_clear_mwi(ha->pdev);
721
722 /* Deselect FPM registers. */
723 WRT_REG_WORD(&reg->ctrl_status, 0x0);
724 RD_REG_WORD(&reg->ctrl_status);
725
726 /* Release RISC module. */
727 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
728 for (cnt = 0; cnt < 30000; cnt++) {
729 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
730 break;
731
732 udelay(10);
733 }
734
735 spin_unlock_irqrestore(&ha->hardware_lock, flags);
736 }
737
738 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
739
740 pci_disable_rom(ha->pdev);
741
742 /* Get PCI bus information. */
743 spin_lock_irqsave(&ha->hardware_lock, flags);
744 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
745 spin_unlock_irqrestore(&ha->hardware_lock, flags);
746
747 return QLA_SUCCESS;
748 }
749
750 /**
751 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
752 * @ha: HA context
753 *
754 * Returns 0 on success.
755 */
756 int
757 qla24xx_pci_config(scsi_qla_host_t *vha)
758 {
759 uint16_t w;
760 unsigned long flags = 0;
761 struct qla_hw_data *ha = vha->hw;
762 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
763
764 pci_set_master(ha->pdev);
765 pci_try_set_mwi(ha->pdev);
766
767 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
768 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
769 w &= ~PCI_COMMAND_INTX_DISABLE;
770 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
771
772 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
773
774 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
775 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
776 pcix_set_mmrbc(ha->pdev, 2048);
777
778 /* PCIe -- adjust Maximum Read Request Size (2048). */
779 if (pci_is_pcie(ha->pdev))
780 pcie_set_readrq(ha->pdev, 4096);
781
782 pci_disable_rom(ha->pdev);
783
784 ha->chip_revision = ha->pdev->revision;
785
786 /* Get PCI bus information. */
787 spin_lock_irqsave(&ha->hardware_lock, flags);
788 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
789 spin_unlock_irqrestore(&ha->hardware_lock, flags);
790
791 return QLA_SUCCESS;
792 }
793
794 /**
795 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
796 * @ha: HA context
797 *
798 * Returns 0 on success.
799 */
800 int
801 qla25xx_pci_config(scsi_qla_host_t *vha)
802 {
803 uint16_t w;
804 struct qla_hw_data *ha = vha->hw;
805
806 pci_set_master(ha->pdev);
807 pci_try_set_mwi(ha->pdev);
808
809 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
810 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
811 w &= ~PCI_COMMAND_INTX_DISABLE;
812 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
813
814 /* PCIe -- adjust Maximum Read Request Size (2048). */
815 if (pci_is_pcie(ha->pdev))
816 pcie_set_readrq(ha->pdev, 4096);
817
818 pci_disable_rom(ha->pdev);
819
820 ha->chip_revision = ha->pdev->revision;
821
822 return QLA_SUCCESS;
823 }
824
825 /**
826 * qla2x00_isp_firmware() - Choose firmware image.
827 * @ha: HA context
828 *
829 * Returns 0 on success.
830 */
831 static int
832 qla2x00_isp_firmware(scsi_qla_host_t *vha)
833 {
834 int rval;
835 uint16_t loop_id, topo, sw_cap;
836 uint8_t domain, area, al_pa;
837 struct qla_hw_data *ha = vha->hw;
838
839 /* Assume loading risc code */
840 rval = QLA_FUNCTION_FAILED;
841
842 if (ha->flags.disable_risc_code_load) {
843 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
844
845 /* Verify checksum of loaded RISC code. */
846 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
847 if (rval == QLA_SUCCESS) {
848 /* And, verify we are not in ROM code. */
849 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
850 &area, &domain, &topo, &sw_cap);
851 }
852 }
853
854 if (rval)
855 ql_dbg(ql_dbg_init, vha, 0x007a,
856 "**** Load RISC code ****.\n");
857
858 return (rval);
859 }
860
861 /**
862 * qla2x00_reset_chip() - Reset ISP chip.
863 * @ha: HA context
864 *
865 * Returns 0 on success.
866 */
867 void
868 qla2x00_reset_chip(scsi_qla_host_t *vha)
869 {
870 unsigned long flags = 0;
871 struct qla_hw_data *ha = vha->hw;
872 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
873 uint32_t cnt;
874 uint16_t cmd;
875
876 if (unlikely(pci_channel_offline(ha->pdev)))
877 return;
878
879 ha->isp_ops->disable_intrs(ha);
880
881 spin_lock_irqsave(&ha->hardware_lock, flags);
882
883 /* Turn off master enable */
884 cmd = 0;
885 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
886 cmd &= ~PCI_COMMAND_MASTER;
887 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
888
889 if (!IS_QLA2100(ha)) {
890 /* Pause RISC. */
891 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
892 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
893 for (cnt = 0; cnt < 30000; cnt++) {
894 if ((RD_REG_WORD(&reg->hccr) &
895 HCCR_RISC_PAUSE) != 0)
896 break;
897 udelay(100);
898 }
899 } else {
900 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
901 udelay(10);
902 }
903
904 /* Select FPM registers. */
905 WRT_REG_WORD(&reg->ctrl_status, 0x20);
906 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
907
908 /* FPM Soft Reset. */
909 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
910 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
911
912 /* Toggle Fpm Reset. */
913 if (!IS_QLA2200(ha)) {
914 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
915 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
916 }
917
918 /* Select frame buffer registers. */
919 WRT_REG_WORD(&reg->ctrl_status, 0x10);
920 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
921
922 /* Reset frame buffer FIFOs. */
923 if (IS_QLA2200(ha)) {
924 WRT_FB_CMD_REG(ha, reg, 0xa000);
925 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
926 } else {
927 WRT_FB_CMD_REG(ha, reg, 0x00fc);
928
929 /* Read back fb_cmd until zero or 3 seconds max */
930 for (cnt = 0; cnt < 3000; cnt++) {
931 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
932 break;
933 udelay(100);
934 }
935 }
936
937 /* Select RISC module registers. */
938 WRT_REG_WORD(&reg->ctrl_status, 0);
939 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
940
941 /* Reset RISC processor. */
942 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
943 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
944
945 /* Release RISC processor. */
946 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
947 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
948 }
949
950 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
951 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
952
953 /* Reset ISP chip. */
954 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
955
956 /* Wait for RISC to recover from reset. */
957 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
958 /*
959 * It is necessary to for a delay here since the card doesn't
960 * respond to PCI reads during a reset. On some architectures
961 * this will result in an MCA.
962 */
963 udelay(20);
964 for (cnt = 30000; cnt; cnt--) {
965 if ((RD_REG_WORD(&reg->ctrl_status) &
966 CSR_ISP_SOFT_RESET) == 0)
967 break;
968 udelay(100);
969 }
970 } else
971 udelay(10);
972
973 /* Reset RISC processor. */
974 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
975
976 WRT_REG_WORD(&reg->semaphore, 0);
977
978 /* Release RISC processor. */
979 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
980 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
981
982 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
983 for (cnt = 0; cnt < 30000; cnt++) {
984 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
985 break;
986
987 udelay(100);
988 }
989 } else
990 udelay(100);
991
992 /* Turn on master enable */
993 cmd |= PCI_COMMAND_MASTER;
994 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
995
996 /* Disable RISC pause on FPM parity error. */
997 if (!IS_QLA2100(ha)) {
998 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
999 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
1000 }
1001
1002 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1003 }
1004
1005 /**
1006 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
1007 *
1008 * Returns 0 on success.
1009 */
1010 static int
1011 qla81xx_reset_mpi(scsi_qla_host_t *vha)
1012 {
1013 uint16_t mb[4] = {0x1010, 0, 1, 0};
1014
1015 if (!IS_QLA81XX(vha->hw))
1016 return QLA_SUCCESS;
1017
1018 return qla81xx_write_mpi_register(vha, mb);
1019 }
1020
1021 /**
1022 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
1023 * @ha: HA context
1024 *
1025 * Returns 0 on success.
1026 */
1027 static inline void
1028 qla24xx_reset_risc(scsi_qla_host_t *vha)
1029 {
1030 unsigned long flags = 0;
1031 struct qla_hw_data *ha = vha->hw;
1032 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1033 uint32_t cnt, d2;
1034 uint16_t wd;
1035 static int abts_cnt; /* ISP abort retry counts */
1036
1037 spin_lock_irqsave(&ha->hardware_lock, flags);
1038
1039 /* Reset RISC. */
1040 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
1041 for (cnt = 0; cnt < 30000; cnt++) {
1042 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
1043 break;
1044
1045 udelay(10);
1046 }
1047
1048 WRT_REG_DWORD(&reg->ctrl_status,
1049 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
1050 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
1051
1052 udelay(100);
1053 /* Wait for firmware to complete NVRAM accesses. */
1054 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1055 for (cnt = 10000 ; cnt && d2; cnt--) {
1056 udelay(5);
1057 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1058 barrier();
1059 }
1060
1061 /* Wait for soft-reset to complete. */
1062 d2 = RD_REG_DWORD(&reg->ctrl_status);
1063 for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
1064 udelay(5);
1065 d2 = RD_REG_DWORD(&reg->ctrl_status);
1066 barrier();
1067 }
1068
1069 /* If required, do an MPI FW reset now */
1070 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
1071 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
1072 if (++abts_cnt < 5) {
1073 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1074 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
1075 } else {
1076 /*
1077 * We exhausted the ISP abort retries. We have to
1078 * set the board offline.
1079 */
1080 abts_cnt = 0;
1081 vha->flags.online = 0;
1082 }
1083 }
1084 }
1085
1086 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
1087 RD_REG_DWORD(&reg->hccr);
1088
1089 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
1090 RD_REG_DWORD(&reg->hccr);
1091
1092 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
1093 RD_REG_DWORD(&reg->hccr);
1094
1095 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1096 for (cnt = 6000000 ; cnt && d2; cnt--) {
1097 udelay(5);
1098 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1099 barrier();
1100 }
1101
1102 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1103
1104 if (IS_NOPOLLING_TYPE(ha))
1105 ha->isp_ops->enable_intrs(ha);
1106 }
1107
1108 static void
1109 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
1110 {
1111 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
1112
1113 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
1114 *data = RD_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET);
1115
1116 }
1117
1118 static void
1119 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
1120 {
1121 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
1122
1123 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
1124 WRT_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
1125 }
1126
1127 static void
1128 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
1129 {
1130 struct qla_hw_data *ha = vha->hw;
1131 uint32_t wd32 = 0;
1132 uint delta_msec = 100;
1133 uint elapsed_msec = 0;
1134 uint timeout_msec;
1135 ulong n;
1136
1137 if (!IS_QLA25XX(ha) && !IS_QLA2031(ha))
1138 return;
1139
1140 attempt:
1141 timeout_msec = TIMEOUT_SEMAPHORE;
1142 n = timeout_msec / delta_msec;
1143 while (n--) {
1144 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
1145 qla25xx_read_risc_sema_reg(vha, &wd32);
1146 if (wd32 & RISC_SEMAPHORE)
1147 break;
1148 msleep(delta_msec);
1149 elapsed_msec += delta_msec;
1150 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
1151 goto force;
1152 }
1153
1154 if (!(wd32 & RISC_SEMAPHORE))
1155 goto force;
1156
1157 if (!(wd32 & RISC_SEMAPHORE_FORCE))
1158 goto acquired;
1159
1160 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
1161 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
1162 n = timeout_msec / delta_msec;
1163 while (n--) {
1164 qla25xx_read_risc_sema_reg(vha, &wd32);
1165 if (!(wd32 & RISC_SEMAPHORE_FORCE))
1166 break;
1167 msleep(delta_msec);
1168 elapsed_msec += delta_msec;
1169 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
1170 goto force;
1171 }
1172
1173 if (wd32 & RISC_SEMAPHORE_FORCE)
1174 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
1175
1176 goto attempt;
1177
1178 force:
1179 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
1180
1181 acquired:
1182 return;
1183 }
1184
1185 /**
1186 * qla24xx_reset_chip() - Reset ISP24xx chip.
1187 * @ha: HA context
1188 *
1189 * Returns 0 on success.
1190 */
1191 void
1192 qla24xx_reset_chip(scsi_qla_host_t *vha)
1193 {
1194 struct qla_hw_data *ha = vha->hw;
1195
1196 if (pci_channel_offline(ha->pdev) &&
1197 ha->flags.pci_channel_io_perm_failure) {
1198 return;
1199 }
1200
1201 ha->isp_ops->disable_intrs(ha);
1202
1203 qla25xx_manipulate_risc_semaphore(vha);
1204
1205 /* Perform RISC reset. */
1206 qla24xx_reset_risc(vha);
1207 }
1208
1209 /**
1210 * qla2x00_chip_diag() - Test chip for proper operation.
1211 * @ha: HA context
1212 *
1213 * Returns 0 on success.
1214 */
1215 int
1216 qla2x00_chip_diag(scsi_qla_host_t *vha)
1217 {
1218 int rval;
1219 struct qla_hw_data *ha = vha->hw;
1220 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1221 unsigned long flags = 0;
1222 uint16_t data;
1223 uint32_t cnt;
1224 uint16_t mb[5];
1225 struct req_que *req = ha->req_q_map[0];
1226
1227 /* Assume a failed state */
1228 rval = QLA_FUNCTION_FAILED;
1229
1230 ql_dbg(ql_dbg_init, vha, 0x007b,
1231 "Testing device at %lx.\n", (u_long)&reg->flash_address);
1232
1233 spin_lock_irqsave(&ha->hardware_lock, flags);
1234
1235 /* Reset ISP chip. */
1236 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
1237
1238 /*
1239 * We need to have a delay here since the card will not respond while
1240 * in reset causing an MCA on some architectures.
1241 */
1242 udelay(20);
1243 data = qla2x00_debounce_register(&reg->ctrl_status);
1244 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
1245 udelay(5);
1246 data = RD_REG_WORD(&reg->ctrl_status);
1247 barrier();
1248 }
1249
1250 if (!cnt)
1251 goto chip_diag_failed;
1252
1253 ql_dbg(ql_dbg_init, vha, 0x007c,
1254 "Reset register cleared by chip reset.\n");
1255
1256 /* Reset RISC processor. */
1257 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
1258 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1259
1260 /* Workaround for QLA2312 PCI parity error */
1261 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1262 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
1263 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
1264 udelay(5);
1265 data = RD_MAILBOX_REG(ha, reg, 0);
1266 barrier();
1267 }
1268 } else
1269 udelay(10);
1270
1271 if (!cnt)
1272 goto chip_diag_failed;
1273
1274 /* Check product ID of chip */
1275 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n");
1276
1277 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
1278 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
1279 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
1280 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
1281 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
1282 mb[3] != PROD_ID_3) {
1283 ql_log(ql_log_warn, vha, 0x0062,
1284 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
1285 mb[1], mb[2], mb[3]);
1286
1287 goto chip_diag_failed;
1288 }
1289 ha->product_id[0] = mb[1];
1290 ha->product_id[1] = mb[2];
1291 ha->product_id[2] = mb[3];
1292 ha->product_id[3] = mb[4];
1293
1294 /* Adjust fw RISC transfer size */
1295 if (req->length > 1024)
1296 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
1297 else
1298 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
1299 req->length;
1300
1301 if (IS_QLA2200(ha) &&
1302 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
1303 /* Limit firmware transfer size with a 2200A */
1304 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
1305
1306 ha->device_type |= DT_ISP2200A;
1307 ha->fw_transfer_size = 128;
1308 }
1309
1310 /* Wrap Incoming Mailboxes Test. */
1311 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1312
1313 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
1314 rval = qla2x00_mbx_reg_test(vha);
1315 if (rval)
1316 ql_log(ql_log_warn, vha, 0x0080,
1317 "Failed mailbox send register test.\n");
1318 else
1319 /* Flag a successful rval */
1320 rval = QLA_SUCCESS;
1321 spin_lock_irqsave(&ha->hardware_lock, flags);
1322
1323 chip_diag_failed:
1324 if (rval)
1325 ql_log(ql_log_info, vha, 0x0081,
1326 "Chip diagnostics **** FAILED ****.\n");
1327
1328 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1329
1330 return (rval);
1331 }
1332
1333 /**
1334 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
1335 * @ha: HA context
1336 *
1337 * Returns 0 on success.
1338 */
1339 int
1340 qla24xx_chip_diag(scsi_qla_host_t *vha)
1341 {
1342 int rval;
1343 struct qla_hw_data *ha = vha->hw;
1344 struct req_que *req = ha->req_q_map[0];
1345
1346 if (IS_P3P_TYPE(ha))
1347 return QLA_SUCCESS;
1348
1349 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
1350
1351 rval = qla2x00_mbx_reg_test(vha);
1352 if (rval) {
1353 ql_log(ql_log_warn, vha, 0x0082,
1354 "Failed mailbox send register test.\n");
1355 } else {
1356 /* Flag a successful rval */
1357 rval = QLA_SUCCESS;
1358 }
1359
1360 return rval;
1361 }
1362
1363 void
1364 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
1365 {
1366 int rval;
1367 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
1368 eft_size, fce_size, mq_size;
1369 dma_addr_t tc_dma;
1370 void *tc;
1371 struct qla_hw_data *ha = vha->hw;
1372 struct req_que *req = ha->req_q_map[0];
1373 struct rsp_que *rsp = ha->rsp_q_map[0];
1374
1375 if (ha->fw_dump) {
1376 ql_dbg(ql_dbg_init, vha, 0x00bd,
1377 "Firmware dump already allocated.\n");
1378 return;
1379 }
1380
1381 ha->fw_dumped = 0;
1382 fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
1383 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
1384 fixed_size = sizeof(struct qla2100_fw_dump);
1385 } else if (IS_QLA23XX(ha)) {
1386 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
1387 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
1388 sizeof(uint16_t);
1389 } else if (IS_FWI2_CAPABLE(ha)) {
1390 if (IS_QLA83XX(ha))
1391 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
1392 else if (IS_QLA81XX(ha))
1393 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
1394 else if (IS_QLA25XX(ha))
1395 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
1396 else
1397 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
1398 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
1399 sizeof(uint32_t);
1400 if (ha->mqenable) {
1401 if (!IS_QLA83XX(ha))
1402 mq_size = sizeof(struct qla2xxx_mq_chain);
1403 /*
1404 * Allocate maximum buffer size for all queues.
1405 * Resizing must be done at end-of-dump processing.
1406 */
1407 mq_size += ha->max_req_queues *
1408 (req->length * sizeof(request_t));
1409 mq_size += ha->max_rsp_queues *
1410 (rsp->length * sizeof(response_t));
1411 }
1412 if (ha->tgt.atio_ring)
1413 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
1414 /* Allocate memory for Fibre Channel Event Buffer. */
1415 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha))
1416 goto try_eft;
1417
1418 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
1419 GFP_KERNEL);
1420 if (!tc) {
1421 ql_log(ql_log_warn, vha, 0x00be,
1422 "Unable to allocate (%d KB) for FCE.\n",
1423 FCE_SIZE / 1024);
1424 goto try_eft;
1425 }
1426
1427 memset(tc, 0, FCE_SIZE);
1428 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
1429 ha->fce_mb, &ha->fce_bufs);
1430 if (rval) {
1431 ql_log(ql_log_warn, vha, 0x00bf,
1432 "Unable to initialize FCE (%d).\n", rval);
1433 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
1434 tc_dma);
1435 ha->flags.fce_enabled = 0;
1436 goto try_eft;
1437 }
1438 ql_dbg(ql_dbg_init, vha, 0x00c0,
1439 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
1440
1441 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
1442 ha->flags.fce_enabled = 1;
1443 ha->fce_dma = tc_dma;
1444 ha->fce = tc;
1445 try_eft:
1446 /* Allocate memory for Extended Trace Buffer. */
1447 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
1448 GFP_KERNEL);
1449 if (!tc) {
1450 ql_log(ql_log_warn, vha, 0x00c1,
1451 "Unable to allocate (%d KB) for EFT.\n",
1452 EFT_SIZE / 1024);
1453 goto cont_alloc;
1454 }
1455
1456 memset(tc, 0, EFT_SIZE);
1457 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
1458 if (rval) {
1459 ql_log(ql_log_warn, vha, 0x00c2,
1460 "Unable to initialize EFT (%d).\n", rval);
1461 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
1462 tc_dma);
1463 goto cont_alloc;
1464 }
1465 ql_dbg(ql_dbg_init, vha, 0x00c3,
1466 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
1467
1468 eft_size = EFT_SIZE;
1469 ha->eft_dma = tc_dma;
1470 ha->eft = tc;
1471 }
1472 cont_alloc:
1473 req_q_size = req->length * sizeof(request_t);
1474 rsp_q_size = rsp->length * sizeof(response_t);
1475
1476 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
1477 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
1478 ha->chain_offset = dump_size;
1479 dump_size += mq_size + fce_size;
1480
1481 ha->fw_dump = vmalloc(dump_size);
1482 if (!ha->fw_dump) {
1483 ql_log(ql_log_warn, vha, 0x00c4,
1484 "Unable to allocate (%d KB) for firmware dump.\n",
1485 dump_size / 1024);
1486
1487 if (ha->fce) {
1488 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
1489 ha->fce_dma);
1490 ha->fce = NULL;
1491 ha->fce_dma = 0;
1492 }
1493
1494 if (ha->eft) {
1495 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
1496 ha->eft_dma);
1497 ha->eft = NULL;
1498 ha->eft_dma = 0;
1499 }
1500 return;
1501 }
1502 ql_dbg(ql_dbg_init, vha, 0x00c5,
1503 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024);
1504
1505 ha->fw_dump_len = dump_size;
1506 ha->fw_dump->signature[0] = 'Q';
1507 ha->fw_dump->signature[1] = 'L';
1508 ha->fw_dump->signature[2] = 'G';
1509 ha->fw_dump->signature[3] = 'C';
1510 ha->fw_dump->version = __constant_htonl(1);
1511
1512 ha->fw_dump->fixed_size = htonl(fixed_size);
1513 ha->fw_dump->mem_size = htonl(mem_size);
1514 ha->fw_dump->req_q_size = htonl(req_q_size);
1515 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
1516
1517 ha->fw_dump->eft_size = htonl(eft_size);
1518 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
1519 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
1520
1521 ha->fw_dump->header_size =
1522 htonl(offsetof(struct qla2xxx_fw_dump, isp));
1523 }
1524
1525 static int
1526 qla81xx_mpi_sync(scsi_qla_host_t *vha)
1527 {
1528 #define MPS_MASK 0xe0
1529 int rval;
1530 uint16_t dc;
1531 uint32_t dw;
1532
1533 if (!IS_QLA81XX(vha->hw))
1534 return QLA_SUCCESS;
1535
1536 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
1537 if (rval != QLA_SUCCESS) {
1538 ql_log(ql_log_warn, vha, 0x0105,
1539 "Unable to acquire semaphore.\n");
1540 goto done;
1541 }
1542
1543 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
1544 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
1545 if (rval != QLA_SUCCESS) {
1546 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
1547 goto done_release;
1548 }
1549
1550 dc &= MPS_MASK;
1551 if (dc == (dw & MPS_MASK))
1552 goto done_release;
1553
1554 dw &= ~MPS_MASK;
1555 dw |= dc;
1556 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
1557 if (rval != QLA_SUCCESS) {
1558 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
1559 }
1560
1561 done_release:
1562 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
1563 if (rval != QLA_SUCCESS) {
1564 ql_log(ql_log_warn, vha, 0x006d,
1565 "Unable to release semaphore.\n");
1566 }
1567
1568 done:
1569 return rval;
1570 }
1571
1572 int
1573 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
1574 {
1575 /* Don't try to reallocate the array */
1576 if (req->outstanding_cmds)
1577 return QLA_SUCCESS;
1578
1579 if (!IS_FWI2_CAPABLE(ha) || (ha->mqiobase &&
1580 (ql2xmultique_tag || ql2xmaxqueues > 1)))
1581 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
1582 else {
1583 if (ha->fw_xcb_count <= ha->fw_iocb_count)
1584 req->num_outstanding_cmds = ha->fw_xcb_count;
1585 else
1586 req->num_outstanding_cmds = ha->fw_iocb_count;
1587 }
1588
1589 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
1590 req->num_outstanding_cmds, GFP_KERNEL);
1591
1592 if (!req->outstanding_cmds) {
1593 /*
1594 * Try to allocate a minimal size just so we can get through
1595 * initialization.
1596 */
1597 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
1598 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
1599 req->num_outstanding_cmds, GFP_KERNEL);
1600
1601 if (!req->outstanding_cmds) {
1602 ql_log(ql_log_fatal, NULL, 0x0126,
1603 "Failed to allocate memory for "
1604 "outstanding_cmds for req_que %p.\n", req);
1605 req->num_outstanding_cmds = 0;
1606 return QLA_FUNCTION_FAILED;
1607 }
1608 }
1609
1610 return QLA_SUCCESS;
1611 }
1612
1613 /**
1614 * qla2x00_setup_chip() - Load and start RISC firmware.
1615 * @ha: HA context
1616 *
1617 * Returns 0 on success.
1618 */
1619 static int
1620 qla2x00_setup_chip(scsi_qla_host_t *vha)
1621 {
1622 int rval;
1623 uint32_t srisc_address = 0;
1624 struct qla_hw_data *ha = vha->hw;
1625 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1626 unsigned long flags;
1627 uint16_t fw_major_version;
1628
1629 if (IS_P3P_TYPE(ha)) {
1630 rval = ha->isp_ops->load_risc(vha, &srisc_address);
1631 if (rval == QLA_SUCCESS) {
1632 qla2x00_stop_firmware(vha);
1633 goto enable_82xx_npiv;
1634 } else
1635 goto failed;
1636 }
1637
1638 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1639 /* Disable SRAM, Instruction RAM and GP RAM parity. */
1640 spin_lock_irqsave(&ha->hardware_lock, flags);
1641 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
1642 RD_REG_WORD(&reg->hccr);
1643 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1644 }
1645
1646 qla81xx_mpi_sync(vha);
1647
1648 /* Load firmware sequences */
1649 rval = ha->isp_ops->load_risc(vha, &srisc_address);
1650 if (rval == QLA_SUCCESS) {
1651 ql_dbg(ql_dbg_init, vha, 0x00c9,
1652 "Verifying Checksum of loaded RISC code.\n");
1653
1654 rval = qla2x00_verify_checksum(vha, srisc_address);
1655 if (rval == QLA_SUCCESS) {
1656 /* Start firmware execution. */
1657 ql_dbg(ql_dbg_init, vha, 0x00ca,
1658 "Starting firmware.\n");
1659
1660 rval = qla2x00_execute_fw(vha, srisc_address);
1661 /* Retrieve firmware information. */
1662 if (rval == QLA_SUCCESS) {
1663 enable_82xx_npiv:
1664 fw_major_version = ha->fw_major_version;
1665 if (IS_P3P_TYPE(ha))
1666 qla82xx_check_md_needed(vha);
1667 else
1668 rval = qla2x00_get_fw_version(vha);
1669 if (rval != QLA_SUCCESS)
1670 goto failed;
1671 ha->flags.npiv_supported = 0;
1672 if (IS_QLA2XXX_MIDTYPE(ha) &&
1673 (ha->fw_attributes & BIT_2)) {
1674 ha->flags.npiv_supported = 1;
1675 if ((!ha->max_npiv_vports) ||
1676 ((ha->max_npiv_vports + 1) %
1677 MIN_MULTI_ID_FABRIC))
1678 ha->max_npiv_vports =
1679 MIN_MULTI_ID_FABRIC - 1;
1680 }
1681 qla2x00_get_resource_cnts(vha, NULL,
1682 &ha->fw_xcb_count, NULL, &ha->fw_iocb_count,
1683 &ha->max_npiv_vports, NULL);
1684
1685 /*
1686 * Allocate the array of outstanding commands
1687 * now that we know the firmware resources.
1688 */
1689 rval = qla2x00_alloc_outstanding_cmds(ha,
1690 vha->req);
1691 if (rval != QLA_SUCCESS)
1692 goto failed;
1693
1694 if (!fw_major_version && ql2xallocfwdump
1695 && !(IS_P3P_TYPE(ha)))
1696 qla2x00_alloc_fw_dump(vha);
1697 }
1698 } else {
1699 ql_log(ql_log_fatal, vha, 0x00cd,
1700 "ISP Firmware failed checksum.\n");
1701 goto failed;
1702 }
1703 } else
1704 goto failed;
1705
1706 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1707 /* Enable proper parity. */
1708 spin_lock_irqsave(&ha->hardware_lock, flags);
1709 if (IS_QLA2300(ha))
1710 /* SRAM parity */
1711 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
1712 else
1713 /* SRAM, Instruction RAM and GP RAM parity */
1714 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
1715 RD_REG_WORD(&reg->hccr);
1716 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1717 }
1718
1719 if (IS_QLA83XX(ha))
1720 goto skip_fac_check;
1721
1722 if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
1723 uint32_t size;
1724
1725 rval = qla81xx_fac_get_sector_size(vha, &size);
1726 if (rval == QLA_SUCCESS) {
1727 ha->flags.fac_supported = 1;
1728 ha->fdt_block_size = size << 2;
1729 } else {
1730 ql_log(ql_log_warn, vha, 0x00ce,
1731 "Unsupported FAC firmware (%d.%02d.%02d).\n",
1732 ha->fw_major_version, ha->fw_minor_version,
1733 ha->fw_subminor_version);
1734 skip_fac_check:
1735 if (IS_QLA83XX(ha)) {
1736 ha->flags.fac_supported = 0;
1737 rval = QLA_SUCCESS;
1738 }
1739 }
1740 }
1741 failed:
1742 if (rval) {
1743 ql_log(ql_log_fatal, vha, 0x00cf,
1744 "Setup chip ****FAILED****.\n");
1745 }
1746
1747 return (rval);
1748 }
1749
1750 /**
1751 * qla2x00_init_response_q_entries() - Initializes response queue entries.
1752 * @ha: HA context
1753 *
1754 * Beginning of request ring has initialization control block already built
1755 * by nvram config routine.
1756 *
1757 * Returns 0 on success.
1758 */
1759 void
1760 qla2x00_init_response_q_entries(struct rsp_que *rsp)
1761 {
1762 uint16_t cnt;
1763 response_t *pkt;
1764
1765 rsp->ring_ptr = rsp->ring;
1766 rsp->ring_index = 0;
1767 rsp->status_srb = NULL;
1768 pkt = rsp->ring_ptr;
1769 for (cnt = 0; cnt < rsp->length; cnt++) {
1770 pkt->signature = RESPONSE_PROCESSED;
1771 pkt++;
1772 }
1773 }
1774
1775 /**
1776 * qla2x00_update_fw_options() - Read and process firmware options.
1777 * @ha: HA context
1778 *
1779 * Returns 0 on success.
1780 */
1781 void
1782 qla2x00_update_fw_options(scsi_qla_host_t *vha)
1783 {
1784 uint16_t swing, emphasis, tx_sens, rx_sens;
1785 struct qla_hw_data *ha = vha->hw;
1786
1787 memset(ha->fw_options, 0, sizeof(ha->fw_options));
1788 qla2x00_get_fw_options(vha, ha->fw_options);
1789
1790 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1791 return;
1792
1793 /* Serial Link options. */
1794 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
1795 "Serial link options.\n");
1796 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
1797 (uint8_t *)&ha->fw_seriallink_options,
1798 sizeof(ha->fw_seriallink_options));
1799
1800 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
1801 if (ha->fw_seriallink_options[3] & BIT_2) {
1802 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
1803
1804 /* 1G settings */
1805 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
1806 emphasis = (ha->fw_seriallink_options[2] &
1807 (BIT_4 | BIT_3)) >> 3;
1808 tx_sens = ha->fw_seriallink_options[0] &
1809 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1810 rx_sens = (ha->fw_seriallink_options[0] &
1811 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1812 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
1813 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1814 if (rx_sens == 0x0)
1815 rx_sens = 0x3;
1816 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
1817 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1818 ha->fw_options[10] |= BIT_5 |
1819 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1820 (tx_sens & (BIT_1 | BIT_0));
1821
1822 /* 2G settings */
1823 swing = (ha->fw_seriallink_options[2] &
1824 (BIT_7 | BIT_6 | BIT_5)) >> 5;
1825 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
1826 tx_sens = ha->fw_seriallink_options[1] &
1827 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1828 rx_sens = (ha->fw_seriallink_options[1] &
1829 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1830 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
1831 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1832 if (rx_sens == 0x0)
1833 rx_sens = 0x3;
1834 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
1835 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1836 ha->fw_options[11] |= BIT_5 |
1837 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1838 (tx_sens & (BIT_1 | BIT_0));
1839 }
1840
1841 /* FCP2 options. */
1842 /* Return command IOCBs without waiting for an ABTS to complete. */
1843 ha->fw_options[3] |= BIT_13;
1844
1845 /* LED scheme. */
1846 if (ha->flags.enable_led_scheme)
1847 ha->fw_options[2] |= BIT_12;
1848
1849 /* Detect ISP6312. */
1850 if (IS_QLA6312(ha))
1851 ha->fw_options[2] |= BIT_13;
1852
1853 /* Update firmware options. */
1854 qla2x00_set_fw_options(vha, ha->fw_options);
1855 }
1856
1857 void
1858 qla24xx_update_fw_options(scsi_qla_host_t *vha)
1859 {
1860 int rval;
1861 struct qla_hw_data *ha = vha->hw;
1862
1863 if (IS_P3P_TYPE(ha))
1864 return;
1865
1866 /* Update Serial Link options. */
1867 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
1868 return;
1869
1870 rval = qla2x00_set_serdes_params(vha,
1871 le16_to_cpu(ha->fw_seriallink_options24[1]),
1872 le16_to_cpu(ha->fw_seriallink_options24[2]),
1873 le16_to_cpu(ha->fw_seriallink_options24[3]));
1874 if (rval != QLA_SUCCESS) {
1875 ql_log(ql_log_warn, vha, 0x0104,
1876 "Unable to update Serial Link options (%x).\n", rval);
1877 }
1878 }
1879
1880 void
1881 qla2x00_config_rings(struct scsi_qla_host *vha)
1882 {
1883 struct qla_hw_data *ha = vha->hw;
1884 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1885 struct req_que *req = ha->req_q_map[0];
1886 struct rsp_que *rsp = ha->rsp_q_map[0];
1887
1888 /* Setup ring parameters in initialization control block. */
1889 ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
1890 ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
1891 ha->init_cb->request_q_length = cpu_to_le16(req->length);
1892 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
1893 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1894 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1895 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1896 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
1897
1898 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
1899 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
1900 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
1901 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
1902 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
1903 }
1904
1905 void
1906 qla24xx_config_rings(struct scsi_qla_host *vha)
1907 {
1908 struct qla_hw_data *ha = vha->hw;
1909 device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
1910 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
1911 struct qla_msix_entry *msix;
1912 struct init_cb_24xx *icb;
1913 uint16_t rid = 0;
1914 struct req_que *req = ha->req_q_map[0];
1915 struct rsp_que *rsp = ha->rsp_q_map[0];
1916
1917 /* Setup ring parameters in initialization control block. */
1918 icb = (struct init_cb_24xx *)ha->init_cb;
1919 icb->request_q_outpointer = __constant_cpu_to_le16(0);
1920 icb->response_q_inpointer = __constant_cpu_to_le16(0);
1921 icb->request_q_length = cpu_to_le16(req->length);
1922 icb->response_q_length = cpu_to_le16(rsp->length);
1923 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1924 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1925 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1926 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
1927
1928 /* Setup ATIO queue dma pointers for target mode */
1929 icb->atio_q_inpointer = __constant_cpu_to_le16(0);
1930 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
1931 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
1932 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
1933
1934 if (ha->mqenable || IS_QLA83XX(ha)) {
1935 icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
1936 icb->rid = __constant_cpu_to_le16(rid);
1937 if (ha->flags.msix_enabled) {
1938 msix = &ha->msix_entries[1];
1939 ql_dbg(ql_dbg_init, vha, 0x00fd,
1940 "Registering vector 0x%x for base que.\n",
1941 msix->entry);
1942 icb->msix = cpu_to_le16(msix->entry);
1943 }
1944 /* Use alternate PCI bus number */
1945 if (MSB(rid))
1946 icb->firmware_options_2 |=
1947 __constant_cpu_to_le32(BIT_19);
1948 /* Use alternate PCI devfn */
1949 if (LSB(rid))
1950 icb->firmware_options_2 |=
1951 __constant_cpu_to_le32(BIT_18);
1952
1953 /* Use Disable MSIX Handshake mode for capable adapters */
1954 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
1955 (ha->flags.msix_enabled)) {
1956 icb->firmware_options_2 &=
1957 __constant_cpu_to_le32(~BIT_22);
1958 ha->flags.disable_msix_handshake = 1;
1959 ql_dbg(ql_dbg_init, vha, 0x00fe,
1960 "MSIX Handshake Disable Mode turned on.\n");
1961 } else {
1962 icb->firmware_options_2 |=
1963 __constant_cpu_to_le32(BIT_22);
1964 }
1965 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
1966
1967 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
1968 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
1969 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
1970 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
1971 } else {
1972 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
1973 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
1974 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
1975 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
1976 }
1977 qlt_24xx_config_rings(vha);
1978
1979 /* PCI posting */
1980 RD_REG_DWORD(&ioreg->hccr);
1981 }
1982
1983 /**
1984 * qla2x00_init_rings() - Initializes firmware.
1985 * @ha: HA context
1986 *
1987 * Beginning of request ring has initialization control block already built
1988 * by nvram config routine.
1989 *
1990 * Returns 0 on success.
1991 */
1992 int
1993 qla2x00_init_rings(scsi_qla_host_t *vha)
1994 {
1995 int rval;
1996 unsigned long flags = 0;
1997 int cnt, que;
1998 struct qla_hw_data *ha = vha->hw;
1999 struct req_que *req;
2000 struct rsp_que *rsp;
2001 struct mid_init_cb_24xx *mid_init_cb =
2002 (struct mid_init_cb_24xx *) ha->init_cb;
2003
2004 spin_lock_irqsave(&ha->hardware_lock, flags);
2005
2006 /* Clear outstanding commands array. */
2007 for (que = 0; que < ha->max_req_queues; que++) {
2008 req = ha->req_q_map[que];
2009 if (!req)
2010 continue;
2011 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
2012 req->outstanding_cmds[cnt] = NULL;
2013
2014 req->current_outstanding_cmd = 1;
2015
2016 /* Initialize firmware. */
2017 req->ring_ptr = req->ring;
2018 req->ring_index = 0;
2019 req->cnt = req->length;
2020 }
2021
2022 for (que = 0; que < ha->max_rsp_queues; que++) {
2023 rsp = ha->rsp_q_map[que];
2024 if (!rsp)
2025 continue;
2026 /* Initialize response queue entries */
2027 if (IS_QLAFX00(ha))
2028 qlafx00_init_response_q_entries(rsp);
2029 else
2030 qla2x00_init_response_q_entries(rsp);
2031 }
2032
2033 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
2034 ha->tgt.atio_ring_index = 0;
2035 /* Initialize ATIO queue entries */
2036 qlt_init_atio_q_entries(vha);
2037
2038 ha->isp_ops->config_rings(vha);
2039
2040 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2041
2042 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
2043
2044 if (IS_QLAFX00(ha)) {
2045 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
2046 goto next_check;
2047 }
2048
2049 /* Update any ISP specific firmware options before initialization. */
2050 ha->isp_ops->update_fw_options(vha);
2051
2052 if (ha->flags.npiv_supported) {
2053 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
2054 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
2055 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
2056 }
2057
2058 if (IS_FWI2_CAPABLE(ha)) {
2059 mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
2060 mid_init_cb->init_cb.execution_throttle =
2061 cpu_to_le16(ha->fw_xcb_count);
2062 }
2063
2064 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
2065 next_check:
2066 if (rval) {
2067 ql_log(ql_log_fatal, vha, 0x00d2,
2068 "Init Firmware **** FAILED ****.\n");
2069 } else {
2070 ql_dbg(ql_dbg_init, vha, 0x00d3,
2071 "Init Firmware -- success.\n");
2072 }
2073
2074 return (rval);
2075 }
2076
2077 /**
2078 * qla2x00_fw_ready() - Waits for firmware ready.
2079 * @ha: HA context
2080 *
2081 * Returns 0 on success.
2082 */
2083 static int
2084 qla2x00_fw_ready(scsi_qla_host_t *vha)
2085 {
2086 int rval;
2087 unsigned long wtime, mtime, cs84xx_time;
2088 uint16_t min_wait; /* Minimum wait time if loop is down */
2089 uint16_t wait_time; /* Wait time if loop is coming ready */
2090 uint16_t state[5];
2091 struct qla_hw_data *ha = vha->hw;
2092
2093 if (IS_QLAFX00(vha->hw))
2094 return qlafx00_fw_ready(vha);
2095
2096 rval = QLA_SUCCESS;
2097
2098 /* 20 seconds for loop down. */
2099 min_wait = 20;
2100
2101 /*
2102 * Firmware should take at most one RATOV to login, plus 5 seconds for
2103 * our own processing.
2104 */
2105 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
2106 wait_time = min_wait;
2107 }
2108
2109 /* Min wait time if loop down */
2110 mtime = jiffies + (min_wait * HZ);
2111
2112 /* wait time before firmware ready */
2113 wtime = jiffies + (wait_time * HZ);
2114
2115 /* Wait for ISP to finish LIP */
2116 if (!vha->flags.init_done)
2117 ql_log(ql_log_info, vha, 0x801e,
2118 "Waiting for LIP to complete.\n");
2119
2120 do {
2121 memset(state, -1, sizeof(state));
2122 rval = qla2x00_get_firmware_state(vha, state);
2123 if (rval == QLA_SUCCESS) {
2124 if (state[0] < FSTATE_LOSS_OF_SYNC) {
2125 vha->device_flags &= ~DFLG_NO_CABLE;
2126 }
2127 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
2128 ql_dbg(ql_dbg_taskm, vha, 0x801f,
2129 "fw_state=%x 84xx=%x.\n", state[0],
2130 state[2]);
2131 if ((state[2] & FSTATE_LOGGED_IN) &&
2132 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
2133 ql_dbg(ql_dbg_taskm, vha, 0x8028,
2134 "Sending verify iocb.\n");
2135
2136 cs84xx_time = jiffies;
2137 rval = qla84xx_init_chip(vha);
2138 if (rval != QLA_SUCCESS) {
2139 ql_log(ql_log_warn,
2140 vha, 0x8007,
2141 "Init chip failed.\n");
2142 break;
2143 }
2144
2145 /* Add time taken to initialize. */
2146 cs84xx_time = jiffies - cs84xx_time;
2147 wtime += cs84xx_time;
2148 mtime += cs84xx_time;
2149 ql_dbg(ql_dbg_taskm, vha, 0x8008,
2150 "Increasing wait time by %ld. "
2151 "New time %ld.\n", cs84xx_time,
2152 wtime);
2153 }
2154 } else if (state[0] == FSTATE_READY) {
2155 ql_dbg(ql_dbg_taskm, vha, 0x8037,
2156 "F/W Ready - OK.\n");
2157
2158 qla2x00_get_retry_cnt(vha, &ha->retry_count,
2159 &ha->login_timeout, &ha->r_a_tov);
2160
2161 rval = QLA_SUCCESS;
2162 break;
2163 }
2164
2165 rval = QLA_FUNCTION_FAILED;
2166
2167 if (atomic_read(&vha->loop_down_timer) &&
2168 state[0] != FSTATE_READY) {
2169 /* Loop down. Timeout on min_wait for states
2170 * other than Wait for Login.
2171 */
2172 if (time_after_eq(jiffies, mtime)) {
2173 ql_log(ql_log_info, vha, 0x8038,
2174 "Cable is unplugged...\n");
2175
2176 vha->device_flags |= DFLG_NO_CABLE;
2177 break;
2178 }
2179 }
2180 } else {
2181 /* Mailbox cmd failed. Timeout on min_wait. */
2182 if (time_after_eq(jiffies, mtime) ||
2183 ha->flags.isp82xx_fw_hung)
2184 break;
2185 }
2186
2187 if (time_after_eq(jiffies, wtime))
2188 break;
2189
2190 /* Delay for a while */
2191 msleep(500);
2192 } while (1);
2193
2194 ql_dbg(ql_dbg_taskm, vha, 0x803a,
2195 "fw_state=%x (%x, %x, %x, %x) " "curr time=%lx.\n", state[0],
2196 state[1], state[2], state[3], state[4], jiffies);
2197
2198 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
2199 ql_log(ql_log_warn, vha, 0x803b,
2200 "Firmware ready **** FAILED ****.\n");
2201 }
2202
2203 return (rval);
2204 }
2205
2206 /*
2207 * qla2x00_configure_hba
2208 * Setup adapter context.
2209 *
2210 * Input:
2211 * ha = adapter state pointer.
2212 *
2213 * Returns:
2214 * 0 = success
2215 *
2216 * Context:
2217 * Kernel context.
2218 */
2219 static int
2220 qla2x00_configure_hba(scsi_qla_host_t *vha)
2221 {
2222 int rval;
2223 uint16_t loop_id;
2224 uint16_t topo;
2225 uint16_t sw_cap;
2226 uint8_t al_pa;
2227 uint8_t area;
2228 uint8_t domain;
2229 char connect_type[22];
2230 struct qla_hw_data *ha = vha->hw;
2231 unsigned long flags;
2232 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
2233
2234 /* Get host addresses. */
2235 rval = qla2x00_get_adapter_id(vha,
2236 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
2237 if (rval != QLA_SUCCESS) {
2238 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
2239 IS_CNA_CAPABLE(ha) ||
2240 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
2241 ql_dbg(ql_dbg_disc, vha, 0x2008,
2242 "Loop is in a transition state.\n");
2243 } else {
2244 ql_log(ql_log_warn, vha, 0x2009,
2245 "Unable to get host loop ID.\n");
2246 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
2247 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
2248 ql_log(ql_log_warn, vha, 0x1151,
2249 "Doing link init.\n");
2250 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
2251 return rval;
2252 }
2253 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2254 }
2255 return (rval);
2256 }
2257
2258 if (topo == 4) {
2259 ql_log(ql_log_info, vha, 0x200a,
2260 "Cannot get topology - retrying.\n");
2261 return (QLA_FUNCTION_FAILED);
2262 }
2263
2264 vha->loop_id = loop_id;
2265
2266 /* initialize */
2267 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
2268 ha->operating_mode = LOOP;
2269 ha->switch_cap = 0;
2270
2271 switch (topo) {
2272 case 0:
2273 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
2274 ha->current_topology = ISP_CFG_NL;
2275 strcpy(connect_type, "(Loop)");
2276 break;
2277
2278 case 1:
2279 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
2280 ha->switch_cap = sw_cap;
2281 ha->current_topology = ISP_CFG_FL;
2282 strcpy(connect_type, "(FL_Port)");
2283 break;
2284
2285 case 2:
2286 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
2287 ha->operating_mode = P2P;
2288 ha->current_topology = ISP_CFG_N;
2289 strcpy(connect_type, "(N_Port-to-N_Port)");
2290 break;
2291
2292 case 3:
2293 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
2294 ha->switch_cap = sw_cap;
2295 ha->operating_mode = P2P;
2296 ha->current_topology = ISP_CFG_F;
2297 strcpy(connect_type, "(F_Port)");
2298 break;
2299
2300 default:
2301 ql_dbg(ql_dbg_disc, vha, 0x200f,
2302 "HBA in unknown topology %x, using NL.\n", topo);
2303 ha->current_topology = ISP_CFG_NL;
2304 strcpy(connect_type, "(Loop)");
2305 break;
2306 }
2307
2308 /* Save Host port and loop ID. */
2309 /* byte order - Big Endian */
2310 vha->d_id.b.domain = domain;
2311 vha->d_id.b.area = area;
2312 vha->d_id.b.al_pa = al_pa;
2313
2314 spin_lock_irqsave(&ha->vport_slock, flags);
2315 qlt_update_vp_map(vha, SET_AL_PA);
2316 spin_unlock_irqrestore(&ha->vport_slock, flags);
2317
2318 if (!vha->flags.init_done)
2319 ql_log(ql_log_info, vha, 0x2010,
2320 "Topology - %s, Host Loop address 0x%x.\n",
2321 connect_type, vha->loop_id);
2322
2323 return(rval);
2324 }
2325
2326 inline void
2327 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
2328 char *def)
2329 {
2330 char *st, *en;
2331 uint16_t index;
2332 struct qla_hw_data *ha = vha->hw;
2333 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
2334 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
2335
2336 if (memcmp(model, BINZERO, len) != 0) {
2337 strncpy(ha->model_number, model, len);
2338 st = en = ha->model_number;
2339 en += len - 1;
2340 while (en > st) {
2341 if (*en != 0x20 && *en != 0x00)
2342 break;
2343 *en-- = '\0';
2344 }
2345
2346 index = (ha->pdev->subsystem_device & 0xff);
2347 if (use_tbl &&
2348 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
2349 index < QLA_MODEL_NAMES)
2350 strncpy(ha->model_desc,
2351 qla2x00_model_name[index * 2 + 1],
2352 sizeof(ha->model_desc) - 1);
2353 } else {
2354 index = (ha->pdev->subsystem_device & 0xff);
2355 if (use_tbl &&
2356 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
2357 index < QLA_MODEL_NAMES) {
2358 strcpy(ha->model_number,
2359 qla2x00_model_name[index * 2]);
2360 strncpy(ha->model_desc,
2361 qla2x00_model_name[index * 2 + 1],
2362 sizeof(ha->model_desc) - 1);
2363 } else {
2364 strcpy(ha->model_number, def);
2365 }
2366 }
2367 if (IS_FWI2_CAPABLE(ha))
2368 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
2369 sizeof(ha->model_desc));
2370 }
2371
2372 /* On sparc systems, obtain port and node WWN from firmware
2373 * properties.
2374 */
2375 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
2376 {
2377 #ifdef CONFIG_SPARC
2378 struct qla_hw_data *ha = vha->hw;
2379 struct pci_dev *pdev = ha->pdev;
2380 struct device_node *dp = pci_device_to_OF_node(pdev);
2381 const u8 *val;
2382 int len;
2383
2384 val = of_get_property(dp, "port-wwn", &len);
2385 if (val && len >= WWN_SIZE)
2386 memcpy(nv->port_name, val, WWN_SIZE);
2387
2388 val = of_get_property(dp, "node-wwn", &len);
2389 if (val && len >= WWN_SIZE)
2390 memcpy(nv->node_name, val, WWN_SIZE);
2391 #endif
2392 }
2393
2394 /*
2395 * NVRAM configuration for ISP 2xxx
2396 *
2397 * Input:
2398 * ha = adapter block pointer.
2399 *
2400 * Output:
2401 * initialization control block in response_ring
2402 * host adapters parameters in host adapter block
2403 *
2404 * Returns:
2405 * 0 = success.
2406 */
2407 int
2408 qla2x00_nvram_config(scsi_qla_host_t *vha)
2409 {
2410 int rval;
2411 uint8_t chksum = 0;
2412 uint16_t cnt;
2413 uint8_t *dptr1, *dptr2;
2414 struct qla_hw_data *ha = vha->hw;
2415 init_cb_t *icb = ha->init_cb;
2416 nvram_t *nv = ha->nvram;
2417 uint8_t *ptr = ha->nvram;
2418 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2419
2420 rval = QLA_SUCCESS;
2421
2422 /* Determine NVRAM starting address. */
2423 ha->nvram_size = sizeof(nvram_t);
2424 ha->nvram_base = 0;
2425 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
2426 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
2427 ha->nvram_base = 0x80;
2428
2429 /* Get NVRAM data and calculate checksum. */
2430 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
2431 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
2432 chksum += *ptr++;
2433
2434 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
2435 "Contents of NVRAM.\n");
2436 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
2437 (uint8_t *)nv, ha->nvram_size);
2438
2439 /* Bad NVRAM data, set defaults parameters. */
2440 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
2441 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
2442 /* Reset NVRAM data. */
2443 ql_log(ql_log_warn, vha, 0x0064,
2444 "Inconsistent NVRAM "
2445 "detected: checksum=0x%x id=%c version=0x%x.\n",
2446 chksum, nv->id[0], nv->nvram_version);
2447 ql_log(ql_log_warn, vha, 0x0065,
2448 "Falling back to "
2449 "functioning (yet invalid -- WWPN) defaults.\n");
2450
2451 /*
2452 * Set default initialization control block.
2453 */
2454 memset(nv, 0, ha->nvram_size);
2455 nv->parameter_block_version = ICB_VERSION;
2456
2457 if (IS_QLA23XX(ha)) {
2458 nv->firmware_options[0] = BIT_2 | BIT_1;
2459 nv->firmware_options[1] = BIT_7 | BIT_5;
2460 nv->add_firmware_options[0] = BIT_5;
2461 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2462 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2463 nv->special_options[1] = BIT_7;
2464 } else if (IS_QLA2200(ha)) {
2465 nv->firmware_options[0] = BIT_2 | BIT_1;
2466 nv->firmware_options[1] = BIT_7 | BIT_5;
2467 nv->add_firmware_options[0] = BIT_5;
2468 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2469 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2470 } else if (IS_QLA2100(ha)) {
2471 nv->firmware_options[0] = BIT_3 | BIT_1;
2472 nv->firmware_options[1] = BIT_5;
2473 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2474 }
2475
2476 nv->max_iocb_allocation = __constant_cpu_to_le16(256);
2477 nv->execution_throttle = __constant_cpu_to_le16(16);
2478 nv->retry_count = 8;
2479 nv->retry_delay = 1;
2480
2481 nv->port_name[0] = 33;
2482 nv->port_name[3] = 224;
2483 nv->port_name[4] = 139;
2484
2485 qla2xxx_nvram_wwn_from_ofw(vha, nv);
2486
2487 nv->login_timeout = 4;
2488
2489 /*
2490 * Set default host adapter parameters
2491 */
2492 nv->host_p[1] = BIT_2;
2493 nv->reset_delay = 5;
2494 nv->port_down_retry_count = 8;
2495 nv->max_luns_per_target = __constant_cpu_to_le16(8);
2496 nv->link_down_timeout = 60;
2497
2498 rval = 1;
2499 }
2500
2501 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
2502 /*
2503 * The SN2 does not provide BIOS emulation which means you can't change
2504 * potentially bogus BIOS settings. Force the use of default settings
2505 * for link rate and frame size. Hope that the rest of the settings
2506 * are valid.
2507 */
2508 if (ia64_platform_is("sn2")) {
2509 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2510 if (IS_QLA23XX(ha))
2511 nv->special_options[1] = BIT_7;
2512 }
2513 #endif
2514
2515 /* Reset Initialization control block */
2516 memset(icb, 0, ha->init_cb_size);
2517
2518 /*
2519 * Setup driver NVRAM options.
2520 */
2521 nv->firmware_options[0] |= (BIT_6 | BIT_1);
2522 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
2523 nv->firmware_options[1] |= (BIT_5 | BIT_0);
2524 nv->firmware_options[1] &= ~BIT_4;
2525
2526 if (IS_QLA23XX(ha)) {
2527 nv->firmware_options[0] |= BIT_2;
2528 nv->firmware_options[0] &= ~BIT_3;
2529 nv->special_options[0] &= ~BIT_6;
2530 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
2531
2532 if (IS_QLA2300(ha)) {
2533 if (ha->fb_rev == FPM_2310) {
2534 strcpy(ha->model_number, "QLA2310");
2535 } else {
2536 strcpy(ha->model_number, "QLA2300");
2537 }
2538 } else {
2539 qla2x00_set_model_info(vha, nv->model_number,
2540 sizeof(nv->model_number), "QLA23xx");
2541 }
2542 } else if (IS_QLA2200(ha)) {
2543 nv->firmware_options[0] |= BIT_2;
2544 /*
2545 * 'Point-to-point preferred, else loop' is not a safe
2546 * connection mode setting.
2547 */
2548 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
2549 (BIT_5 | BIT_4)) {
2550 /* Force 'loop preferred, else point-to-point'. */
2551 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
2552 nv->add_firmware_options[0] |= BIT_5;
2553 }
2554 strcpy(ha->model_number, "QLA22xx");
2555 } else /*if (IS_QLA2100(ha))*/ {
2556 strcpy(ha->model_number, "QLA2100");
2557 }
2558
2559 /*
2560 * Copy over NVRAM RISC parameter block to initialization control block.
2561 */
2562 dptr1 = (uint8_t *)icb;
2563 dptr2 = (uint8_t *)&nv->parameter_block_version;
2564 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
2565 while (cnt--)
2566 *dptr1++ = *dptr2++;
2567
2568 /* Copy 2nd half. */
2569 dptr1 = (uint8_t *)icb->add_firmware_options;
2570 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
2571 while (cnt--)
2572 *dptr1++ = *dptr2++;
2573
2574 /* Use alternate WWN? */
2575 if (nv->host_p[1] & BIT_7) {
2576 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
2577 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
2578 }
2579
2580 /* Prepare nodename */
2581 if ((icb->firmware_options[1] & BIT_6) == 0) {
2582 /*
2583 * Firmware will apply the following mask if the nodename was
2584 * not provided.
2585 */
2586 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
2587 icb->node_name[0] &= 0xF0;
2588 }
2589
2590 /*
2591 * Set host adapter parameters.
2592 */
2593
2594 /*
2595 * BIT_7 in the host-parameters section allows for modification to
2596 * internal driver logging.
2597 */
2598 if (nv->host_p[0] & BIT_7)
2599 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
2600 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
2601 /* Always load RISC code on non ISP2[12]00 chips. */
2602 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
2603 ha->flags.disable_risc_code_load = 0;
2604 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
2605 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
2606 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
2607 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
2608 ha->flags.disable_serdes = 0;
2609
2610 ha->operating_mode =
2611 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
2612
2613 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
2614 sizeof(ha->fw_seriallink_options));
2615
2616 /* save HBA serial number */
2617 ha->serial0 = icb->port_name[5];
2618 ha->serial1 = icb->port_name[6];
2619 ha->serial2 = icb->port_name[7];
2620 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
2621 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
2622
2623 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
2624
2625 ha->retry_count = nv->retry_count;
2626
2627 /* Set minimum login_timeout to 4 seconds. */
2628 if (nv->login_timeout != ql2xlogintimeout)
2629 nv->login_timeout = ql2xlogintimeout;
2630 if (nv->login_timeout < 4)
2631 nv->login_timeout = 4;
2632 ha->login_timeout = nv->login_timeout;
2633 icb->login_timeout = nv->login_timeout;
2634
2635 /* Set minimum RATOV to 100 tenths of a second. */
2636 ha->r_a_tov = 100;
2637
2638 ha->loop_reset_delay = nv->reset_delay;
2639
2640 /* Link Down Timeout = 0:
2641 *
2642 * When Port Down timer expires we will start returning
2643 * I/O's to OS with "DID_NO_CONNECT".
2644 *
2645 * Link Down Timeout != 0:
2646 *
2647 * The driver waits for the link to come up after link down
2648 * before returning I/Os to OS with "DID_NO_CONNECT".
2649 */
2650 if (nv->link_down_timeout == 0) {
2651 ha->loop_down_abort_time =
2652 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
2653 } else {
2654 ha->link_down_timeout = nv->link_down_timeout;
2655 ha->loop_down_abort_time =
2656 (LOOP_DOWN_TIME - ha->link_down_timeout);
2657 }
2658
2659 /*
2660 * Need enough time to try and get the port back.
2661 */
2662 ha->port_down_retry_count = nv->port_down_retry_count;
2663 if (qlport_down_retry)
2664 ha->port_down_retry_count = qlport_down_retry;
2665 /* Set login_retry_count */
2666 ha->login_retry_count = nv->retry_count;
2667 if (ha->port_down_retry_count == nv->port_down_retry_count &&
2668 ha->port_down_retry_count > 3)
2669 ha->login_retry_count = ha->port_down_retry_count;
2670 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
2671 ha->login_retry_count = ha->port_down_retry_count;
2672 if (ql2xloginretrycount)
2673 ha->login_retry_count = ql2xloginretrycount;
2674
2675 icb->lun_enables = __constant_cpu_to_le16(0);
2676 icb->command_resource_count = 0;
2677 icb->immediate_notify_resource_count = 0;
2678 icb->timeout = __constant_cpu_to_le16(0);
2679
2680 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2681 /* Enable RIO */
2682 icb->firmware_options[0] &= ~BIT_3;
2683 icb->add_firmware_options[0] &=
2684 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2685 icb->add_firmware_options[0] |= BIT_2;
2686 icb->response_accumulation_timer = 3;
2687 icb->interrupt_delay_timer = 5;
2688
2689 vha->flags.process_response_queue = 1;
2690 } else {
2691 /* Enable ZIO. */
2692 if (!vha->flags.init_done) {
2693 ha->zio_mode = icb->add_firmware_options[0] &
2694 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2695 ha->zio_timer = icb->interrupt_delay_timer ?
2696 icb->interrupt_delay_timer: 2;
2697 }
2698 icb->add_firmware_options[0] &=
2699 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2700 vha->flags.process_response_queue = 0;
2701 if (ha->zio_mode != QLA_ZIO_DISABLED) {
2702 ha->zio_mode = QLA_ZIO_MODE_6;
2703
2704 ql_log(ql_log_info, vha, 0x0068,
2705 "ZIO mode %d enabled; timer delay (%d us).\n",
2706 ha->zio_mode, ha->zio_timer * 100);
2707
2708 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
2709 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
2710 vha->flags.process_response_queue = 1;
2711 }
2712 }
2713
2714 if (rval) {
2715 ql_log(ql_log_warn, vha, 0x0069,
2716 "NVRAM configuration failed.\n");
2717 }
2718 return (rval);
2719 }
2720
2721 static void
2722 qla2x00_rport_del(void *data)
2723 {
2724 fc_port_t *fcport = data;
2725 struct fc_rport *rport;
2726 scsi_qla_host_t *vha = fcport->vha;
2727 unsigned long flags;
2728 unsigned long vha_flags;
2729
2730 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
2731 rport = fcport->drport ? fcport->drport: fcport->rport;
2732 fcport->drport = NULL;
2733 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
2734 if (rport) {
2735 fc_remote_port_delete(rport);
2736 /*
2737 * Release the target mode FC NEXUS in qla_target.c code
2738 * if target mod is enabled.
2739 */
2740 spin_lock_irqsave(&vha->hw->hardware_lock, vha_flags);
2741 qlt_fc_port_deleted(vha, fcport);
2742 spin_unlock_irqrestore(&vha->hw->hardware_lock, vha_flags);
2743 }
2744 }
2745
2746 /**
2747 * qla2x00_alloc_fcport() - Allocate a generic fcport.
2748 * @ha: HA context
2749 * @flags: allocation flags
2750 *
2751 * Returns a pointer to the allocated fcport, or NULL, if none available.
2752 */
2753 fc_port_t *
2754 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
2755 {
2756 fc_port_t *fcport;
2757
2758 fcport = kzalloc(sizeof(fc_port_t), flags);
2759 if (!fcport)
2760 return NULL;
2761
2762 /* Setup fcport template structure. */
2763 fcport->vha = vha;
2764 fcport->port_type = FCT_UNKNOWN;
2765 fcport->loop_id = FC_NO_LOOP_ID;
2766 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
2767 fcport->supported_classes = FC_COS_UNSPECIFIED;
2768
2769 return fcport;
2770 }
2771
2772 /*
2773 * qla2x00_configure_loop
2774 * Updates Fibre Channel Device Database with what is actually on loop.
2775 *
2776 * Input:
2777 * ha = adapter block pointer.
2778 *
2779 * Returns:
2780 * 0 = success.
2781 * 1 = error.
2782 * 2 = database was full and device was not configured.
2783 */
2784 static int
2785 qla2x00_configure_loop(scsi_qla_host_t *vha)
2786 {
2787 int rval;
2788 unsigned long flags, save_flags;
2789 struct qla_hw_data *ha = vha->hw;
2790 rval = QLA_SUCCESS;
2791
2792 /* Get Initiator ID */
2793 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
2794 rval = qla2x00_configure_hba(vha);
2795 if (rval != QLA_SUCCESS) {
2796 ql_dbg(ql_dbg_disc, vha, 0x2013,
2797 "Unable to configure HBA.\n");
2798 return (rval);
2799 }
2800 }
2801
2802 save_flags = flags = vha->dpc_flags;
2803 ql_dbg(ql_dbg_disc, vha, 0x2014,
2804 "Configure loop -- dpc flags = 0x%lx.\n", flags);
2805
2806 /*
2807 * If we have both an RSCN and PORT UPDATE pending then handle them
2808 * both at the same time.
2809 */
2810 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2811 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
2812
2813 qla2x00_get_data_rate(vha);
2814
2815 /* Determine what we need to do */
2816 if (ha->current_topology == ISP_CFG_FL &&
2817 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2818
2819 set_bit(RSCN_UPDATE, &flags);
2820
2821 } else if (ha->current_topology == ISP_CFG_F &&
2822 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2823
2824 set_bit(RSCN_UPDATE, &flags);
2825 clear_bit(LOCAL_LOOP_UPDATE, &flags);
2826
2827 } else if (ha->current_topology == ISP_CFG_N) {
2828 clear_bit(RSCN_UPDATE, &flags);
2829
2830 } else if (!vha->flags.online ||
2831 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
2832
2833 set_bit(RSCN_UPDATE, &flags);
2834 set_bit(LOCAL_LOOP_UPDATE, &flags);
2835 }
2836
2837 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
2838 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2839 ql_dbg(ql_dbg_disc, vha, 0x2015,
2840 "Loop resync needed, failing.\n");
2841 rval = QLA_FUNCTION_FAILED;
2842 } else
2843 rval = qla2x00_configure_local_loop(vha);
2844 }
2845
2846 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
2847 if (LOOP_TRANSITION(vha)) {
2848 ql_dbg(ql_dbg_disc, vha, 0x201e,
2849 "Needs RSCN update and loop transition.\n");
2850 rval = QLA_FUNCTION_FAILED;
2851 }
2852 else
2853 rval = qla2x00_configure_fabric(vha);
2854 }
2855
2856 if (rval == QLA_SUCCESS) {
2857 if (atomic_read(&vha->loop_down_timer) ||
2858 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2859 rval = QLA_FUNCTION_FAILED;
2860 } else {
2861 atomic_set(&vha->loop_state, LOOP_READY);
2862 ql_dbg(ql_dbg_disc, vha, 0x2069,
2863 "LOOP READY.\n");
2864 }
2865 }
2866
2867 if (rval) {
2868 ql_dbg(ql_dbg_disc, vha, 0x206a,
2869 "%s *** FAILED ***.\n", __func__);
2870 } else {
2871 ql_dbg(ql_dbg_disc, vha, 0x206b,
2872 "%s: exiting normally.\n", __func__);
2873 }
2874
2875 /* Restore state if a resync event occurred during processing */
2876 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2877 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
2878 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2879 if (test_bit(RSCN_UPDATE, &save_flags)) {
2880 set_bit(RSCN_UPDATE, &vha->dpc_flags);
2881 }
2882 }
2883
2884 return (rval);
2885 }
2886
2887
2888
2889 /*
2890 * qla2x00_configure_local_loop
2891 * Updates Fibre Channel Device Database with local loop devices.
2892 *
2893 * Input:
2894 * ha = adapter block pointer.
2895 *
2896 * Returns:
2897 * 0 = success.
2898 */
2899 static int
2900 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
2901 {
2902 int rval, rval2;
2903 int found_devs;
2904 int found;
2905 fc_port_t *fcport, *new_fcport;
2906
2907 uint16_t index;
2908 uint16_t entries;
2909 char *id_iter;
2910 uint16_t loop_id;
2911 uint8_t domain, area, al_pa;
2912 struct qla_hw_data *ha = vha->hw;
2913
2914 found_devs = 0;
2915 new_fcport = NULL;
2916 entries = MAX_FIBRE_DEVICES_LOOP;
2917
2918 /* Get list of logged in devices. */
2919 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
2920 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
2921 &entries);
2922 if (rval != QLA_SUCCESS)
2923 goto cleanup_allocation;
2924
2925 ql_dbg(ql_dbg_disc, vha, 0x2017,
2926 "Entries in ID list (%d).\n", entries);
2927 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
2928 (uint8_t *)ha->gid_list,
2929 entries * sizeof(struct gid_list_info));
2930
2931 /* Allocate temporary fcport for any new fcports discovered. */
2932 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
2933 if (new_fcport == NULL) {
2934 ql_log(ql_log_warn, vha, 0x2018,
2935 "Memory allocation failed for fcport.\n");
2936 rval = QLA_MEMORY_ALLOC_FAILED;
2937 goto cleanup_allocation;
2938 }
2939 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
2940
2941 /*
2942 * Mark local devices that were present with FCF_DEVICE_LOST for now.
2943 */
2944 list_for_each_entry(fcport, &vha->vp_fcports, list) {
2945 if (atomic_read(&fcport->state) == FCS_ONLINE &&
2946 fcport->port_type != FCT_BROADCAST &&
2947 (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
2948
2949 ql_dbg(ql_dbg_disc, vha, 0x2019,
2950 "Marking port lost loop_id=0x%04x.\n",
2951 fcport->loop_id);
2952
2953 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2954 }
2955 }
2956
2957 /* Add devices to port list. */
2958 id_iter = (char *)ha->gid_list;
2959 for (index = 0; index < entries; index++) {
2960 domain = ((struct gid_list_info *)id_iter)->domain;
2961 area = ((struct gid_list_info *)id_iter)->area;
2962 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
2963 if (IS_QLA2100(ha) || IS_QLA2200(ha))
2964 loop_id = (uint16_t)
2965 ((struct gid_list_info *)id_iter)->loop_id_2100;
2966 else
2967 loop_id = le16_to_cpu(
2968 ((struct gid_list_info *)id_iter)->loop_id);
2969 id_iter += ha->gid_list_info_size;
2970
2971 /* Bypass reserved domain fields. */
2972 if ((domain & 0xf0) == 0xf0)
2973 continue;
2974
2975 /* Bypass if not same domain and area of adapter. */
2976 if (area && domain &&
2977 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
2978 continue;
2979
2980 /* Bypass invalid local loop ID. */
2981 if (loop_id > LAST_LOCAL_LOOP_ID)
2982 continue;
2983
2984 memset(new_fcport, 0, sizeof(fc_port_t));
2985
2986 /* Fill in member data. */
2987 new_fcport->d_id.b.domain = domain;
2988 new_fcport->d_id.b.area = area;
2989 new_fcport->d_id.b.al_pa = al_pa;
2990 new_fcport->loop_id = loop_id;
2991 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
2992 if (rval2 != QLA_SUCCESS) {
2993 ql_dbg(ql_dbg_disc, vha, 0x201a,
2994 "Failed to retrieve fcport information "
2995 "-- get_port_database=%x, loop_id=0x%04x.\n",
2996 rval2, new_fcport->loop_id);
2997 ql_dbg(ql_dbg_disc, vha, 0x201b,
2998 "Scheduling resync.\n");
2999 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3000 continue;
3001 }
3002
3003 /* Check for matching device in port list. */
3004 found = 0;
3005 fcport = NULL;
3006 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3007 if (memcmp(new_fcport->port_name, fcport->port_name,
3008 WWN_SIZE))
3009 continue;
3010
3011 fcport->flags &= ~FCF_FABRIC_DEVICE;
3012 fcport->loop_id = new_fcport->loop_id;
3013 fcport->port_type = new_fcport->port_type;
3014 fcport->d_id.b24 = new_fcport->d_id.b24;
3015 memcpy(fcport->node_name, new_fcport->node_name,
3016 WWN_SIZE);
3017
3018 found++;
3019 break;
3020 }
3021
3022 if (!found) {
3023 /* New device, add to fcports list. */
3024 list_add_tail(&new_fcport->list, &vha->vp_fcports);
3025
3026 /* Allocate a new replacement fcport. */
3027 fcport = new_fcport;
3028 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3029 if (new_fcport == NULL) {
3030 ql_log(ql_log_warn, vha, 0x201c,
3031 "Failed to allocate memory for fcport.\n");
3032 rval = QLA_MEMORY_ALLOC_FAILED;
3033 goto cleanup_allocation;
3034 }
3035 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
3036 }
3037
3038 /* Base iIDMA settings on HBA port speed. */
3039 fcport->fp_speed = ha->link_data_rate;
3040
3041 qla2x00_update_fcport(vha, fcport);
3042
3043 found_devs++;
3044 }
3045
3046 cleanup_allocation:
3047 kfree(new_fcport);
3048
3049 if (rval != QLA_SUCCESS) {
3050 ql_dbg(ql_dbg_disc, vha, 0x201d,
3051 "Configure local loop error exit: rval=%x.\n", rval);
3052 }
3053
3054 return (rval);
3055 }
3056
3057 static void
3058 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
3059 {
3060 int rval;
3061 uint16_t mb[4];
3062 struct qla_hw_data *ha = vha->hw;
3063
3064 if (!IS_IIDMA_CAPABLE(ha))
3065 return;
3066
3067 if (atomic_read(&fcport->state) != FCS_ONLINE)
3068 return;
3069
3070 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
3071 fcport->fp_speed > ha->link_data_rate)
3072 return;
3073
3074 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
3075 mb);
3076 if (rval != QLA_SUCCESS) {
3077 ql_dbg(ql_dbg_disc, vha, 0x2004,
3078 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
3079 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
3080 } else {
3081 ql_dbg(ql_dbg_disc, vha, 0x2005,
3082 "iIDMA adjusted to %s GB/s on %8phN.\n",
3083 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
3084 fcport->port_name);
3085 }
3086 }
3087
3088 static void
3089 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
3090 {
3091 struct fc_rport_identifiers rport_ids;
3092 struct fc_rport *rport;
3093 unsigned long flags;
3094
3095 qla2x00_rport_del(fcport);
3096
3097 rport_ids.node_name = wwn_to_u64(fcport->node_name);
3098 rport_ids.port_name = wwn_to_u64(fcport->port_name);
3099 rport_ids.port_id = fcport->d_id.b.domain << 16 |
3100 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
3101 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
3102 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
3103 if (!rport) {
3104 ql_log(ql_log_warn, vha, 0x2006,
3105 "Unable to allocate fc remote port.\n");
3106 return;
3107 }
3108 /*
3109 * Create target mode FC NEXUS in qla_target.c if target mode is
3110 * enabled..
3111 */
3112
3113 qlt_fc_port_added(vha, fcport);
3114
3115 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
3116 *((fc_port_t **)rport->dd_data) = fcport;
3117 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
3118
3119 rport->supported_classes = fcport->supported_classes;
3120
3121 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
3122 if (fcport->port_type == FCT_INITIATOR)
3123 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
3124 if (fcport->port_type == FCT_TARGET)
3125 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
3126 fc_remote_port_rolechg(rport, rport_ids.roles);
3127 }
3128
3129 /*
3130 * qla2x00_update_fcport
3131 * Updates device on list.
3132 *
3133 * Input:
3134 * ha = adapter block pointer.
3135 * fcport = port structure pointer.
3136 *
3137 * Return:
3138 * 0 - Success
3139 * BIT_0 - error
3140 *
3141 * Context:
3142 * Kernel context.
3143 */
3144 void
3145 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
3146 {
3147 fcport->vha = vha;
3148
3149 if (IS_QLAFX00(vha->hw)) {
3150 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
3151 qla2x00_reg_remote_port(vha, fcport);
3152 return;
3153 }
3154 fcport->login_retry = 0;
3155 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
3156
3157 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
3158 qla2x00_iidma_fcport(vha, fcport);
3159 qla24xx_update_fcport_fcp_prio(vha, fcport);
3160 qla2x00_reg_remote_port(vha, fcport);
3161 }
3162
3163 /*
3164 * qla2x00_configure_fabric
3165 * Setup SNS devices with loop ID's.
3166 *
3167 * Input:
3168 * ha = adapter block pointer.
3169 *
3170 * Returns:
3171 * 0 = success.
3172 * BIT_0 = error
3173 */
3174 static int
3175 qla2x00_configure_fabric(scsi_qla_host_t *vha)
3176 {
3177 int rval;
3178 fc_port_t *fcport, *fcptemp;
3179 uint16_t next_loopid;
3180 uint16_t mb[MAILBOX_REGISTER_COUNT];
3181 uint16_t loop_id;
3182 LIST_HEAD(new_fcports);
3183 struct qla_hw_data *ha = vha->hw;
3184 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3185
3186 /* If FL port exists, then SNS is present */
3187 if (IS_FWI2_CAPABLE(ha))
3188 loop_id = NPH_F_PORT;
3189 else
3190 loop_id = SNS_FL_PORT;
3191 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
3192 if (rval != QLA_SUCCESS) {
3193 ql_dbg(ql_dbg_disc, vha, 0x201f,
3194 "MBX_GET_PORT_NAME failed, No FL Port.\n");
3195
3196 vha->device_flags &= ~SWITCH_FOUND;
3197 return (QLA_SUCCESS);
3198 }
3199 vha->device_flags |= SWITCH_FOUND;
3200
3201 do {
3202 /* FDMI support. */
3203 if (ql2xfdmienable &&
3204 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
3205 qla2x00_fdmi_register(vha);
3206
3207 /* Ensure we are logged into the SNS. */
3208 if (IS_FWI2_CAPABLE(ha))
3209 loop_id = NPH_SNS;
3210 else
3211 loop_id = SIMPLE_NAME_SERVER;
3212 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
3213 0xfc, mb, BIT_1|BIT_0);
3214 if (rval != QLA_SUCCESS) {
3215 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3216 return rval;
3217 }
3218 if (mb[0] != MBS_COMMAND_COMPLETE) {
3219 ql_dbg(ql_dbg_disc, vha, 0x2042,
3220 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x "
3221 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1],
3222 mb[2], mb[6], mb[7]);
3223 return (QLA_SUCCESS);
3224 }
3225
3226 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
3227 if (qla2x00_rft_id(vha)) {
3228 /* EMPTY */
3229 ql_dbg(ql_dbg_disc, vha, 0x2045,
3230 "Register FC-4 TYPE failed.\n");
3231 }
3232 if (qla2x00_rff_id(vha)) {
3233 /* EMPTY */
3234 ql_dbg(ql_dbg_disc, vha, 0x2049,
3235 "Register FC-4 Features failed.\n");
3236 }
3237 if (qla2x00_rnn_id(vha)) {
3238 /* EMPTY */
3239 ql_dbg(ql_dbg_disc, vha, 0x204f,
3240 "Register Node Name failed.\n");
3241 } else if (qla2x00_rsnn_nn(vha)) {
3242 /* EMPTY */
3243 ql_dbg(ql_dbg_disc, vha, 0x2053,
3244 "Register Symobilic Node Name failed.\n");
3245 }
3246 }
3247
3248 #define QLA_FCPORT_SCAN 1
3249 #define QLA_FCPORT_FOUND 2
3250
3251 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3252 fcport->scan_state = QLA_FCPORT_SCAN;
3253 }
3254
3255 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
3256 if (rval != QLA_SUCCESS)
3257 break;
3258
3259 /*
3260 * Logout all previous fabric devices marked lost, except
3261 * FCP2 devices.
3262 */
3263 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3264 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3265 break;
3266
3267 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
3268 continue;
3269
3270 if (fcport->scan_state == QLA_FCPORT_SCAN &&
3271 atomic_read(&fcport->state) == FCS_ONLINE) {
3272 qla2x00_mark_device_lost(vha, fcport,
3273 ql2xplogiabsentdevice, 0);
3274 if (fcport->loop_id != FC_NO_LOOP_ID &&
3275 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
3276 fcport->port_type != FCT_INITIATOR &&
3277 fcport->port_type != FCT_BROADCAST) {
3278 ha->isp_ops->fabric_logout(vha,
3279 fcport->loop_id,
3280 fcport->d_id.b.domain,
3281 fcport->d_id.b.area,
3282 fcport->d_id.b.al_pa);
3283 fcport->loop_id = FC_NO_LOOP_ID;
3284 }
3285 }
3286 }
3287
3288 /* Starting free loop ID. */
3289 next_loopid = ha->min_external_loopid;
3290
3291 /*
3292 * Scan through our port list and login entries that need to be
3293 * logged in.
3294 */
3295 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3296 if (atomic_read(&vha->loop_down_timer) ||
3297 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3298 break;
3299
3300 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
3301 (fcport->flags & FCF_LOGIN_NEEDED) == 0)
3302 continue;
3303
3304 if (fcport->loop_id == FC_NO_LOOP_ID) {
3305 fcport->loop_id = next_loopid;
3306 rval = qla2x00_find_new_loop_id(
3307 base_vha, fcport);
3308 if (rval != QLA_SUCCESS) {
3309 /* Ran out of IDs to use */
3310 break;
3311 }
3312 }
3313 /* Login and update database */
3314 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
3315 }
3316
3317 /* Exit if out of loop IDs. */
3318 if (rval != QLA_SUCCESS) {
3319 break;
3320 }
3321
3322 /*
3323 * Login and add the new devices to our port list.
3324 */
3325 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
3326 if (atomic_read(&vha->loop_down_timer) ||
3327 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3328 break;
3329
3330 /* Find a new loop ID to use. */
3331 fcport->loop_id = next_loopid;
3332 rval = qla2x00_find_new_loop_id(base_vha, fcport);
3333 if (rval != QLA_SUCCESS) {
3334 /* Ran out of IDs to use */
3335 break;
3336 }
3337
3338 /* Login and update database */
3339 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
3340
3341 list_move_tail(&fcport->list, &vha->vp_fcports);
3342 }
3343 } while (0);
3344
3345 /* Free all new device structures not processed. */
3346 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
3347 list_del(&fcport->list);
3348 kfree(fcport);
3349 }
3350
3351 if (rval) {
3352 ql_dbg(ql_dbg_disc, vha, 0x2068,
3353 "Configure fabric error exit rval=%d.\n", rval);
3354 }
3355
3356 return (rval);
3357 }
3358
3359 /*
3360 * qla2x00_find_all_fabric_devs
3361 *
3362 * Input:
3363 * ha = adapter block pointer.
3364 * dev = database device entry pointer.
3365 *
3366 * Returns:
3367 * 0 = success.
3368 *
3369 * Context:
3370 * Kernel context.
3371 */
3372 static int
3373 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
3374 struct list_head *new_fcports)
3375 {
3376 int rval;
3377 uint16_t loop_id;
3378 fc_port_t *fcport, *new_fcport, *fcptemp;
3379 int found;
3380
3381 sw_info_t *swl;
3382 int swl_idx;
3383 int first_dev, last_dev;
3384 port_id_t wrap = {}, nxt_d_id;
3385 struct qla_hw_data *ha = vha->hw;
3386 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3387
3388 rval = QLA_SUCCESS;
3389
3390 /* Try GID_PT to get device list, else GAN. */
3391 if (!ha->swl)
3392 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
3393 GFP_KERNEL);
3394 swl = ha->swl;
3395 if (!swl) {
3396 /*EMPTY*/
3397 ql_dbg(ql_dbg_disc, vha, 0x2054,
3398 "GID_PT allocations failed, fallback on GA_NXT.\n");
3399 } else {
3400 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
3401 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
3402 swl = NULL;
3403 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
3404 swl = NULL;
3405 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
3406 swl = NULL;
3407 } else if (ql2xiidmaenable &&
3408 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
3409 qla2x00_gpsc(vha, swl);
3410 }
3411
3412 /* If other queries succeeded probe for FC-4 type */
3413 if (swl)
3414 qla2x00_gff_id(vha, swl);
3415 }
3416 swl_idx = 0;
3417
3418 /* Allocate temporary fcport for any new fcports discovered. */
3419 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3420 if (new_fcport == NULL) {
3421 ql_log(ql_log_warn, vha, 0x205e,
3422 "Failed to allocate memory for fcport.\n");
3423 return (QLA_MEMORY_ALLOC_FAILED);
3424 }
3425 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3426 /* Set start port ID scan at adapter ID. */
3427 first_dev = 1;
3428 last_dev = 0;
3429
3430 /* Starting free loop ID. */
3431 loop_id = ha->min_external_loopid;
3432 for (; loop_id <= ha->max_loop_id; loop_id++) {
3433 if (qla2x00_is_reserved_id(vha, loop_id))
3434 continue;
3435
3436 if (ha->current_topology == ISP_CFG_FL &&
3437 (atomic_read(&vha->loop_down_timer) ||
3438 LOOP_TRANSITION(vha))) {
3439 atomic_set(&vha->loop_down_timer, 0);
3440 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3441 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
3442 break;
3443 }
3444
3445 if (swl != NULL) {
3446 if (last_dev) {
3447 wrap.b24 = new_fcport->d_id.b24;
3448 } else {
3449 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
3450 memcpy(new_fcport->node_name,
3451 swl[swl_idx].node_name, WWN_SIZE);
3452 memcpy(new_fcport->port_name,
3453 swl[swl_idx].port_name, WWN_SIZE);
3454 memcpy(new_fcport->fabric_port_name,
3455 swl[swl_idx].fabric_port_name, WWN_SIZE);
3456 new_fcport->fp_speed = swl[swl_idx].fp_speed;
3457 new_fcport->fc4_type = swl[swl_idx].fc4_type;
3458
3459 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
3460 last_dev = 1;
3461 }
3462 swl_idx++;
3463 }
3464 } else {
3465 /* Send GA_NXT to the switch */
3466 rval = qla2x00_ga_nxt(vha, new_fcport);
3467 if (rval != QLA_SUCCESS) {
3468 ql_log(ql_log_warn, vha, 0x2064,
3469 "SNS scan failed -- assuming "
3470 "zero-entry result.\n");
3471 list_for_each_entry_safe(fcport, fcptemp,
3472 new_fcports, list) {
3473 list_del(&fcport->list);
3474 kfree(fcport);
3475 }
3476 rval = QLA_SUCCESS;
3477 break;
3478 }
3479 }
3480
3481 /* If wrap on switch device list, exit. */
3482 if (first_dev) {
3483 wrap.b24 = new_fcport->d_id.b24;
3484 first_dev = 0;
3485 } else if (new_fcport->d_id.b24 == wrap.b24) {
3486 ql_dbg(ql_dbg_disc, vha, 0x2065,
3487 "Device wrap (%02x%02x%02x).\n",
3488 new_fcport->d_id.b.domain,
3489 new_fcport->d_id.b.area,
3490 new_fcport->d_id.b.al_pa);
3491 break;
3492 }
3493
3494 /* Bypass if same physical adapter. */
3495 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
3496 continue;
3497
3498 /* Bypass virtual ports of the same host. */
3499 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
3500 continue;
3501
3502 /* Bypass if same domain and area of adapter. */
3503 if (((new_fcport->d_id.b24 & 0xffff00) ==
3504 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
3505 ISP_CFG_FL)
3506 continue;
3507
3508 /* Bypass reserved domain fields. */
3509 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
3510 continue;
3511
3512 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
3513 if (ql2xgffidenable &&
3514 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
3515 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
3516 continue;
3517
3518 /* Locate matching device in database. */
3519 found = 0;
3520 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3521 if (memcmp(new_fcport->port_name, fcport->port_name,
3522 WWN_SIZE))
3523 continue;
3524
3525 fcport->scan_state = QLA_FCPORT_FOUND;
3526
3527 found++;
3528
3529 /* Update port state. */
3530 memcpy(fcport->fabric_port_name,
3531 new_fcport->fabric_port_name, WWN_SIZE);
3532 fcport->fp_speed = new_fcport->fp_speed;
3533
3534 /*
3535 * If address the same and state FCS_ONLINE, nothing
3536 * changed.
3537 */
3538 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
3539 atomic_read(&fcport->state) == FCS_ONLINE) {
3540 break;
3541 }
3542
3543 /*
3544 * If device was not a fabric device before.
3545 */
3546 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
3547 fcport->d_id.b24 = new_fcport->d_id.b24;
3548 qla2x00_clear_loop_id(fcport);
3549 fcport->flags |= (FCF_FABRIC_DEVICE |
3550 FCF_LOGIN_NEEDED);
3551 break;
3552 }
3553
3554 /*
3555 * Port ID changed or device was marked to be updated;
3556 * Log it out if still logged in and mark it for
3557 * relogin later.
3558 */
3559 fcport->d_id.b24 = new_fcport->d_id.b24;
3560 fcport->flags |= FCF_LOGIN_NEEDED;
3561 if (fcport->loop_id != FC_NO_LOOP_ID &&
3562 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
3563 (fcport->flags & FCF_ASYNC_SENT) == 0 &&
3564 fcport->port_type != FCT_INITIATOR &&
3565 fcport->port_type != FCT_BROADCAST) {
3566 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3567 fcport->d_id.b.domain, fcport->d_id.b.area,
3568 fcport->d_id.b.al_pa);
3569 qla2x00_clear_loop_id(fcport);
3570 }
3571
3572 break;
3573 }
3574
3575 if (found)
3576 continue;
3577 /* If device was not in our fcports list, then add it. */
3578 list_add_tail(&new_fcport->list, new_fcports);
3579
3580 /* Allocate a new replacement fcport. */
3581 nxt_d_id.b24 = new_fcport->d_id.b24;
3582 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3583 if (new_fcport == NULL) {
3584 ql_log(ql_log_warn, vha, 0x2066,
3585 "Memory allocation failed for fcport.\n");
3586 return (QLA_MEMORY_ALLOC_FAILED);
3587 }
3588 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3589 new_fcport->d_id.b24 = nxt_d_id.b24;
3590 }
3591
3592 kfree(new_fcport);
3593
3594 return (rval);
3595 }
3596
3597 /*
3598 * qla2x00_find_new_loop_id
3599 * Scan through our port list and find a new usable loop ID.
3600 *
3601 * Input:
3602 * ha: adapter state pointer.
3603 * dev: port structure pointer.
3604 *
3605 * Returns:
3606 * qla2x00 local function return status code.
3607 *
3608 * Context:
3609 * Kernel context.
3610 */
3611 int
3612 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
3613 {
3614 int rval;
3615 struct qla_hw_data *ha = vha->hw;
3616 unsigned long flags = 0;
3617
3618 rval = QLA_SUCCESS;
3619
3620 spin_lock_irqsave(&ha->vport_slock, flags);
3621
3622 dev->loop_id = find_first_zero_bit(ha->loop_id_map,
3623 LOOPID_MAP_SIZE);
3624 if (dev->loop_id >= LOOPID_MAP_SIZE ||
3625 qla2x00_is_reserved_id(vha, dev->loop_id)) {
3626 dev->loop_id = FC_NO_LOOP_ID;
3627 rval = QLA_FUNCTION_FAILED;
3628 } else
3629 set_bit(dev->loop_id, ha->loop_id_map);
3630
3631 spin_unlock_irqrestore(&ha->vport_slock, flags);
3632
3633 if (rval == QLA_SUCCESS)
3634 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
3635 "Assigning new loopid=%x, portid=%x.\n",
3636 dev->loop_id, dev->d_id.b24);
3637 else
3638 ql_log(ql_log_warn, dev->vha, 0x2087,
3639 "No loop_id's available, portid=%x.\n",
3640 dev->d_id.b24);
3641
3642 return (rval);
3643 }
3644
3645 /*
3646 * qla2x00_fabric_dev_login
3647 * Login fabric target device and update FC port database.
3648 *
3649 * Input:
3650 * ha: adapter state pointer.
3651 * fcport: port structure list pointer.
3652 * next_loopid: contains value of a new loop ID that can be used
3653 * by the next login attempt.
3654 *
3655 * Returns:
3656 * qla2x00 local function return status code.
3657 *
3658 * Context:
3659 * Kernel context.
3660 */
3661 static int
3662 qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
3663 uint16_t *next_loopid)
3664 {
3665 int rval;
3666 int retry;
3667 uint8_t opts;
3668 struct qla_hw_data *ha = vha->hw;
3669
3670 rval = QLA_SUCCESS;
3671 retry = 0;
3672
3673 if (IS_ALOGIO_CAPABLE(ha)) {
3674 if (fcport->flags & FCF_ASYNC_SENT)
3675 return rval;
3676 fcport->flags |= FCF_ASYNC_SENT;
3677 rval = qla2x00_post_async_login_work(vha, fcport, NULL);
3678 if (!rval)
3679 return rval;
3680 }
3681
3682 fcport->flags &= ~FCF_ASYNC_SENT;
3683 rval = qla2x00_fabric_login(vha, fcport, next_loopid);
3684 if (rval == QLA_SUCCESS) {
3685 /* Send an ADISC to FCP2 devices.*/
3686 opts = 0;
3687 if (fcport->flags & FCF_FCP2_DEVICE)
3688 opts |= BIT_1;
3689 rval = qla2x00_get_port_database(vha, fcport, opts);
3690 if (rval != QLA_SUCCESS) {
3691 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3692 fcport->d_id.b.domain, fcport->d_id.b.area,
3693 fcport->d_id.b.al_pa);
3694 qla2x00_mark_device_lost(vha, fcport, 1, 0);
3695 } else {
3696 qla2x00_update_fcport(vha, fcport);
3697 }
3698 } else {
3699 /* Retry Login. */
3700 qla2x00_mark_device_lost(vha, fcport, 1, 0);
3701 }
3702
3703 return (rval);
3704 }
3705
3706 /*
3707 * qla2x00_fabric_login
3708 * Issue fabric login command.
3709 *
3710 * Input:
3711 * ha = adapter block pointer.
3712 * device = pointer to FC device type structure.
3713 *
3714 * Returns:
3715 * 0 - Login successfully
3716 * 1 - Login failed
3717 * 2 - Initiator device
3718 * 3 - Fatal error
3719 */
3720 int
3721 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
3722 uint16_t *next_loopid)
3723 {
3724 int rval;
3725 int retry;
3726 uint16_t tmp_loopid;
3727 uint16_t mb[MAILBOX_REGISTER_COUNT];
3728 struct qla_hw_data *ha = vha->hw;
3729
3730 retry = 0;
3731 tmp_loopid = 0;
3732
3733 for (;;) {
3734 ql_dbg(ql_dbg_disc, vha, 0x2000,
3735 "Trying Fabric Login w/loop id 0x%04x for port "
3736 "%02x%02x%02x.\n",
3737 fcport->loop_id, fcport->d_id.b.domain,
3738 fcport->d_id.b.area, fcport->d_id.b.al_pa);
3739
3740 /* Login fcport on switch. */
3741 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
3742 fcport->d_id.b.domain, fcport->d_id.b.area,
3743 fcport->d_id.b.al_pa, mb, BIT_0);
3744 if (rval != QLA_SUCCESS) {
3745 return rval;
3746 }
3747 if (mb[0] == MBS_PORT_ID_USED) {
3748 /*
3749 * Device has another loop ID. The firmware team
3750 * recommends the driver perform an implicit login with
3751 * the specified ID again. The ID we just used is save
3752 * here so we return with an ID that can be tried by
3753 * the next login.
3754 */
3755 retry++;
3756 tmp_loopid = fcport->loop_id;
3757 fcport->loop_id = mb[1];
3758
3759 ql_dbg(ql_dbg_disc, vha, 0x2001,
3760 "Fabric Login: port in use - next loop "
3761 "id=0x%04x, port id= %02x%02x%02x.\n",
3762 fcport->loop_id, fcport->d_id.b.domain,
3763 fcport->d_id.b.area, fcport->d_id.b.al_pa);
3764
3765 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
3766 /*
3767 * Login succeeded.
3768 */
3769 if (retry) {
3770 /* A retry occurred before. */
3771 *next_loopid = tmp_loopid;
3772 } else {
3773 /*
3774 * No retry occurred before. Just increment the
3775 * ID value for next login.
3776 */
3777 *next_loopid = (fcport->loop_id + 1);
3778 }
3779
3780 if (mb[1] & BIT_0) {
3781 fcport->port_type = FCT_INITIATOR;
3782 } else {
3783 fcport->port_type = FCT_TARGET;
3784 if (mb[1] & BIT_1) {
3785 fcport->flags |= FCF_FCP2_DEVICE;
3786 }
3787 }
3788
3789 if (mb[10] & BIT_0)
3790 fcport->supported_classes |= FC_COS_CLASS2;
3791 if (mb[10] & BIT_1)
3792 fcport->supported_classes |= FC_COS_CLASS3;
3793
3794 if (IS_FWI2_CAPABLE(ha)) {
3795 if (mb[10] & BIT_7)
3796 fcport->flags |=
3797 FCF_CONF_COMP_SUPPORTED;
3798 }
3799
3800 rval = QLA_SUCCESS;
3801 break;
3802 } else if (mb[0] == MBS_LOOP_ID_USED) {
3803 /*
3804 * Loop ID already used, try next loop ID.
3805 */
3806 fcport->loop_id++;
3807 rval = qla2x00_find_new_loop_id(vha, fcport);
3808 if (rval != QLA_SUCCESS) {
3809 /* Ran out of loop IDs to use */
3810 break;
3811 }
3812 } else if (mb[0] == MBS_COMMAND_ERROR) {
3813 /*
3814 * Firmware possibly timed out during login. If NO
3815 * retries are left to do then the device is declared
3816 * dead.
3817 */
3818 *next_loopid = fcport->loop_id;
3819 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3820 fcport->d_id.b.domain, fcport->d_id.b.area,
3821 fcport->d_id.b.al_pa);
3822 qla2x00_mark_device_lost(vha, fcport, 1, 0);
3823
3824 rval = 1;
3825 break;
3826 } else {
3827 /*
3828 * unrecoverable / not handled error
3829 */
3830 ql_dbg(ql_dbg_disc, vha, 0x2002,
3831 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
3832 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
3833 fcport->d_id.b.area, fcport->d_id.b.al_pa,
3834 fcport->loop_id, jiffies);
3835
3836 *next_loopid = fcport->loop_id;
3837 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3838 fcport->d_id.b.domain, fcport->d_id.b.area,
3839 fcport->d_id.b.al_pa);
3840 qla2x00_clear_loop_id(fcport);
3841 fcport->login_retry = 0;
3842
3843 rval = 3;
3844 break;
3845 }
3846 }
3847
3848 return (rval);
3849 }
3850
3851 /*
3852 * qla2x00_local_device_login
3853 * Issue local device login command.
3854 *
3855 * Input:
3856 * ha = adapter block pointer.
3857 * loop_id = loop id of device to login to.
3858 *
3859 * Returns (Where's the #define!!!!):
3860 * 0 - Login successfully
3861 * 1 - Login failed
3862 * 3 - Fatal error
3863 */
3864 int
3865 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
3866 {
3867 int rval;
3868 uint16_t mb[MAILBOX_REGISTER_COUNT];
3869
3870 memset(mb, 0, sizeof(mb));
3871 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
3872 if (rval == QLA_SUCCESS) {
3873 /* Interrogate mailbox registers for any errors */
3874 if (mb[0] == MBS_COMMAND_ERROR)
3875 rval = 1;
3876 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
3877 /* device not in PCB table */
3878 rval = 3;
3879 }
3880
3881 return (rval);
3882 }
3883
3884 /*
3885 * qla2x00_loop_resync
3886 * Resync with fibre channel devices.
3887 *
3888 * Input:
3889 * ha = adapter block pointer.
3890 *
3891 * Returns:
3892 * 0 = success
3893 */
3894 int
3895 qla2x00_loop_resync(scsi_qla_host_t *vha)
3896 {
3897 int rval = QLA_SUCCESS;
3898 uint32_t wait_time;
3899 struct req_que *req;
3900 struct rsp_que *rsp;
3901
3902 if (vha->hw->flags.cpu_affinity_enabled)
3903 req = vha->hw->req_q_map[0];
3904 else
3905 req = vha->req;
3906 rsp = req->rsp;
3907
3908 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
3909 if (vha->flags.online) {
3910 if (!(rval = qla2x00_fw_ready(vha))) {
3911 /* Wait at most MAX_TARGET RSCNs for a stable link. */
3912 wait_time = 256;
3913 do {
3914 if (!IS_QLAFX00(vha->hw)) {
3915 /*
3916 * Issue a marker after FW becomes
3917 * ready.
3918 */
3919 qla2x00_marker(vha, req, rsp, 0, 0,
3920 MK_SYNC_ALL);
3921 vha->marker_needed = 0;
3922 }
3923
3924 /* Remap devices on Loop. */
3925 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3926
3927 if (IS_QLAFX00(vha->hw))
3928 qlafx00_configure_devices(vha);
3929 else
3930 qla2x00_configure_loop(vha);
3931
3932 wait_time--;
3933 } while (!atomic_read(&vha->loop_down_timer) &&
3934 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
3935 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
3936 &vha->dpc_flags)));
3937 }
3938 }
3939
3940 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
3941 return (QLA_FUNCTION_FAILED);
3942
3943 if (rval)
3944 ql_dbg(ql_dbg_disc, vha, 0x206c,
3945 "%s *** FAILED ***.\n", __func__);
3946
3947 return (rval);
3948 }
3949
3950 /*
3951 * qla2x00_perform_loop_resync
3952 * Description: This function will set the appropriate flags and call
3953 * qla2x00_loop_resync. If successful loop will be resynced
3954 * Arguments : scsi_qla_host_t pointer
3955 * returm : Success or Failure
3956 */
3957
3958 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
3959 {
3960 int32_t rval = 0;
3961
3962 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
3963 /*Configure the flags so that resync happens properly*/
3964 atomic_set(&ha->loop_down_timer, 0);
3965 if (!(ha->device_flags & DFLG_NO_CABLE)) {
3966 atomic_set(&ha->loop_state, LOOP_UP);
3967 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
3968 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
3969 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
3970
3971 rval = qla2x00_loop_resync(ha);
3972 } else
3973 atomic_set(&ha->loop_state, LOOP_DEAD);
3974
3975 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
3976 }
3977
3978 return rval;
3979 }
3980
3981 void
3982 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
3983 {
3984 fc_port_t *fcport;
3985 struct scsi_qla_host *vha;
3986 struct qla_hw_data *ha = base_vha->hw;
3987 unsigned long flags;
3988
3989 spin_lock_irqsave(&ha->vport_slock, flags);
3990 /* Go with deferred removal of rport references. */
3991 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
3992 atomic_inc(&vha->vref_count);
3993 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3994 if (fcport->drport &&
3995 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
3996 spin_unlock_irqrestore(&ha->vport_slock, flags);
3997 qla2x00_rport_del(fcport);
3998 spin_lock_irqsave(&ha->vport_slock, flags);
3999 }
4000 }
4001 atomic_dec(&vha->vref_count);
4002 }
4003 spin_unlock_irqrestore(&ha->vport_slock, flags);
4004 }
4005
4006 /* Assumes idc_lock always held on entry */
4007 void
4008 qla83xx_reset_ownership(scsi_qla_host_t *vha)
4009 {
4010 struct qla_hw_data *ha = vha->hw;
4011 uint32_t drv_presence, drv_presence_mask;
4012 uint32_t dev_part_info1, dev_part_info2, class_type;
4013 uint32_t class_type_mask = 0x3;
4014 uint16_t fcoe_other_function = 0xffff, i;
4015
4016 if (IS_QLA8044(ha)) {
4017 drv_presence = qla8044_rd_direct(vha,
4018 QLA8044_CRB_DRV_ACTIVE_INDEX);
4019 dev_part_info1 = qla8044_rd_direct(vha,
4020 QLA8044_CRB_DEV_PART_INFO_INDEX);
4021 dev_part_info2 = qla8044_rd_direct(vha,
4022 QLA8044_CRB_DEV_PART_INFO2);
4023 } else {
4024 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4025 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
4026 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
4027 }
4028 for (i = 0; i < 8; i++) {
4029 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
4030 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
4031 (i != ha->portnum)) {
4032 fcoe_other_function = i;
4033 break;
4034 }
4035 }
4036 if (fcoe_other_function == 0xffff) {
4037 for (i = 0; i < 8; i++) {
4038 class_type = ((dev_part_info2 >> (i * 4)) &
4039 class_type_mask);
4040 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
4041 ((i + 8) != ha->portnum)) {
4042 fcoe_other_function = i + 8;
4043 break;
4044 }
4045 }
4046 }
4047 /*
4048 * Prepare drv-presence mask based on fcoe functions present.
4049 * However consider only valid physical fcoe function numbers (0-15).
4050 */
4051 drv_presence_mask = ~((1 << (ha->portnum)) |
4052 ((fcoe_other_function == 0xffff) ?
4053 0 : (1 << (fcoe_other_function))));
4054
4055 /* We are the reset owner iff:
4056 * - No other protocol drivers present.
4057 * - This is the lowest among fcoe functions. */
4058 if (!(drv_presence & drv_presence_mask) &&
4059 (ha->portnum < fcoe_other_function)) {
4060 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
4061 "This host is Reset owner.\n");
4062 ha->flags.nic_core_reset_owner = 1;
4063 }
4064 }
4065
4066 static int
4067 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
4068 {
4069 int rval = QLA_SUCCESS;
4070 struct qla_hw_data *ha = vha->hw;
4071 uint32_t drv_ack;
4072
4073 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4074 if (rval == QLA_SUCCESS) {
4075 drv_ack |= (1 << ha->portnum);
4076 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
4077 }
4078
4079 return rval;
4080 }
4081
4082 static int
4083 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
4084 {
4085 int rval = QLA_SUCCESS;
4086 struct qla_hw_data *ha = vha->hw;
4087 uint32_t drv_ack;
4088
4089 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4090 if (rval == QLA_SUCCESS) {
4091 drv_ack &= ~(1 << ha->portnum);
4092 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
4093 }
4094
4095 return rval;
4096 }
4097
4098 static const char *
4099 qla83xx_dev_state_to_string(uint32_t dev_state)
4100 {
4101 switch (dev_state) {
4102 case QLA8XXX_DEV_COLD:
4103 return "COLD/RE-INIT";
4104 case QLA8XXX_DEV_INITIALIZING:
4105 return "INITIALIZING";
4106 case QLA8XXX_DEV_READY:
4107 return "READY";
4108 case QLA8XXX_DEV_NEED_RESET:
4109 return "NEED RESET";
4110 case QLA8XXX_DEV_NEED_QUIESCENT:
4111 return "NEED QUIESCENT";
4112 case QLA8XXX_DEV_FAILED:
4113 return "FAILED";
4114 case QLA8XXX_DEV_QUIESCENT:
4115 return "QUIESCENT";
4116 default:
4117 return "Unknown";
4118 }
4119 }
4120
4121 /* Assumes idc-lock always held on entry */
4122 void
4123 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
4124 {
4125 struct qla_hw_data *ha = vha->hw;
4126 uint32_t idc_audit_reg = 0, duration_secs = 0;
4127
4128 switch (audit_type) {
4129 case IDC_AUDIT_TIMESTAMP:
4130 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
4131 idc_audit_reg = (ha->portnum) |
4132 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
4133 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
4134 break;
4135
4136 case IDC_AUDIT_COMPLETION:
4137 duration_secs = ((jiffies_to_msecs(jiffies) -
4138 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
4139 idc_audit_reg = (ha->portnum) |
4140 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
4141 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
4142 break;
4143
4144 default:
4145 ql_log(ql_log_warn, vha, 0xb078,
4146 "Invalid audit type specified.\n");
4147 break;
4148 }
4149 }
4150
4151 /* Assumes idc_lock always held on entry */
4152 static int
4153 qla83xx_initiating_reset(scsi_qla_host_t *vha)
4154 {
4155 struct qla_hw_data *ha = vha->hw;
4156 uint32_t idc_control, dev_state;
4157
4158 __qla83xx_get_idc_control(vha, &idc_control);
4159 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
4160 ql_log(ql_log_info, vha, 0xb080,
4161 "NIC Core reset has been disabled. idc-control=0x%x\n",
4162 idc_control);
4163 return QLA_FUNCTION_FAILED;
4164 }
4165
4166 /* Set NEED-RESET iff in READY state and we are the reset-owner */
4167 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4168 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
4169 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
4170 QLA8XXX_DEV_NEED_RESET);
4171 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
4172 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
4173 } else {
4174 const char *state = qla83xx_dev_state_to_string(dev_state);
4175 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
4176
4177 /* SV: XXX: Is timeout required here? */
4178 /* Wait for IDC state change READY -> NEED_RESET */
4179 while (dev_state == QLA8XXX_DEV_READY) {
4180 qla83xx_idc_unlock(vha, 0);
4181 msleep(200);
4182 qla83xx_idc_lock(vha, 0);
4183 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4184 }
4185 }
4186
4187 /* Send IDC ack by writing to drv-ack register */
4188 __qla83xx_set_drv_ack(vha);
4189
4190 return QLA_SUCCESS;
4191 }
4192
4193 int
4194 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
4195 {
4196 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
4197 }
4198
4199 int
4200 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
4201 {
4202 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
4203 }
4204
4205 static int
4206 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
4207 {
4208 uint32_t drv_presence = 0;
4209 struct qla_hw_data *ha = vha->hw;
4210
4211 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4212 if (drv_presence & (1 << ha->portnum))
4213 return QLA_SUCCESS;
4214 else
4215 return QLA_TEST_FAILED;
4216 }
4217
4218 int
4219 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
4220 {
4221 int rval = QLA_SUCCESS;
4222 struct qla_hw_data *ha = vha->hw;
4223
4224 ql_dbg(ql_dbg_p3p, vha, 0xb058,
4225 "Entered %s().\n", __func__);
4226
4227 if (vha->device_flags & DFLG_DEV_FAILED) {
4228 ql_log(ql_log_warn, vha, 0xb059,
4229 "Device in unrecoverable FAILED state.\n");
4230 return QLA_FUNCTION_FAILED;
4231 }
4232
4233 qla83xx_idc_lock(vha, 0);
4234
4235 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
4236 ql_log(ql_log_warn, vha, 0xb05a,
4237 "Function=0x%x has been removed from IDC participation.\n",
4238 ha->portnum);
4239 rval = QLA_FUNCTION_FAILED;
4240 goto exit;
4241 }
4242
4243 qla83xx_reset_ownership(vha);
4244
4245 rval = qla83xx_initiating_reset(vha);
4246
4247 /*
4248 * Perform reset if we are the reset-owner,
4249 * else wait till IDC state changes to READY/FAILED.
4250 */
4251 if (rval == QLA_SUCCESS) {
4252 rval = qla83xx_idc_state_handler(vha);
4253
4254 if (rval == QLA_SUCCESS)
4255 ha->flags.nic_core_hung = 0;
4256 __qla83xx_clear_drv_ack(vha);
4257 }
4258
4259 exit:
4260 qla83xx_idc_unlock(vha, 0);
4261
4262 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
4263
4264 return rval;
4265 }
4266
4267 int
4268 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
4269 {
4270 struct qla_hw_data *ha = vha->hw;
4271 int rval = QLA_FUNCTION_FAILED;
4272
4273 if (!IS_MCTP_CAPABLE(ha)) {
4274 /* This message can be removed from the final version */
4275 ql_log(ql_log_info, vha, 0x506d,
4276 "This board is not MCTP capable\n");
4277 return rval;
4278 }
4279
4280 if (!ha->mctp_dump) {
4281 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
4282 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
4283
4284 if (!ha->mctp_dump) {
4285 ql_log(ql_log_warn, vha, 0x506e,
4286 "Failed to allocate memory for mctp dump\n");
4287 return rval;
4288 }
4289 }
4290
4291 #define MCTP_DUMP_STR_ADDR 0x00000000
4292 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
4293 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
4294 if (rval != QLA_SUCCESS) {
4295 ql_log(ql_log_warn, vha, 0x506f,
4296 "Failed to capture mctp dump\n");
4297 } else {
4298 ql_log(ql_log_info, vha, 0x5070,
4299 "Mctp dump capture for host (%ld/%p).\n",
4300 vha->host_no, ha->mctp_dump);
4301 ha->mctp_dumped = 1;
4302 }
4303
4304 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
4305 ha->flags.nic_core_reset_hdlr_active = 1;
4306 rval = qla83xx_restart_nic_firmware(vha);
4307 if (rval)
4308 /* NIC Core reset failed. */
4309 ql_log(ql_log_warn, vha, 0x5071,
4310 "Failed to restart nic firmware\n");
4311 else
4312 ql_dbg(ql_dbg_p3p, vha, 0xb084,
4313 "Restarted NIC firmware successfully.\n");
4314 ha->flags.nic_core_reset_hdlr_active = 0;
4315 }
4316
4317 return rval;
4318
4319 }
4320
4321 /*
4322 * qla2x00_quiesce_io
4323 * Description: This function will block the new I/Os
4324 * Its not aborting any I/Os as context
4325 * is not destroyed during quiescence
4326 * Arguments: scsi_qla_host_t
4327 * return : void
4328 */
4329 void
4330 qla2x00_quiesce_io(scsi_qla_host_t *vha)
4331 {
4332 struct qla_hw_data *ha = vha->hw;
4333 struct scsi_qla_host *vp;
4334
4335 ql_dbg(ql_dbg_dpc, vha, 0x401d,
4336 "Quiescing I/O - ha=%p.\n", ha);
4337
4338 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
4339 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
4340 atomic_set(&vha->loop_state, LOOP_DOWN);
4341 qla2x00_mark_all_devices_lost(vha, 0);
4342 list_for_each_entry(vp, &ha->vp_list, list)
4343 qla2x00_mark_all_devices_lost(vp, 0);
4344 } else {
4345 if (!atomic_read(&vha->loop_down_timer))
4346 atomic_set(&vha->loop_down_timer,
4347 LOOP_DOWN_TIME);
4348 }
4349 /* Wait for pending cmds to complete */
4350 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
4351 }
4352
4353 void
4354 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
4355 {
4356 struct qla_hw_data *ha = vha->hw;
4357 struct scsi_qla_host *vp;
4358 unsigned long flags;
4359 fc_port_t *fcport;
4360
4361 /* For ISP82XX, driver waits for completion of the commands.
4362 * online flag should be set.
4363 */
4364 if (!(IS_P3P_TYPE(ha)))
4365 vha->flags.online = 0;
4366 ha->flags.chip_reset_done = 0;
4367 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
4368 vha->qla_stats.total_isp_aborts++;
4369
4370 ql_log(ql_log_info, vha, 0x00af,
4371 "Performing ISP error recovery - ha=%p.\n", ha);
4372
4373 /* For ISP82XX, reset_chip is just disabling interrupts.
4374 * Driver waits for the completion of the commands.
4375 * the interrupts need to be enabled.
4376 */
4377 if (!(IS_P3P_TYPE(ha)))
4378 ha->isp_ops->reset_chip(vha);
4379
4380 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
4381 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
4382 atomic_set(&vha->loop_state, LOOP_DOWN);
4383 qla2x00_mark_all_devices_lost(vha, 0);
4384
4385 spin_lock_irqsave(&ha->vport_slock, flags);
4386 list_for_each_entry(vp, &ha->vp_list, list) {
4387 atomic_inc(&vp->vref_count);
4388 spin_unlock_irqrestore(&ha->vport_slock, flags);
4389
4390 qla2x00_mark_all_devices_lost(vp, 0);
4391
4392 spin_lock_irqsave(&ha->vport_slock, flags);
4393 atomic_dec(&vp->vref_count);
4394 }
4395 spin_unlock_irqrestore(&ha->vport_slock, flags);
4396 } else {
4397 if (!atomic_read(&vha->loop_down_timer))
4398 atomic_set(&vha->loop_down_timer,
4399 LOOP_DOWN_TIME);
4400 }
4401
4402 /* Clear all async request states across all VPs. */
4403 list_for_each_entry(fcport, &vha->vp_fcports, list)
4404 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4405 spin_lock_irqsave(&ha->vport_slock, flags);
4406 list_for_each_entry(vp, &ha->vp_list, list) {
4407 atomic_inc(&vp->vref_count);
4408 spin_unlock_irqrestore(&ha->vport_slock, flags);
4409
4410 list_for_each_entry(fcport, &vp->vp_fcports, list)
4411 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4412
4413 spin_lock_irqsave(&ha->vport_slock, flags);
4414 atomic_dec(&vp->vref_count);
4415 }
4416 spin_unlock_irqrestore(&ha->vport_slock, flags);
4417
4418 if (!ha->flags.eeh_busy) {
4419 /* Make sure for ISP 82XX IO DMA is complete */
4420 if (IS_P3P_TYPE(ha)) {
4421 qla82xx_chip_reset_cleanup(vha);
4422 ql_log(ql_log_info, vha, 0x00b4,
4423 "Done chip reset cleanup.\n");
4424
4425 /* Done waiting for pending commands.
4426 * Reset the online flag.
4427 */
4428 vha->flags.online = 0;
4429 }
4430
4431 /* Requeue all commands in outstanding command list. */
4432 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
4433 }
4434 }
4435
4436 /*
4437 * qla2x00_abort_isp
4438 * Resets ISP and aborts all outstanding commands.
4439 *
4440 * Input:
4441 * ha = adapter block pointer.
4442 *
4443 * Returns:
4444 * 0 = success
4445 */
4446 int
4447 qla2x00_abort_isp(scsi_qla_host_t *vha)
4448 {
4449 int rval;
4450 uint8_t status = 0;
4451 struct qla_hw_data *ha = vha->hw;
4452 struct scsi_qla_host *vp;
4453 struct req_que *req = ha->req_q_map[0];
4454 unsigned long flags;
4455
4456 if (vha->flags.online) {
4457 qla2x00_abort_isp_cleanup(vha);
4458
4459 if (IS_QLA8031(ha)) {
4460 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
4461 "Clearing fcoe driver presence.\n");
4462 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
4463 ql_dbg(ql_dbg_p3p, vha, 0xb073,
4464 "Error while clearing DRV-Presence.\n");
4465 }
4466
4467 if (unlikely(pci_channel_offline(ha->pdev) &&
4468 ha->flags.pci_channel_io_perm_failure)) {
4469 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4470 status = 0;
4471 return status;
4472 }
4473
4474 ha->isp_ops->get_flash_version(vha, req->ring);
4475
4476 ha->isp_ops->nvram_config(vha);
4477
4478 if (!qla2x00_restart_isp(vha)) {
4479 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4480
4481 if (!atomic_read(&vha->loop_down_timer)) {
4482 /*
4483 * Issue marker command only when we are going
4484 * to start the I/O .
4485 */
4486 vha->marker_needed = 1;
4487 }
4488
4489 vha->flags.online = 1;
4490
4491 ha->isp_ops->enable_intrs(ha);
4492
4493 ha->isp_abort_cnt = 0;
4494 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4495
4496 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
4497 qla2x00_get_fw_version(vha);
4498 if (ha->fce) {
4499 ha->flags.fce_enabled = 1;
4500 memset(ha->fce, 0,
4501 fce_calc_size(ha->fce_bufs));
4502 rval = qla2x00_enable_fce_trace(vha,
4503 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
4504 &ha->fce_bufs);
4505 if (rval) {
4506 ql_log(ql_log_warn, vha, 0x8033,
4507 "Unable to reinitialize FCE "
4508 "(%d).\n", rval);
4509 ha->flags.fce_enabled = 0;
4510 }
4511 }
4512
4513 if (ha->eft) {
4514 memset(ha->eft, 0, EFT_SIZE);
4515 rval = qla2x00_enable_eft_trace(vha,
4516 ha->eft_dma, EFT_NUM_BUFFERS);
4517 if (rval) {
4518 ql_log(ql_log_warn, vha, 0x8034,
4519 "Unable to reinitialize EFT "
4520 "(%d).\n", rval);
4521 }
4522 }
4523 } else { /* failed the ISP abort */
4524 vha->flags.online = 1;
4525 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
4526 if (ha->isp_abort_cnt == 0) {
4527 ql_log(ql_log_fatal, vha, 0x8035,
4528 "ISP error recover failed - "
4529 "board disabled.\n");
4530 /*
4531 * The next call disables the board
4532 * completely.
4533 */
4534 ha->isp_ops->reset_adapter(vha);
4535 vha->flags.online = 0;
4536 clear_bit(ISP_ABORT_RETRY,
4537 &vha->dpc_flags);
4538 status = 0;
4539 } else { /* schedule another ISP abort */
4540 ha->isp_abort_cnt--;
4541 ql_dbg(ql_dbg_taskm, vha, 0x8020,
4542 "ISP abort - retry remaining %d.\n",
4543 ha->isp_abort_cnt);
4544 status = 1;
4545 }
4546 } else {
4547 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
4548 ql_dbg(ql_dbg_taskm, vha, 0x8021,
4549 "ISP error recovery - retrying (%d) "
4550 "more times.\n", ha->isp_abort_cnt);
4551 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4552 status = 1;
4553 }
4554 }
4555
4556 }
4557
4558 if (!status) {
4559 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
4560
4561 spin_lock_irqsave(&ha->vport_slock, flags);
4562 list_for_each_entry(vp, &ha->vp_list, list) {
4563 if (vp->vp_idx) {
4564 atomic_inc(&vp->vref_count);
4565 spin_unlock_irqrestore(&ha->vport_slock, flags);
4566
4567 qla2x00_vp_abort_isp(vp);
4568
4569 spin_lock_irqsave(&ha->vport_slock, flags);
4570 atomic_dec(&vp->vref_count);
4571 }
4572 }
4573 spin_unlock_irqrestore(&ha->vport_slock, flags);
4574
4575 if (IS_QLA8031(ha)) {
4576 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
4577 "Setting back fcoe driver presence.\n");
4578 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
4579 ql_dbg(ql_dbg_p3p, vha, 0xb074,
4580 "Error while setting DRV-Presence.\n");
4581 }
4582 } else {
4583 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
4584 __func__);
4585 }
4586
4587 return(status);
4588 }
4589
4590 /*
4591 * qla2x00_restart_isp
4592 * restarts the ISP after a reset
4593 *
4594 * Input:
4595 * ha = adapter block pointer.
4596 *
4597 * Returns:
4598 * 0 = success
4599 */
4600 static int
4601 qla2x00_restart_isp(scsi_qla_host_t *vha)
4602 {
4603 int status = 0;
4604 uint32_t wait_time;
4605 struct qla_hw_data *ha = vha->hw;
4606 struct req_que *req = ha->req_q_map[0];
4607 struct rsp_que *rsp = ha->rsp_q_map[0];
4608 unsigned long flags;
4609
4610 /* If firmware needs to be loaded */
4611 if (qla2x00_isp_firmware(vha)) {
4612 vha->flags.online = 0;
4613 status = ha->isp_ops->chip_diag(vha);
4614 if (!status)
4615 status = qla2x00_setup_chip(vha);
4616 }
4617
4618 if (!status && !(status = qla2x00_init_rings(vha))) {
4619 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4620 ha->flags.chip_reset_done = 1;
4621 /* Initialize the queues in use */
4622 qla25xx_init_queues(ha);
4623
4624 status = qla2x00_fw_ready(vha);
4625 if (!status) {
4626 ql_dbg(ql_dbg_taskm, vha, 0x8031,
4627 "Start configure loop status = %d.\n", status);
4628
4629 /* Issue a marker after FW becomes ready. */
4630 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
4631
4632 vha->flags.online = 1;
4633
4634 /*
4635 * Process any ATIO queue entries that came in
4636 * while we weren't online.
4637 */
4638 spin_lock_irqsave(&ha->hardware_lock, flags);
4639 if (qla_tgt_mode_enabled(vha))
4640 qlt_24xx_process_atio_queue(vha);
4641 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4642
4643 /* Wait at most MAX_TARGET RSCNs for a stable link. */
4644 wait_time = 256;
4645 do {
4646 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4647 qla2x00_configure_loop(vha);
4648 wait_time--;
4649 } while (!atomic_read(&vha->loop_down_timer) &&
4650 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
4651 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
4652 &vha->dpc_flags)));
4653 }
4654
4655 /* if no cable then assume it's good */
4656 if ((vha->device_flags & DFLG_NO_CABLE))
4657 status = 0;
4658
4659 ql_dbg(ql_dbg_taskm, vha, 0x8032,
4660 "Configure loop done, status = 0x%x.\n", status);
4661 }
4662 return (status);
4663 }
4664
4665 static int
4666 qla25xx_init_queues(struct qla_hw_data *ha)
4667 {
4668 struct rsp_que *rsp = NULL;
4669 struct req_que *req = NULL;
4670 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
4671 int ret = -1;
4672 int i;
4673
4674 for (i = 1; i < ha->max_rsp_queues; i++) {
4675 rsp = ha->rsp_q_map[i];
4676 if (rsp) {
4677 rsp->options &= ~BIT_0;
4678 ret = qla25xx_init_rsp_que(base_vha, rsp);
4679 if (ret != QLA_SUCCESS)
4680 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
4681 "%s Rsp que: %d init failed.\n",
4682 __func__, rsp->id);
4683 else
4684 ql_dbg(ql_dbg_init, base_vha, 0x0100,
4685 "%s Rsp que: %d inited.\n",
4686 __func__, rsp->id);
4687 }
4688 }
4689 for (i = 1; i < ha->max_req_queues; i++) {
4690 req = ha->req_q_map[i];
4691 if (req) {
4692 /* Clear outstanding commands array. */
4693 req->options &= ~BIT_0;
4694 ret = qla25xx_init_req_que(base_vha, req);
4695 if (ret != QLA_SUCCESS)
4696 ql_dbg(ql_dbg_init, base_vha, 0x0101,
4697 "%s Req que: %d init failed.\n",
4698 __func__, req->id);
4699 else
4700 ql_dbg(ql_dbg_init, base_vha, 0x0102,
4701 "%s Req que: %d inited.\n",
4702 __func__, req->id);
4703 }
4704 }
4705 return ret;
4706 }
4707
4708 /*
4709 * qla2x00_reset_adapter
4710 * Reset adapter.
4711 *
4712 * Input:
4713 * ha = adapter block pointer.
4714 */
4715 void
4716 qla2x00_reset_adapter(scsi_qla_host_t *vha)
4717 {
4718 unsigned long flags = 0;
4719 struct qla_hw_data *ha = vha->hw;
4720 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4721
4722 vha->flags.online = 0;
4723 ha->isp_ops->disable_intrs(ha);
4724
4725 spin_lock_irqsave(&ha->hardware_lock, flags);
4726 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
4727 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4728 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
4729 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4730 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4731 }
4732
4733 void
4734 qla24xx_reset_adapter(scsi_qla_host_t *vha)
4735 {
4736 unsigned long flags = 0;
4737 struct qla_hw_data *ha = vha->hw;
4738 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4739
4740 if (IS_P3P_TYPE(ha))
4741 return;
4742
4743 vha->flags.online = 0;
4744 ha->isp_ops->disable_intrs(ha);
4745
4746 spin_lock_irqsave(&ha->hardware_lock, flags);
4747 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
4748 RD_REG_DWORD(&reg->hccr);
4749 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
4750 RD_REG_DWORD(&reg->hccr);
4751 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4752
4753 if (IS_NOPOLLING_TYPE(ha))
4754 ha->isp_ops->enable_intrs(ha);
4755 }
4756
4757 /* On sparc systems, obtain port and node WWN from firmware
4758 * properties.
4759 */
4760 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
4761 struct nvram_24xx *nv)
4762 {
4763 #ifdef CONFIG_SPARC
4764 struct qla_hw_data *ha = vha->hw;
4765 struct pci_dev *pdev = ha->pdev;
4766 struct device_node *dp = pci_device_to_OF_node(pdev);
4767 const u8 *val;
4768 int len;
4769
4770 val = of_get_property(dp, "port-wwn", &len);
4771 if (val && len >= WWN_SIZE)
4772 memcpy(nv->port_name, val, WWN_SIZE);
4773
4774 val = of_get_property(dp, "node-wwn", &len);
4775 if (val && len >= WWN_SIZE)
4776 memcpy(nv->node_name, val, WWN_SIZE);
4777 #endif
4778 }
4779
4780 int
4781 qla24xx_nvram_config(scsi_qla_host_t *vha)
4782 {
4783 int rval;
4784 struct init_cb_24xx *icb;
4785 struct nvram_24xx *nv;
4786 uint32_t *dptr;
4787 uint8_t *dptr1, *dptr2;
4788 uint32_t chksum;
4789 uint16_t cnt;
4790 struct qla_hw_data *ha = vha->hw;
4791
4792 rval = QLA_SUCCESS;
4793 icb = (struct init_cb_24xx *)ha->init_cb;
4794 nv = ha->nvram;
4795
4796 /* Determine NVRAM starting address. */
4797 if (ha->flags.port0) {
4798 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
4799 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
4800 } else {
4801 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
4802 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
4803 }
4804 ha->nvram_size = sizeof(struct nvram_24xx);
4805 ha->vpd_size = FA_NVRAM_VPD_SIZE;
4806
4807 /* Get VPD data into cache */
4808 ha->vpd = ha->nvram + VPD_OFFSET;
4809 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
4810 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
4811
4812 /* Get NVRAM data into cache and calculate checksum. */
4813 dptr = (uint32_t *)nv;
4814 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
4815 ha->nvram_size);
4816 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
4817 chksum += le32_to_cpu(*dptr++);
4818
4819 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
4820 "Contents of NVRAM\n");
4821 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
4822 (uint8_t *)nv, ha->nvram_size);
4823
4824 /* Bad NVRAM data, set defaults parameters. */
4825 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
4826 || nv->id[3] != ' ' ||
4827 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
4828 /* Reset NVRAM data. */
4829 ql_log(ql_log_warn, vha, 0x006b,
4830 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
4831 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
4832 ql_log(ql_log_warn, vha, 0x006c,
4833 "Falling back to functioning (yet invalid -- WWPN) "
4834 "defaults.\n");
4835
4836 /*
4837 * Set default initialization control block.
4838 */
4839 memset(nv, 0, ha->nvram_size);
4840 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
4841 nv->version = __constant_cpu_to_le16(ICB_VERSION);
4842 nv->frame_payload_size = __constant_cpu_to_le16(2048);
4843 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4844 nv->exchange_count = __constant_cpu_to_le16(0);
4845 nv->hard_address = __constant_cpu_to_le16(124);
4846 nv->port_name[0] = 0x21;
4847 nv->port_name[1] = 0x00 + ha->port_no;
4848 nv->port_name[2] = 0x00;
4849 nv->port_name[3] = 0xe0;
4850 nv->port_name[4] = 0x8b;
4851 nv->port_name[5] = 0x1c;
4852 nv->port_name[6] = 0x55;
4853 nv->port_name[7] = 0x86;
4854 nv->node_name[0] = 0x20;
4855 nv->node_name[1] = 0x00;
4856 nv->node_name[2] = 0x00;
4857 nv->node_name[3] = 0xe0;
4858 nv->node_name[4] = 0x8b;
4859 nv->node_name[5] = 0x1c;
4860 nv->node_name[6] = 0x55;
4861 nv->node_name[7] = 0x86;
4862 qla24xx_nvram_wwn_from_ofw(vha, nv);
4863 nv->login_retry_count = __constant_cpu_to_le16(8);
4864 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
4865 nv->login_timeout = __constant_cpu_to_le16(0);
4866 nv->firmware_options_1 =
4867 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
4868 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
4869 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
4870 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
4871 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
4872 nv->efi_parameters = __constant_cpu_to_le32(0);
4873 nv->reset_delay = 5;
4874 nv->max_luns_per_target = __constant_cpu_to_le16(128);
4875 nv->port_down_retry_count = __constant_cpu_to_le16(30);
4876 nv->link_down_timeout = __constant_cpu_to_le16(30);
4877
4878 rval = 1;
4879 }
4880
4881 if (!qla_ini_mode_enabled(vha)) {
4882 /* Don't enable full login after initial LIP */
4883 nv->firmware_options_1 &= __constant_cpu_to_le32(~BIT_13);
4884 /* Don't enable LIP full login for initiator */
4885 nv->host_p &= __constant_cpu_to_le32(~BIT_10);
4886 }
4887
4888 qlt_24xx_config_nvram_stage1(vha, nv);
4889
4890 /* Reset Initialization control block */
4891 memset(icb, 0, ha->init_cb_size);
4892
4893 /* Copy 1st segment. */
4894 dptr1 = (uint8_t *)icb;
4895 dptr2 = (uint8_t *)&nv->version;
4896 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
4897 while (cnt--)
4898 *dptr1++ = *dptr2++;
4899
4900 icb->login_retry_count = nv->login_retry_count;
4901 icb->link_down_on_nos = nv->link_down_on_nos;
4902
4903 /* Copy 2nd segment. */
4904 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
4905 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
4906 cnt = (uint8_t *)&icb->reserved_3 -
4907 (uint8_t *)&icb->interrupt_delay_timer;
4908 while (cnt--)
4909 *dptr1++ = *dptr2++;
4910
4911 /*
4912 * Setup driver NVRAM options.
4913 */
4914 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
4915 "QLA2462");
4916
4917 qlt_24xx_config_nvram_stage2(vha, icb);
4918
4919 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
4920 /* Use alternate WWN? */
4921 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4922 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4923 }
4924
4925 /* Prepare nodename */
4926 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
4927 /*
4928 * Firmware will apply the following mask if the nodename was
4929 * not provided.
4930 */
4931 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4932 icb->node_name[0] &= 0xF0;
4933 }
4934
4935 /* Set host adapter parameters. */
4936 ha->flags.disable_risc_code_load = 0;
4937 ha->flags.enable_lip_reset = 0;
4938 ha->flags.enable_lip_full_login =
4939 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
4940 ha->flags.enable_target_reset =
4941 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
4942 ha->flags.enable_led_scheme = 0;
4943 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
4944
4945 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
4946 (BIT_6 | BIT_5 | BIT_4)) >> 4;
4947
4948 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
4949 sizeof(ha->fw_seriallink_options24));
4950
4951 /* save HBA serial number */
4952 ha->serial0 = icb->port_name[5];
4953 ha->serial1 = icb->port_name[6];
4954 ha->serial2 = icb->port_name[7];
4955 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4956 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
4957
4958 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4959
4960 ha->retry_count = le16_to_cpu(nv->login_retry_count);
4961
4962 /* Set minimum login_timeout to 4 seconds. */
4963 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
4964 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
4965 if (le16_to_cpu(nv->login_timeout) < 4)
4966 nv->login_timeout = __constant_cpu_to_le16(4);
4967 ha->login_timeout = le16_to_cpu(nv->login_timeout);
4968 icb->login_timeout = nv->login_timeout;
4969
4970 /* Set minimum RATOV to 100 tenths of a second. */
4971 ha->r_a_tov = 100;
4972
4973 ha->loop_reset_delay = nv->reset_delay;
4974
4975 /* Link Down Timeout = 0:
4976 *
4977 * When Port Down timer expires we will start returning
4978 * I/O's to OS with "DID_NO_CONNECT".
4979 *
4980 * Link Down Timeout != 0:
4981 *
4982 * The driver waits for the link to come up after link down
4983 * before returning I/Os to OS with "DID_NO_CONNECT".
4984 */
4985 if (le16_to_cpu(nv->link_down_timeout) == 0) {
4986 ha->loop_down_abort_time =
4987 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4988 } else {
4989 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
4990 ha->loop_down_abort_time =
4991 (LOOP_DOWN_TIME - ha->link_down_timeout);
4992 }
4993
4994 /* Need enough time to try and get the port back. */
4995 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
4996 if (qlport_down_retry)
4997 ha->port_down_retry_count = qlport_down_retry;
4998
4999 /* Set login_retry_count */
5000 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
5001 if (ha->port_down_retry_count ==
5002 le16_to_cpu(nv->port_down_retry_count) &&
5003 ha->port_down_retry_count > 3)
5004 ha->login_retry_count = ha->port_down_retry_count;
5005 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5006 ha->login_retry_count = ha->port_down_retry_count;
5007 if (ql2xloginretrycount)
5008 ha->login_retry_count = ql2xloginretrycount;
5009
5010 /* Enable ZIO. */
5011 if (!vha->flags.init_done) {
5012 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
5013 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5014 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
5015 le16_to_cpu(icb->interrupt_delay_timer): 2;
5016 }
5017 icb->firmware_options_2 &= __constant_cpu_to_le32(
5018 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
5019 vha->flags.process_response_queue = 0;
5020 if (ha->zio_mode != QLA_ZIO_DISABLED) {
5021 ha->zio_mode = QLA_ZIO_MODE_6;
5022
5023 ql_log(ql_log_info, vha, 0x006f,
5024 "ZIO mode %d enabled; timer delay (%d us).\n",
5025 ha->zio_mode, ha->zio_timer * 100);
5026
5027 icb->firmware_options_2 |= cpu_to_le32(
5028 (uint32_t)ha->zio_mode);
5029 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
5030 vha->flags.process_response_queue = 1;
5031 }
5032
5033 if (rval) {
5034 ql_log(ql_log_warn, vha, 0x0070,
5035 "NVRAM configuration failed.\n");
5036 }
5037 return (rval);
5038 }
5039
5040 static int
5041 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
5042 uint32_t faddr)
5043 {
5044 int rval = QLA_SUCCESS;
5045 int segments, fragment;
5046 uint32_t *dcode, dlen;
5047 uint32_t risc_addr;
5048 uint32_t risc_size;
5049 uint32_t i;
5050 struct qla_hw_data *ha = vha->hw;
5051 struct req_que *req = ha->req_q_map[0];
5052
5053 ql_dbg(ql_dbg_init, vha, 0x008b,
5054 "FW: Loading firmware from flash (%x).\n", faddr);
5055
5056 rval = QLA_SUCCESS;
5057
5058 segments = FA_RISC_CODE_SEGMENTS;
5059 dcode = (uint32_t *)req->ring;
5060 *srisc_addr = 0;
5061
5062 /* Validate firmware image by checking version. */
5063 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
5064 for (i = 0; i < 4; i++)
5065 dcode[i] = be32_to_cpu(dcode[i]);
5066 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
5067 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
5068 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
5069 dcode[3] == 0)) {
5070 ql_log(ql_log_fatal, vha, 0x008c,
5071 "Unable to verify the integrity of flash firmware "
5072 "image.\n");
5073 ql_log(ql_log_fatal, vha, 0x008d,
5074 "Firmware data: %08x %08x %08x %08x.\n",
5075 dcode[0], dcode[1], dcode[2], dcode[3]);
5076
5077 return QLA_FUNCTION_FAILED;
5078 }
5079
5080 while (segments && rval == QLA_SUCCESS) {
5081 /* Read segment's load information. */
5082 qla24xx_read_flash_data(vha, dcode, faddr, 4);
5083
5084 risc_addr = be32_to_cpu(dcode[2]);
5085 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
5086 risc_size = be32_to_cpu(dcode[3]);
5087
5088 fragment = 0;
5089 while (risc_size > 0 && rval == QLA_SUCCESS) {
5090 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
5091 if (dlen > risc_size)
5092 dlen = risc_size;
5093
5094 ql_dbg(ql_dbg_init, vha, 0x008e,
5095 "Loading risc segment@ risc addr %x "
5096 "number of dwords 0x%x offset 0x%x.\n",
5097 risc_addr, dlen, faddr);
5098
5099 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
5100 for (i = 0; i < dlen; i++)
5101 dcode[i] = swab32(dcode[i]);
5102
5103 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5104 dlen);
5105 if (rval) {
5106 ql_log(ql_log_fatal, vha, 0x008f,
5107 "Failed to load segment %d of firmware.\n",
5108 fragment);
5109 break;
5110 }
5111
5112 faddr += dlen;
5113 risc_addr += dlen;
5114 risc_size -= dlen;
5115 fragment++;
5116 }
5117
5118 /* Next segment. */
5119 segments--;
5120 }
5121
5122 return rval;
5123 }
5124
5125 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
5126
5127 int
5128 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5129 {
5130 int rval;
5131 int i, fragment;
5132 uint16_t *wcode, *fwcode;
5133 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
5134 struct fw_blob *blob;
5135 struct qla_hw_data *ha = vha->hw;
5136 struct req_que *req = ha->req_q_map[0];
5137
5138 /* Load firmware blob. */
5139 blob = qla2x00_request_firmware(vha);
5140 if (!blob) {
5141 ql_log(ql_log_info, vha, 0x0083,
5142 "Fimware image unavailable.\n");
5143 ql_log(ql_log_info, vha, 0x0084,
5144 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
5145 return QLA_FUNCTION_FAILED;
5146 }
5147
5148 rval = QLA_SUCCESS;
5149
5150 wcode = (uint16_t *)req->ring;
5151 *srisc_addr = 0;
5152 fwcode = (uint16_t *)blob->fw->data;
5153 fwclen = 0;
5154
5155 /* Validate firmware image by checking version. */
5156 if (blob->fw->size < 8 * sizeof(uint16_t)) {
5157 ql_log(ql_log_fatal, vha, 0x0085,
5158 "Unable to verify integrity of firmware image (%Zd).\n",
5159 blob->fw->size);
5160 goto fail_fw_integrity;
5161 }
5162 for (i = 0; i < 4; i++)
5163 wcode[i] = be16_to_cpu(fwcode[i + 4]);
5164 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
5165 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
5166 wcode[2] == 0 && wcode[3] == 0)) {
5167 ql_log(ql_log_fatal, vha, 0x0086,
5168 "Unable to verify integrity of firmware image.\n");
5169 ql_log(ql_log_fatal, vha, 0x0087,
5170 "Firmware data: %04x %04x %04x %04x.\n",
5171 wcode[0], wcode[1], wcode[2], wcode[3]);
5172 goto fail_fw_integrity;
5173 }
5174
5175 seg = blob->segs;
5176 while (*seg && rval == QLA_SUCCESS) {
5177 risc_addr = *seg;
5178 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
5179 risc_size = be16_to_cpu(fwcode[3]);
5180
5181 /* Validate firmware image size. */
5182 fwclen += risc_size * sizeof(uint16_t);
5183 if (blob->fw->size < fwclen) {
5184 ql_log(ql_log_fatal, vha, 0x0088,
5185 "Unable to verify integrity of firmware image "
5186 "(%Zd).\n", blob->fw->size);
5187 goto fail_fw_integrity;
5188 }
5189
5190 fragment = 0;
5191 while (risc_size > 0 && rval == QLA_SUCCESS) {
5192 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
5193 if (wlen > risc_size)
5194 wlen = risc_size;
5195 ql_dbg(ql_dbg_init, vha, 0x0089,
5196 "Loading risc segment@ risc addr %x number of "
5197 "words 0x%x.\n", risc_addr, wlen);
5198
5199 for (i = 0; i < wlen; i++)
5200 wcode[i] = swab16(fwcode[i]);
5201
5202 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5203 wlen);
5204 if (rval) {
5205 ql_log(ql_log_fatal, vha, 0x008a,
5206 "Failed to load segment %d of firmware.\n",
5207 fragment);
5208 break;
5209 }
5210
5211 fwcode += wlen;
5212 risc_addr += wlen;
5213 risc_size -= wlen;
5214 fragment++;
5215 }
5216
5217 /* Next segment. */
5218 seg++;
5219 }
5220 return rval;
5221
5222 fail_fw_integrity:
5223 return QLA_FUNCTION_FAILED;
5224 }
5225
5226 static int
5227 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5228 {
5229 int rval;
5230 int segments, fragment;
5231 uint32_t *dcode, dlen;
5232 uint32_t risc_addr;
5233 uint32_t risc_size;
5234 uint32_t i;
5235 struct fw_blob *blob;
5236 uint32_t *fwcode, fwclen;
5237 struct qla_hw_data *ha = vha->hw;
5238 struct req_que *req = ha->req_q_map[0];
5239
5240 /* Load firmware blob. */
5241 blob = qla2x00_request_firmware(vha);
5242 if (!blob) {
5243 ql_log(ql_log_warn, vha, 0x0090,
5244 "Fimware image unavailable.\n");
5245 ql_log(ql_log_warn, vha, 0x0091,
5246 "Firmware images can be retrieved from: "
5247 QLA_FW_URL ".\n");
5248
5249 return QLA_FUNCTION_FAILED;
5250 }
5251
5252 ql_dbg(ql_dbg_init, vha, 0x0092,
5253 "FW: Loading via request-firmware.\n");
5254
5255 rval = QLA_SUCCESS;
5256
5257 segments = FA_RISC_CODE_SEGMENTS;
5258 dcode = (uint32_t *)req->ring;
5259 *srisc_addr = 0;
5260 fwcode = (uint32_t *)blob->fw->data;
5261 fwclen = 0;
5262
5263 /* Validate firmware image by checking version. */
5264 if (blob->fw->size < 8 * sizeof(uint32_t)) {
5265 ql_log(ql_log_fatal, vha, 0x0093,
5266 "Unable to verify integrity of firmware image (%Zd).\n",
5267 blob->fw->size);
5268 goto fail_fw_integrity;
5269 }
5270 for (i = 0; i < 4; i++)
5271 dcode[i] = be32_to_cpu(fwcode[i + 4]);
5272 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
5273 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
5274 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
5275 dcode[3] == 0)) {
5276 ql_log(ql_log_fatal, vha, 0x0094,
5277 "Unable to verify integrity of firmware image (%Zd).\n",
5278 blob->fw->size);
5279 ql_log(ql_log_fatal, vha, 0x0095,
5280 "Firmware data: %08x %08x %08x %08x.\n",
5281 dcode[0], dcode[1], dcode[2], dcode[3]);
5282 goto fail_fw_integrity;
5283 }
5284
5285 while (segments && rval == QLA_SUCCESS) {
5286 risc_addr = be32_to_cpu(fwcode[2]);
5287 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
5288 risc_size = be32_to_cpu(fwcode[3]);
5289
5290 /* Validate firmware image size. */
5291 fwclen += risc_size * sizeof(uint32_t);
5292 if (blob->fw->size < fwclen) {
5293 ql_log(ql_log_fatal, vha, 0x0096,
5294 "Unable to verify integrity of firmware image "
5295 "(%Zd).\n", blob->fw->size);
5296
5297 goto fail_fw_integrity;
5298 }
5299
5300 fragment = 0;
5301 while (risc_size > 0 && rval == QLA_SUCCESS) {
5302 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
5303 if (dlen > risc_size)
5304 dlen = risc_size;
5305
5306 ql_dbg(ql_dbg_init, vha, 0x0097,
5307 "Loading risc segment@ risc addr %x "
5308 "number of dwords 0x%x.\n", risc_addr, dlen);
5309
5310 for (i = 0; i < dlen; i++)
5311 dcode[i] = swab32(fwcode[i]);
5312
5313 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5314 dlen);
5315 if (rval) {
5316 ql_log(ql_log_fatal, vha, 0x0098,
5317 "Failed to load segment %d of firmware.\n",
5318 fragment);
5319 break;
5320 }
5321
5322 fwcode += dlen;
5323 risc_addr += dlen;
5324 risc_size -= dlen;
5325 fragment++;
5326 }
5327
5328 /* Next segment. */
5329 segments--;
5330 }
5331 return rval;
5332
5333 fail_fw_integrity:
5334 return QLA_FUNCTION_FAILED;
5335 }
5336
5337 int
5338 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5339 {
5340 int rval;
5341
5342 if (ql2xfwloadbin == 1)
5343 return qla81xx_load_risc(vha, srisc_addr);
5344
5345 /*
5346 * FW Load priority:
5347 * 1) Firmware via request-firmware interface (.bin file).
5348 * 2) Firmware residing in flash.
5349 */
5350 rval = qla24xx_load_risc_blob(vha, srisc_addr);
5351 if (rval == QLA_SUCCESS)
5352 return rval;
5353
5354 return qla24xx_load_risc_flash(vha, srisc_addr,
5355 vha->hw->flt_region_fw);
5356 }
5357
5358 int
5359 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5360 {
5361 int rval;
5362 struct qla_hw_data *ha = vha->hw;
5363
5364 if (ql2xfwloadbin == 2)
5365 goto try_blob_fw;
5366
5367 /*
5368 * FW Load priority:
5369 * 1) Firmware residing in flash.
5370 * 2) Firmware via request-firmware interface (.bin file).
5371 * 3) Golden-Firmware residing in flash -- limited operation.
5372 */
5373 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
5374 if (rval == QLA_SUCCESS)
5375 return rval;
5376
5377 try_blob_fw:
5378 rval = qla24xx_load_risc_blob(vha, srisc_addr);
5379 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
5380 return rval;
5381
5382 ql_log(ql_log_info, vha, 0x0099,
5383 "Attempting to fallback to golden firmware.\n");
5384 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
5385 if (rval != QLA_SUCCESS)
5386 return rval;
5387
5388 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
5389 ha->flags.running_gold_fw = 1;
5390 return rval;
5391 }
5392
5393 void
5394 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
5395 {
5396 int ret, retries;
5397 struct qla_hw_data *ha = vha->hw;
5398
5399 if (ha->flags.pci_channel_io_perm_failure)
5400 return;
5401 if (!IS_FWI2_CAPABLE(ha))
5402 return;
5403 if (!ha->fw_major_version)
5404 return;
5405
5406 ret = qla2x00_stop_firmware(vha);
5407 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
5408 ret != QLA_INVALID_COMMAND && retries ; retries--) {
5409 ha->isp_ops->reset_chip(vha);
5410 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
5411 continue;
5412 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
5413 continue;
5414 ql_log(ql_log_info, vha, 0x8015,
5415 "Attempting retry of stop-firmware command.\n");
5416 ret = qla2x00_stop_firmware(vha);
5417 }
5418 }
5419
5420 int
5421 qla24xx_configure_vhba(scsi_qla_host_t *vha)
5422 {
5423 int rval = QLA_SUCCESS;
5424 int rval2;
5425 uint16_t mb[MAILBOX_REGISTER_COUNT];
5426 struct qla_hw_data *ha = vha->hw;
5427 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
5428 struct req_que *req;
5429 struct rsp_que *rsp;
5430
5431 if (!vha->vp_idx)
5432 return -EINVAL;
5433
5434 rval = qla2x00_fw_ready(base_vha);
5435 if (ha->flags.cpu_affinity_enabled)
5436 req = ha->req_q_map[0];
5437 else
5438 req = vha->req;
5439 rsp = req->rsp;
5440
5441 if (rval == QLA_SUCCESS) {
5442 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5443 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
5444 }
5445
5446 vha->flags.management_server_logged_in = 0;
5447
5448 /* Login to SNS first */
5449 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
5450 BIT_1);
5451 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5452 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
5453 ql_dbg(ql_dbg_init, vha, 0x0120,
5454 "Failed SNS login: loop_id=%x, rval2=%d\n",
5455 NPH_SNS, rval2);
5456 else
5457 ql_dbg(ql_dbg_init, vha, 0x0103,
5458 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
5459 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
5460 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
5461 return (QLA_FUNCTION_FAILED);
5462 }
5463
5464 atomic_set(&vha->loop_down_timer, 0);
5465 atomic_set(&vha->loop_state, LOOP_UP);
5466 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5467 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5468 rval = qla2x00_loop_resync(base_vha);
5469
5470 return rval;
5471 }
5472
5473 /* 84XX Support **************************************************************/
5474
5475 static LIST_HEAD(qla_cs84xx_list);
5476 static DEFINE_MUTEX(qla_cs84xx_mutex);
5477
5478 static struct qla_chip_state_84xx *
5479 qla84xx_get_chip(struct scsi_qla_host *vha)
5480 {
5481 struct qla_chip_state_84xx *cs84xx;
5482 struct qla_hw_data *ha = vha->hw;
5483
5484 mutex_lock(&qla_cs84xx_mutex);
5485
5486 /* Find any shared 84xx chip. */
5487 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
5488 if (cs84xx->bus == ha->pdev->bus) {
5489 kref_get(&cs84xx->kref);
5490 goto done;
5491 }
5492 }
5493
5494 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
5495 if (!cs84xx)
5496 goto done;
5497
5498 kref_init(&cs84xx->kref);
5499 spin_lock_init(&cs84xx->access_lock);
5500 mutex_init(&cs84xx->fw_update_mutex);
5501 cs84xx->bus = ha->pdev->bus;
5502
5503 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
5504 done:
5505 mutex_unlock(&qla_cs84xx_mutex);
5506 return cs84xx;
5507 }
5508
5509 static void
5510 __qla84xx_chip_release(struct kref *kref)
5511 {
5512 struct qla_chip_state_84xx *cs84xx =
5513 container_of(kref, struct qla_chip_state_84xx, kref);
5514
5515 mutex_lock(&qla_cs84xx_mutex);
5516 list_del(&cs84xx->list);
5517 mutex_unlock(&qla_cs84xx_mutex);
5518 kfree(cs84xx);
5519 }
5520
5521 void
5522 qla84xx_put_chip(struct scsi_qla_host *vha)
5523 {
5524 struct qla_hw_data *ha = vha->hw;
5525 if (ha->cs84xx)
5526 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
5527 }
5528
5529 static int
5530 qla84xx_init_chip(scsi_qla_host_t *vha)
5531 {
5532 int rval;
5533 uint16_t status[2];
5534 struct qla_hw_data *ha = vha->hw;
5535
5536 mutex_lock(&ha->cs84xx->fw_update_mutex);
5537
5538 rval = qla84xx_verify_chip(vha, status);
5539
5540 mutex_unlock(&ha->cs84xx->fw_update_mutex);
5541
5542 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
5543 QLA_SUCCESS;
5544 }
5545
5546 /* 81XX Support **************************************************************/
5547
5548 int
5549 qla81xx_nvram_config(scsi_qla_host_t *vha)
5550 {
5551 int rval;
5552 struct init_cb_81xx *icb;
5553 struct nvram_81xx *nv;
5554 uint32_t *dptr;
5555 uint8_t *dptr1, *dptr2;
5556 uint32_t chksum;
5557 uint16_t cnt;
5558 struct qla_hw_data *ha = vha->hw;
5559
5560 rval = QLA_SUCCESS;
5561 icb = (struct init_cb_81xx *)ha->init_cb;
5562 nv = ha->nvram;
5563
5564 /* Determine NVRAM starting address. */
5565 ha->nvram_size = sizeof(struct nvram_81xx);
5566 ha->vpd_size = FA_NVRAM_VPD_SIZE;
5567 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
5568 ha->vpd_size = FA_VPD_SIZE_82XX;
5569
5570 /* Get VPD data into cache */
5571 ha->vpd = ha->nvram + VPD_OFFSET;
5572 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
5573 ha->vpd_size);
5574
5575 /* Get NVRAM data into cache and calculate checksum. */
5576 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
5577 ha->nvram_size);
5578 dptr = (uint32_t *)nv;
5579 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
5580 chksum += le32_to_cpu(*dptr++);
5581
5582 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
5583 "Contents of NVRAM:\n");
5584 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
5585 (uint8_t *)nv, ha->nvram_size);
5586
5587 /* Bad NVRAM data, set defaults parameters. */
5588 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
5589 || nv->id[3] != ' ' ||
5590 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
5591 /* Reset NVRAM data. */
5592 ql_log(ql_log_info, vha, 0x0073,
5593 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
5594 "version=0x%x.\n", chksum, nv->id[0],
5595 le16_to_cpu(nv->nvram_version));
5596 ql_log(ql_log_info, vha, 0x0074,
5597 "Falling back to functioning (yet invalid -- WWPN) "
5598 "defaults.\n");
5599
5600 /*
5601 * Set default initialization control block.
5602 */
5603 memset(nv, 0, ha->nvram_size);
5604 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
5605 nv->version = __constant_cpu_to_le16(ICB_VERSION);
5606 nv->frame_payload_size = __constant_cpu_to_le16(2048);
5607 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5608 nv->exchange_count = __constant_cpu_to_le16(0);
5609 nv->port_name[0] = 0x21;
5610 nv->port_name[1] = 0x00 + ha->port_no;
5611 nv->port_name[2] = 0x00;
5612 nv->port_name[3] = 0xe0;
5613 nv->port_name[4] = 0x8b;
5614 nv->port_name[5] = 0x1c;
5615 nv->port_name[6] = 0x55;
5616 nv->port_name[7] = 0x86;
5617 nv->node_name[0] = 0x20;
5618 nv->node_name[1] = 0x00;
5619 nv->node_name[2] = 0x00;
5620 nv->node_name[3] = 0xe0;
5621 nv->node_name[4] = 0x8b;
5622 nv->node_name[5] = 0x1c;
5623 nv->node_name[6] = 0x55;
5624 nv->node_name[7] = 0x86;
5625 nv->login_retry_count = __constant_cpu_to_le16(8);
5626 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
5627 nv->login_timeout = __constant_cpu_to_le16(0);
5628 nv->firmware_options_1 =
5629 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
5630 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
5631 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
5632 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
5633 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
5634 nv->efi_parameters = __constant_cpu_to_le32(0);
5635 nv->reset_delay = 5;
5636 nv->max_luns_per_target = __constant_cpu_to_le16(128);
5637 nv->port_down_retry_count = __constant_cpu_to_le16(30);
5638 nv->link_down_timeout = __constant_cpu_to_le16(180);
5639 nv->enode_mac[0] = 0x00;
5640 nv->enode_mac[1] = 0xC0;
5641 nv->enode_mac[2] = 0xDD;
5642 nv->enode_mac[3] = 0x04;
5643 nv->enode_mac[4] = 0x05;
5644 nv->enode_mac[5] = 0x06 + ha->port_no;
5645
5646 rval = 1;
5647 }
5648
5649 if (IS_T10_PI_CAPABLE(ha))
5650 nv->frame_payload_size &= ~7;
5651
5652 qlt_81xx_config_nvram_stage1(vha, nv);
5653
5654 /* Reset Initialization control block */
5655 memset(icb, 0, ha->init_cb_size);
5656
5657 /* Copy 1st segment. */
5658 dptr1 = (uint8_t *)icb;
5659 dptr2 = (uint8_t *)&nv->version;
5660 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
5661 while (cnt--)
5662 *dptr1++ = *dptr2++;
5663
5664 icb->login_retry_count = nv->login_retry_count;
5665
5666 /* Copy 2nd segment. */
5667 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
5668 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
5669 cnt = (uint8_t *)&icb->reserved_5 -
5670 (uint8_t *)&icb->interrupt_delay_timer;
5671 while (cnt--)
5672 *dptr1++ = *dptr2++;
5673
5674 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
5675 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
5676 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
5677 icb->enode_mac[0] = 0x00;
5678 icb->enode_mac[1] = 0xC0;
5679 icb->enode_mac[2] = 0xDD;
5680 icb->enode_mac[3] = 0x04;
5681 icb->enode_mac[4] = 0x05;
5682 icb->enode_mac[5] = 0x06 + ha->port_no;
5683 }
5684
5685 /* Use extended-initialization control block. */
5686 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
5687
5688 /*
5689 * Setup driver NVRAM options.
5690 */
5691 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
5692 "QLE8XXX");
5693
5694 qlt_81xx_config_nvram_stage2(vha, icb);
5695
5696 /* Use alternate WWN? */
5697 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
5698 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
5699 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
5700 }
5701
5702 /* Prepare nodename */
5703 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
5704 /*
5705 * Firmware will apply the following mask if the nodename was
5706 * not provided.
5707 */
5708 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
5709 icb->node_name[0] &= 0xF0;
5710 }
5711
5712 /* Set host adapter parameters. */
5713 ha->flags.disable_risc_code_load = 0;
5714 ha->flags.enable_lip_reset = 0;
5715 ha->flags.enable_lip_full_login =
5716 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
5717 ha->flags.enable_target_reset =
5718 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
5719 ha->flags.enable_led_scheme = 0;
5720 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
5721
5722 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
5723 (BIT_6 | BIT_5 | BIT_4)) >> 4;
5724
5725 /* save HBA serial number */
5726 ha->serial0 = icb->port_name[5];
5727 ha->serial1 = icb->port_name[6];
5728 ha->serial2 = icb->port_name[7];
5729 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
5730 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
5731
5732 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5733
5734 ha->retry_count = le16_to_cpu(nv->login_retry_count);
5735
5736 /* Set minimum login_timeout to 4 seconds. */
5737 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
5738 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
5739 if (le16_to_cpu(nv->login_timeout) < 4)
5740 nv->login_timeout = __constant_cpu_to_le16(4);
5741 ha->login_timeout = le16_to_cpu(nv->login_timeout);
5742 icb->login_timeout = nv->login_timeout;
5743
5744 /* Set minimum RATOV to 100 tenths of a second. */
5745 ha->r_a_tov = 100;
5746
5747 ha->loop_reset_delay = nv->reset_delay;
5748
5749 /* Link Down Timeout = 0:
5750 *
5751 * When Port Down timer expires we will start returning
5752 * I/O's to OS with "DID_NO_CONNECT".
5753 *
5754 * Link Down Timeout != 0:
5755 *
5756 * The driver waits for the link to come up after link down
5757 * before returning I/Os to OS with "DID_NO_CONNECT".
5758 */
5759 if (le16_to_cpu(nv->link_down_timeout) == 0) {
5760 ha->loop_down_abort_time =
5761 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5762 } else {
5763 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
5764 ha->loop_down_abort_time =
5765 (LOOP_DOWN_TIME - ha->link_down_timeout);
5766 }
5767
5768 /* Need enough time to try and get the port back. */
5769 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
5770 if (qlport_down_retry)
5771 ha->port_down_retry_count = qlport_down_retry;
5772
5773 /* Set login_retry_count */
5774 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
5775 if (ha->port_down_retry_count ==
5776 le16_to_cpu(nv->port_down_retry_count) &&
5777 ha->port_down_retry_count > 3)
5778 ha->login_retry_count = ha->port_down_retry_count;
5779 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5780 ha->login_retry_count = ha->port_down_retry_count;
5781 if (ql2xloginretrycount)
5782 ha->login_retry_count = ql2xloginretrycount;
5783
5784 /* if not running MSI-X we need handshaking on interrupts */
5785 if (!vha->hw->flags.msix_enabled && IS_QLA83XX(ha))
5786 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_22);
5787
5788 /* Enable ZIO. */
5789 if (!vha->flags.init_done) {
5790 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
5791 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5792 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
5793 le16_to_cpu(icb->interrupt_delay_timer): 2;
5794 }
5795 icb->firmware_options_2 &= __constant_cpu_to_le32(
5796 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
5797 vha->flags.process_response_queue = 0;
5798 if (ha->zio_mode != QLA_ZIO_DISABLED) {
5799 ha->zio_mode = QLA_ZIO_MODE_6;
5800
5801 ql_log(ql_log_info, vha, 0x0075,
5802 "ZIO mode %d enabled; timer delay (%d us).\n",
5803 ha->zio_mode,
5804 ha->zio_timer * 100);
5805
5806 icb->firmware_options_2 |= cpu_to_le32(
5807 (uint32_t)ha->zio_mode);
5808 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
5809 vha->flags.process_response_queue = 1;
5810 }
5811
5812 if (rval) {
5813 ql_log(ql_log_warn, vha, 0x0076,
5814 "NVRAM configuration failed.\n");
5815 }
5816 return (rval);
5817 }
5818
5819 int
5820 qla82xx_restart_isp(scsi_qla_host_t *vha)
5821 {
5822 int status, rval;
5823 uint32_t wait_time;
5824 struct qla_hw_data *ha = vha->hw;
5825 struct req_que *req = ha->req_q_map[0];
5826 struct rsp_que *rsp = ha->rsp_q_map[0];
5827 struct scsi_qla_host *vp;
5828 unsigned long flags;
5829
5830 status = qla2x00_init_rings(vha);
5831 if (!status) {
5832 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5833 ha->flags.chip_reset_done = 1;
5834
5835 status = qla2x00_fw_ready(vha);
5836 if (!status) {
5837 ql_log(ql_log_info, vha, 0x803c,
5838 "Start configure loop, status =%d.\n", status);
5839
5840 /* Issue a marker after FW becomes ready. */
5841 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
5842
5843 vha->flags.online = 1;
5844 /* Wait at most MAX_TARGET RSCNs for a stable link. */
5845 wait_time = 256;
5846 do {
5847 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5848 qla2x00_configure_loop(vha);
5849 wait_time--;
5850 } while (!atomic_read(&vha->loop_down_timer) &&
5851 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
5852 wait_time &&
5853 (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
5854 }
5855
5856 /* if no cable then assume it's good */
5857 if ((vha->device_flags & DFLG_NO_CABLE))
5858 status = 0;
5859
5860 ql_log(ql_log_info, vha, 0x8000,
5861 "Configure loop done, status = 0x%x.\n", status);
5862 }
5863
5864 if (!status) {
5865 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5866
5867 if (!atomic_read(&vha->loop_down_timer)) {
5868 /*
5869 * Issue marker command only when we are going
5870 * to start the I/O .
5871 */
5872 vha->marker_needed = 1;
5873 }
5874
5875 vha->flags.online = 1;
5876
5877 ha->isp_ops->enable_intrs(ha);
5878
5879 ha->isp_abort_cnt = 0;
5880 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
5881
5882 /* Update the firmware version */
5883 status = qla82xx_check_md_needed(vha);
5884
5885 if (ha->fce) {
5886 ha->flags.fce_enabled = 1;
5887 memset(ha->fce, 0,
5888 fce_calc_size(ha->fce_bufs));
5889 rval = qla2x00_enable_fce_trace(vha,
5890 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
5891 &ha->fce_bufs);
5892 if (rval) {
5893 ql_log(ql_log_warn, vha, 0x8001,
5894 "Unable to reinitialize FCE (%d).\n",
5895 rval);
5896 ha->flags.fce_enabled = 0;
5897 }
5898 }
5899
5900 if (ha->eft) {
5901 memset(ha->eft, 0, EFT_SIZE);
5902 rval = qla2x00_enable_eft_trace(vha,
5903 ha->eft_dma, EFT_NUM_BUFFERS);
5904 if (rval) {
5905 ql_log(ql_log_warn, vha, 0x8010,
5906 "Unable to reinitialize EFT (%d).\n",
5907 rval);
5908 }
5909 }
5910 }
5911
5912 if (!status) {
5913 ql_dbg(ql_dbg_taskm, vha, 0x8011,
5914 "qla82xx_restart_isp succeeded.\n");
5915
5916 spin_lock_irqsave(&ha->vport_slock, flags);
5917 list_for_each_entry(vp, &ha->vp_list, list) {
5918 if (vp->vp_idx) {
5919 atomic_inc(&vp->vref_count);
5920 spin_unlock_irqrestore(&ha->vport_slock, flags);
5921
5922 qla2x00_vp_abort_isp(vp);
5923
5924 spin_lock_irqsave(&ha->vport_slock, flags);
5925 atomic_dec(&vp->vref_count);
5926 }
5927 }
5928 spin_unlock_irqrestore(&ha->vport_slock, flags);
5929
5930 } else {
5931 ql_log(ql_log_warn, vha, 0x8016,
5932 "qla82xx_restart_isp **** FAILED ****.\n");
5933 }
5934
5935 return status;
5936 }
5937
5938 void
5939 qla81xx_update_fw_options(scsi_qla_host_t *vha)
5940 {
5941 struct qla_hw_data *ha = vha->hw;
5942
5943 if (!ql2xetsenable)
5944 return;
5945
5946 /* Enable ETS Burst. */
5947 memset(ha->fw_options, 0, sizeof(ha->fw_options));
5948 ha->fw_options[2] |= BIT_9;
5949 qla2x00_set_fw_options(vha, ha->fw_options);
5950 }
5951
5952 /*
5953 * qla24xx_get_fcp_prio
5954 * Gets the fcp cmd priority value for the logged in port.
5955 * Looks for a match of the port descriptors within
5956 * each of the fcp prio config entries. If a match is found,
5957 * the tag (priority) value is returned.
5958 *
5959 * Input:
5960 * vha = scsi host structure pointer.
5961 * fcport = port structure pointer.
5962 *
5963 * Return:
5964 * non-zero (if found)
5965 * -1 (if not found)
5966 *
5967 * Context:
5968 * Kernel context
5969 */
5970 static int
5971 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
5972 {
5973 int i, entries;
5974 uint8_t pid_match, wwn_match;
5975 int priority;
5976 uint32_t pid1, pid2;
5977 uint64_t wwn1, wwn2;
5978 struct qla_fcp_prio_entry *pri_entry;
5979 struct qla_hw_data *ha = vha->hw;
5980
5981 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
5982 return -1;
5983
5984 priority = -1;
5985 entries = ha->fcp_prio_cfg->num_entries;
5986 pri_entry = &ha->fcp_prio_cfg->entry[0];
5987
5988 for (i = 0; i < entries; i++) {
5989 pid_match = wwn_match = 0;
5990
5991 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
5992 pri_entry++;
5993 continue;
5994 }
5995
5996 /* check source pid for a match */
5997 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
5998 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
5999 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
6000 if (pid1 == INVALID_PORT_ID)
6001 pid_match++;
6002 else if (pid1 == pid2)
6003 pid_match++;
6004 }
6005
6006 /* check destination pid for a match */
6007 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
6008 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
6009 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
6010 if (pid1 == INVALID_PORT_ID)
6011 pid_match++;
6012 else if (pid1 == pid2)
6013 pid_match++;
6014 }
6015
6016 /* check source WWN for a match */
6017 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
6018 wwn1 = wwn_to_u64(vha->port_name);
6019 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
6020 if (wwn2 == (uint64_t)-1)
6021 wwn_match++;
6022 else if (wwn1 == wwn2)
6023 wwn_match++;
6024 }
6025
6026 /* check destination WWN for a match */
6027 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
6028 wwn1 = wwn_to_u64(fcport->port_name);
6029 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
6030 if (wwn2 == (uint64_t)-1)
6031 wwn_match++;
6032 else if (wwn1 == wwn2)
6033 wwn_match++;
6034 }
6035
6036 if (pid_match == 2 || wwn_match == 2) {
6037 /* Found a matching entry */
6038 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
6039 priority = pri_entry->tag;
6040 break;
6041 }
6042
6043 pri_entry++;
6044 }
6045
6046 return priority;
6047 }
6048
6049 /*
6050 * qla24xx_update_fcport_fcp_prio
6051 * Activates fcp priority for the logged in fc port
6052 *
6053 * Input:
6054 * vha = scsi host structure pointer.
6055 * fcp = port structure pointer.
6056 *
6057 * Return:
6058 * QLA_SUCCESS or QLA_FUNCTION_FAILED
6059 *
6060 * Context:
6061 * Kernel context.
6062 */
6063 int
6064 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
6065 {
6066 int ret;
6067 int priority;
6068 uint16_t mb[5];
6069
6070 if (fcport->port_type != FCT_TARGET ||
6071 fcport->loop_id == FC_NO_LOOP_ID)
6072 return QLA_FUNCTION_FAILED;
6073
6074 priority = qla24xx_get_fcp_prio(vha, fcport);
6075 if (priority < 0)
6076 return QLA_FUNCTION_FAILED;
6077
6078 if (IS_P3P_TYPE(vha->hw)) {
6079 fcport->fcp_prio = priority & 0xf;
6080 return QLA_SUCCESS;
6081 }
6082
6083 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
6084 if (ret == QLA_SUCCESS) {
6085 if (fcport->fcp_prio != priority)
6086 ql_dbg(ql_dbg_user, vha, 0x709e,
6087 "Updated FCP_CMND priority - value=%d loop_id=%d "
6088 "port_id=%02x%02x%02x.\n", priority,
6089 fcport->loop_id, fcport->d_id.b.domain,
6090 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6091 fcport->fcp_prio = priority & 0xf;
6092 } else
6093 ql_dbg(ql_dbg_user, vha, 0x704f,
6094 "Unable to update FCP_CMND priority - ret=0x%x for "
6095 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
6096 fcport->d_id.b.domain, fcport->d_id.b.area,
6097 fcport->d_id.b.al_pa);
6098 return ret;
6099 }
6100
6101 /*
6102 * qla24xx_update_all_fcp_prio
6103 * Activates fcp priority for all the logged in ports
6104 *
6105 * Input:
6106 * ha = adapter block pointer.
6107 *
6108 * Return:
6109 * QLA_SUCCESS or QLA_FUNCTION_FAILED
6110 *
6111 * Context:
6112 * Kernel context.
6113 */
6114 int
6115 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
6116 {
6117 int ret;
6118 fc_port_t *fcport;
6119
6120 ret = QLA_FUNCTION_FAILED;
6121 /* We need to set priority for all logged in ports */
6122 list_for_each_entry(fcport, &vha->vp_fcports, list)
6123 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
6124
6125 return ret;
6126 }
Linux with added FPC-III support