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mfd: wm8350-i2c: Make sure the i2c regmap functions are compiled
[linux/fpc-iii.git] / drivers / usb / host / ehci-fsl.c
blobce65c4ec6550eab974652eae54c63ae2053445d9
1 /*
2 * Copyright 2005-2009 MontaVista Software, Inc.
3 * Copyright 2008,2012 Freescale Semiconductor, Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 *
19 * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided
20 * by Hunter Wu.
21 * Power Management support by Dave Liu <daveliu@freescale.com>,
22 * Jerry Huang <Chang-Ming.Huang@freescale.com> and
23 * Anton Vorontsov <avorontsov@ru.mvista.com>.
24 */
25
26 #include <linux/kernel.h>
27 #include <linux/types.h>
28 #include <linux/delay.h>
29 #include <linux/pm.h>
30 #include <linux/err.h>
31 #include <linux/platform_device.h>
32 #include <linux/fsl_devices.h>
33
34 #include "ehci-fsl.h"
35
36 /* configure so an HC device and id are always provided */
37 /* always called with process context; sleeping is OK */
38
39 /**
40 * usb_hcd_fsl_probe - initialize FSL-based HCDs
41 * @drvier: Driver to be used for this HCD
42 * @pdev: USB Host Controller being probed
43 * Context: !in_interrupt()
44 *
45 * Allocates basic resources for this USB host controller.
46 *
47 */
48 static int usb_hcd_fsl_probe(const struct hc_driver *driver,
49 struct platform_device *pdev)
50 {
51 struct fsl_usb2_platform_data *pdata;
52 struct usb_hcd *hcd;
53 struct resource *res;
54 int irq;
55 int retval;
56
57 pr_debug("initializing FSL-SOC USB Controller\n");
58
59 /* Need platform data for setup */
60 pdata = (struct fsl_usb2_platform_data *)dev_get_platdata(&pdev->dev);
61 if (!pdata) {
62 dev_err(&pdev->dev,
63 "No platform data for %s.\n", dev_name(&pdev->dev));
64 return -ENODEV;
65 }
66
67 /*
68 * This is a host mode driver, verify that we're supposed to be
69 * in host mode.
70 */
71 if (!((pdata->operating_mode == FSL_USB2_DR_HOST) ||
72 (pdata->operating_mode == FSL_USB2_MPH_HOST) ||
73 (pdata->operating_mode == FSL_USB2_DR_OTG))) {
74 dev_err(&pdev->dev,
75 "Non Host Mode configured for %s. Wrong driver linked.\n",
76 dev_name(&pdev->dev));
77 return -ENODEV;
78 }
79
80 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
81 if (!res) {
82 dev_err(&pdev->dev,
83 "Found HC with no IRQ. Check %s setup!\n",
84 dev_name(&pdev->dev));
85 return -ENODEV;
86 }
87 irq = res->start;
88
89 hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
90 if (!hcd) {
91 retval = -ENOMEM;
92 goto err1;
93 }
94
95 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
96 if (!res) {
97 dev_err(&pdev->dev,
98 "Found HC with no register addr. Check %s setup!\n",
99 dev_name(&pdev->dev));
100 retval = -ENODEV;
101 goto err2;
102 }
103 hcd->rsrc_start = res->start;
104 hcd->rsrc_len = resource_size(res);
105 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
106 driver->description)) {
107 dev_dbg(&pdev->dev, "controller already in use\n");
108 retval = -EBUSY;
109 goto err2;
110 }
111 hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
112
113 if (hcd->regs == NULL) {
114 dev_dbg(&pdev->dev, "error mapping memory\n");
115 retval = -EFAULT;
116 goto err3;
117 }
118
119 pdata->regs = hcd->regs;
120
121 if (pdata->power_budget)
122 hcd->power_budget = pdata->power_budget;
123
124 /*
125 * do platform specific init: check the clock, grab/config pins, etc.
126 */
127 if (pdata->init && pdata->init(pdev)) {
128 retval = -ENODEV;
129 goto err4;
130 }
131
132 /* Enable USB controller, 83xx or 8536 */
133 if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6)
134 setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
135
136 /* Don't need to set host mode here. It will be done by tdi_reset() */
137
138 retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
139 if (retval != 0)
140 goto err4;
141
142 #ifdef CONFIG_USB_OTG
143 if (pdata->operating_mode == FSL_USB2_DR_OTG) {
144 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
145
146 hcd->phy = usb_get_phy(USB_PHY_TYPE_USB2);
147 dev_dbg(&pdev->dev, "hcd=0x%p ehci=0x%p, phy=0x%p\n",
148 hcd, ehci, hcd->phy);
149
150 if (!IS_ERR_OR_NULL(hcd->phy)) {
151 retval = otg_set_host(hcd->phy->otg,
152 &ehci_to_hcd(ehci)->self);
153 if (retval) {
154 usb_put_phy(hcd->phy);
155 goto err4;
156 }
157 } else {
158 dev_err(&pdev->dev, "can't find phy\n");
159 retval = -ENODEV;
160 goto err4;
161 }
162 }
163 #endif
164 return retval;
165
166 err4:
167 iounmap(hcd->regs);
168 err3:
169 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
170 err2:
171 usb_put_hcd(hcd);
172 err1:
173 dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
174 if (pdata->exit)
175 pdata->exit(pdev);
176 return retval;
177 }
178
179 /* may be called without controller electrically present */
180 /* may be called with controller, bus, and devices active */
181
182 /**
183 * usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs
184 * @dev: USB Host Controller being removed
185 * Context: !in_interrupt()
186 *
187 * Reverses the effect of usb_hcd_fsl_probe().
188 *
189 */
190 static void usb_hcd_fsl_remove(struct usb_hcd *hcd,
191 struct platform_device *pdev)
192 {
193 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
194
195 if (!IS_ERR_OR_NULL(hcd->phy)) {
196 otg_set_host(hcd->phy->otg, NULL);
197 usb_put_phy(hcd->phy);
198 }
199
200 usb_remove_hcd(hcd);
201
202 /*
203 * do platform specific un-initialization:
204 * release iomux pins, disable clock, etc.
205 */
206 if (pdata->exit)
207 pdata->exit(pdev);
208 iounmap(hcd->regs);
209 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
210 usb_put_hcd(hcd);
211 }
212
213 static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
214 enum fsl_usb2_phy_modes phy_mode,
215 unsigned int port_offset)
216 {
217 u32 portsc;
218 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
219 void __iomem *non_ehci = hcd->regs;
220 struct device *dev = hcd->self.controller;
221 struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
222
223 if (pdata->controller_ver < 0) {
224 dev_warn(hcd->self.controller, "Could not get controller version\n");
225 return -ENODEV;
226 }
227
228 portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
229 portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
230
231 switch (phy_mode) {
232 case FSL_USB2_PHY_ULPI:
233 if (pdata->have_sysif_regs && pdata->controller_ver) {
234 /* controller version 1.6 or above */
235 clrbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
236 setbits32(non_ehci + FSL_SOC_USB_CTRL,
237 ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN);
238 }
239 portsc |= PORT_PTS_ULPI;
240 break;
241 case FSL_USB2_PHY_SERIAL:
242 portsc |= PORT_PTS_SERIAL;
243 break;
244 case FSL_USB2_PHY_UTMI_WIDE:
245 portsc |= PORT_PTS_PTW;
246 /* fall through */
247 case FSL_USB2_PHY_UTMI:
248 if (pdata->have_sysif_regs && pdata->controller_ver) {
249 /* controller version 1.6 or above */
250 setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
251 mdelay(FSL_UTMI_PHY_DLY); /* Delay for UTMI PHY CLK to
252 become stable - 10ms*/
253 }
254 /* enable UTMI PHY */
255 if (pdata->have_sysif_regs)
256 setbits32(non_ehci + FSL_SOC_USB_CTRL,
257 CTRL_UTMI_PHY_EN);
258 portsc |= PORT_PTS_UTMI;
259 break;
260 case FSL_USB2_PHY_NONE:
261 break;
262 }
263
264 if (pdata->have_sysif_regs &&
265 pdata->controller_ver > FSL_USB_VER_1_6 &&
266 (phy_mode == FSL_USB2_PHY_ULPI)) {
267 /* check PHY_CLK_VALID to get phy clk valid */
268 if (!(spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
269 PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0) ||
270 in_be32(non_ehci + FSL_SOC_USB_PRICTRL))) {
271 printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
272 return -EINVAL;
273 }
274 }
275
276 ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
277
278 if (phy_mode != FSL_USB2_PHY_ULPI && pdata->have_sysif_regs)
279 setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN);
280
281 return 0;
282 }
283
284 static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
285 {
286 struct usb_hcd *hcd = ehci_to_hcd(ehci);
287 struct fsl_usb2_platform_data *pdata;
288 void __iomem *non_ehci = hcd->regs;
289
290 pdata = dev_get_platdata(hcd->self.controller);
291
292 if (pdata->have_sysif_regs) {
293 /*
294 * Turn on cache snooping hardware, since some PowerPC platforms
295 * wholly rely on hardware to deal with cache coherent
296 */
297
298 /* Setup Snooping for all the 4GB space */
299 /* SNOOP1 starts from 0x0, size 2G */
300 out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB);
301 /* SNOOP2 starts from 0x80000000, size 2G */
302 out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
303 }
304
305 if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
306 (pdata->operating_mode == FSL_USB2_DR_OTG))
307 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
308 return -EINVAL;
309
310 if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
311 unsigned int chip, rev, svr;
312
313 svr = mfspr(SPRN_SVR);
314 chip = svr >> 16;
315 rev = (svr >> 4) & 0xf;
316
317 /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
318 if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
319 ehci->has_fsl_port_bug = 1;
320
321 if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
322 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
323 return -EINVAL;
324
325 if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
326 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1))
327 return -EINVAL;
328 }
329
330 if (pdata->have_sysif_regs) {
331 #ifdef CONFIG_FSL_SOC_BOOKE
332 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
333 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
334 #else
335 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
336 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
337 #endif
338 out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
339 }
340
341 return 0;
342 }
343
344 /* called after powerup, by probe or system-pm "wakeup" */
345 static int ehci_fsl_reinit(struct ehci_hcd *ehci)
346 {
347 if (ehci_fsl_usb_setup(ehci))
348 return -EINVAL;
349
350 return 0;
351 }
352
353 /* called during probe() after chip reset completes */
354 static int ehci_fsl_setup(struct usb_hcd *hcd)
355 {
356 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
357 int retval;
358 struct fsl_usb2_platform_data *pdata;
359 struct device *dev;
360
361 dev = hcd->self.controller;
362 pdata = dev_get_platdata(hcd->self.controller);
363 ehci->big_endian_desc = pdata->big_endian_desc;
364 ehci->big_endian_mmio = pdata->big_endian_mmio;
365
366 /* EHCI registers start at offset 0x100 */
367 ehci->caps = hcd->regs + 0x100;
368
369 #ifdef CONFIG_PPC_83xx
370 /*
371 * Deal with MPC834X that need port power to be cycled after the power
372 * fault condition is removed. Otherwise the state machine does not
373 * reflect PORTSC[CSC] correctly.
374 */
375 ehci->need_oc_pp_cycle = 1;
376 #endif
377
378 hcd->has_tt = 1;
379
380 retval = ehci_setup(hcd);
381 if (retval)
382 return retval;
383
384 if (of_device_is_compatible(dev->parent->of_node,
385 "fsl,mpc5121-usb2-dr")) {
386 /*
387 * set SBUSCFG:AHBBRST so that control msgs don't
388 * fail when doing heavy PATA writes.
389 */
390 ehci_writel(ehci, SBUSCFG_INCR8,
391 hcd->regs + FSL_SOC_USB_SBUSCFG);
392 }
393
394 retval = ehci_fsl_reinit(ehci);
395 return retval;
396 }
397
398 struct ehci_fsl {
399 struct ehci_hcd ehci;
400
401 #ifdef CONFIG_PM
402 /* Saved USB PHY settings, need to restore after deep sleep. */
403 u32 usb_ctrl;
404 #endif
405 };
406
407 #ifdef CONFIG_PM
408
409 #ifdef CONFIG_PPC_MPC512x
410 static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
411 {
412 struct usb_hcd *hcd = dev_get_drvdata(dev);
413 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
414 struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
415 u32 tmp;
416
417 #if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG)
418 u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
419 mode &= USBMODE_CM_MASK;
420 tmp = ehci_readl(ehci, hcd->regs + 0x140); /* usbcmd */
421
422 dev_dbg(dev, "suspend=%d already_suspended=%d "
423 "mode=%d usbcmd %08x\n", pdata->suspended,
424 pdata->already_suspended, mode, tmp);
425 #endif
426
427 /*
428 * If the controller is already suspended, then this must be a
429 * PM suspend. Remember this fact, so that we will leave the
430 * controller suspended at PM resume time.
431 */
432 if (pdata->suspended) {
433 dev_dbg(dev, "already suspended, leaving early\n");
434 pdata->already_suspended = 1;
435 return 0;
436 }
437
438 dev_dbg(dev, "suspending...\n");
439
440 ehci->rh_state = EHCI_RH_SUSPENDED;
441 dev->power.power_state = PMSG_SUSPEND;
442
443 /* ignore non-host interrupts */
444 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
445
446 /* stop the controller */
447 tmp = ehci_readl(ehci, &ehci->regs->command);
448 tmp &= ~CMD_RUN;
449 ehci_writel(ehci, tmp, &ehci->regs->command);
450
451 /* save EHCI registers */
452 pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
453 pdata->pm_command &= ~CMD_RUN;
454 pdata->pm_status = ehci_readl(ehci, &ehci->regs->status);
455 pdata->pm_intr_enable = ehci_readl(ehci, &ehci->regs->intr_enable);
456 pdata->pm_frame_index = ehci_readl(ehci, &ehci->regs->frame_index);
457 pdata->pm_segment = ehci_readl(ehci, &ehci->regs->segment);
458 pdata->pm_frame_list = ehci_readl(ehci, &ehci->regs->frame_list);
459 pdata->pm_async_next = ehci_readl(ehci, &ehci->regs->async_next);
460 pdata->pm_configured_flag =
461 ehci_readl(ehci, &ehci->regs->configured_flag);
462 pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
463 pdata->pm_usbgenctrl = ehci_readl(ehci,
464 hcd->regs + FSL_SOC_USB_USBGENCTRL);
465
466 /* clear the W1C bits */
467 pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
468
469 pdata->suspended = 1;
470
471 /* clear PP to cut power to the port */
472 tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
473 tmp &= ~PORT_POWER;
474 ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
475
476 return 0;
477 }
478
479 static int ehci_fsl_mpc512x_drv_resume(struct device *dev)
480 {
481 struct usb_hcd *hcd = dev_get_drvdata(dev);
482 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
483 struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
484 u32 tmp;
485
486 dev_dbg(dev, "suspend=%d already_suspended=%d\n",
487 pdata->suspended, pdata->already_suspended);
488
489 /*
490 * If the controller was already suspended at suspend time,
491 * then don't resume it now.
492 */
493 if (pdata->already_suspended) {
494 dev_dbg(dev, "already suspended, leaving early\n");
495 pdata->already_suspended = 0;
496 return 0;
497 }
498
499 if (!pdata->suspended) {
500 dev_dbg(dev, "not suspended, leaving early\n");
501 return 0;
502 }
503
504 pdata->suspended = 0;
505
506 dev_dbg(dev, "resuming...\n");
507
508 /* set host mode */
509 tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
510 ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
511
512 ehci_writel(ehci, pdata->pm_usbgenctrl,
513 hcd->regs + FSL_SOC_USB_USBGENCTRL);
514 ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
515 hcd->regs + FSL_SOC_USB_ISIPHYCTRL);
516
517 ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
518
519 /* restore EHCI registers */
520 ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
521 ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
522 ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
523 ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
524 ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
525 ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
526 ehci_writel(ehci, pdata->pm_configured_flag,
527 &ehci->regs->configured_flag);
528 ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
529
530 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
531 ehci->rh_state = EHCI_RH_RUNNING;
532 dev->power.power_state = PMSG_ON;
533
534 tmp = ehci_readl(ehci, &ehci->regs->command);
535 tmp |= CMD_RUN;
536 ehci_writel(ehci, tmp, &ehci->regs->command);
537
538 usb_hcd_resume_root_hub(hcd);
539
540 return 0;
541 }
542 #else
543 static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
544 {
545 return 0;
546 }
547
548 static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev)
549 {
550 return 0;
551 }
552 #endif /* CONFIG_PPC_MPC512x */
553
554 static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
555 {
556 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
557
558 return container_of(ehci, struct ehci_fsl, ehci);
559 }
560
561 static int ehci_fsl_drv_suspend(struct device *dev)
562 {
563 struct usb_hcd *hcd = dev_get_drvdata(dev);
564 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
565 void __iomem *non_ehci = hcd->regs;
566
567 if (of_device_is_compatible(dev->parent->of_node,
568 "fsl,mpc5121-usb2-dr")) {
569 return ehci_fsl_mpc512x_drv_suspend(dev);
570 }
571
572 ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
573 device_may_wakeup(dev));
574 if (!fsl_deep_sleep())
575 return 0;
576
577 ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL);
578 return 0;
579 }
580
581 static int ehci_fsl_drv_resume(struct device *dev)
582 {
583 struct usb_hcd *hcd = dev_get_drvdata(dev);
584 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
585 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
586 void __iomem *non_ehci = hcd->regs;
587
588 if (of_device_is_compatible(dev->parent->of_node,
589 "fsl,mpc5121-usb2-dr")) {
590 return ehci_fsl_mpc512x_drv_resume(dev);
591 }
592
593 ehci_prepare_ports_for_controller_resume(ehci);
594 if (!fsl_deep_sleep())
595 return 0;
596
597 usb_root_hub_lost_power(hcd->self.root_hub);
598
599 /* Restore USB PHY settings and enable the controller. */
600 out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl);
601
602 ehci_reset(ehci);
603 ehci_fsl_reinit(ehci);
604
605 return 0;
606 }
607
608 static int ehci_fsl_drv_restore(struct device *dev)
609 {
610 struct usb_hcd *hcd = dev_get_drvdata(dev);
611
612 usb_root_hub_lost_power(hcd->self.root_hub);
613 return 0;
614 }
615
616 static struct dev_pm_ops ehci_fsl_pm_ops = {
617 .suspend = ehci_fsl_drv_suspend,
618 .resume = ehci_fsl_drv_resume,
619 .restore = ehci_fsl_drv_restore,
620 };
621
622 #define EHCI_FSL_PM_OPS (&ehci_fsl_pm_ops)
623 #else
624 #define EHCI_FSL_PM_OPS NULL
625 #endif /* CONFIG_PM */
626
627 #ifdef CONFIG_USB_OTG
628 static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port)
629 {
630 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
631 u32 status;
632
633 if (!port)
634 return -EINVAL;
635
636 port--;
637
638 /* start port reset before HNP protocol time out */
639 status = readl(&ehci->regs->port_status[port]);
640 if (!(status & PORT_CONNECT))
641 return -ENODEV;
642
643 /* khubd will finish the reset later */
644 if (ehci_is_TDI(ehci)) {
645 writel(PORT_RESET |
646 (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)),
647 &ehci->regs->port_status[port]);
648 } else {
649 writel(PORT_RESET, &ehci->regs->port_status[port]);
650 }
651
652 return 0;
653 }
654 #else
655 #define ehci_start_port_reset NULL
656 #endif /* CONFIG_USB_OTG */
657
658
659 static const struct hc_driver ehci_fsl_hc_driver = {
660 .description = hcd_name,
661 .product_desc = "Freescale On-Chip EHCI Host Controller",
662 .hcd_priv_size = sizeof(struct ehci_fsl),
663
664 /*
665 * generic hardware linkage
666 */
667 .irq = ehci_irq,
668 .flags = HCD_USB2 | HCD_MEMORY,
669
670 /*
671 * basic lifecycle operations
672 */
673 .reset = ehci_fsl_setup,
674 .start = ehci_run,
675 .stop = ehci_stop,
676 .shutdown = ehci_shutdown,
677
678 /*
679 * managing i/o requests and associated device resources
680 */
681 .urb_enqueue = ehci_urb_enqueue,
682 .urb_dequeue = ehci_urb_dequeue,
683 .endpoint_disable = ehci_endpoint_disable,
684 .endpoint_reset = ehci_endpoint_reset,
685
686 /*
687 * scheduling support
688 */
689 .get_frame_number = ehci_get_frame,
690
691 /*
692 * root hub support
693 */
694 .hub_status_data = ehci_hub_status_data,
695 .hub_control = ehci_hub_control,
696 .bus_suspend = ehci_bus_suspend,
697 .bus_resume = ehci_bus_resume,
698 .start_port_reset = ehci_start_port_reset,
699 .relinquish_port = ehci_relinquish_port,
700 .port_handed_over = ehci_port_handed_over,
701
702 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
703 };
704
705 static int ehci_fsl_drv_probe(struct platform_device *pdev)
706 {
707 if (usb_disabled())
708 return -ENODEV;
709
710 /* FIXME we only want one one probe() not two */
711 return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev);
712 }
713
714 static int ehci_fsl_drv_remove(struct platform_device *pdev)
715 {
716 struct usb_hcd *hcd = platform_get_drvdata(pdev);
717
718 /* FIXME we only want one one remove() not two */
719 usb_hcd_fsl_remove(hcd, pdev);
720 return 0;
721 }
722
723 MODULE_ALIAS("platform:fsl-ehci");
724
725 static struct platform_driver ehci_fsl_driver = {
726 .probe = ehci_fsl_drv_probe,
727 .remove = ehci_fsl_drv_remove,
728 .shutdown = usb_hcd_platform_shutdown,
729 .driver = {
730 .name = "fsl-ehci",
731 .owner = THIS_MODULE,
732 .pm = EHCI_FSL_PM_OPS,
733 },
734 };
Linux with added FPC-III support