mfd: wm8350-i2c: Make sure the i2c regmap functions are compiled
[linux/fpc-iii.git] / drivers / w1 / w1_io.c
blobe10acc23773395699d2bc8f19b37cb32f781fcc3
1 /*
2 * w1_io.c
4 * Copyright (c) 2004 Evgeniy Polyakov <zbr@ioremap.net>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <asm/io.h>
24 #include <linux/delay.h>
25 #include <linux/moduleparam.h>
26 #include <linux/module.h>
28 #include "w1.h"
29 #include "w1_log.h"
31 static int w1_delay_parm = 1;
32 module_param_named(delay_coef, w1_delay_parm, int, 0);
34 static int w1_disable_irqs = 0;
35 module_param_named(disable_irqs, w1_disable_irqs, int, 0);
37 static u8 w1_crc8_table[] = {
38 0, 94, 188, 226, 97, 63, 221, 131, 194, 156, 126, 32, 163, 253, 31, 65,
39 157, 195, 33, 127, 252, 162, 64, 30, 95, 1, 227, 189, 62, 96, 130, 220,
40 35, 125, 159, 193, 66, 28, 254, 160, 225, 191, 93, 3, 128, 222, 60, 98,
41 190, 224, 2, 92, 223, 129, 99, 61, 124, 34, 192, 158, 29, 67, 161, 255,
42 70, 24, 250, 164, 39, 121, 155, 197, 132, 218, 56, 102, 229, 187, 89, 7,
43 219, 133, 103, 57, 186, 228, 6, 88, 25, 71, 165, 251, 120, 38, 196, 154,
44 101, 59, 217, 135, 4, 90, 184, 230, 167, 249, 27, 69, 198, 152, 122, 36,
45 248, 166, 68, 26, 153, 199, 37, 123, 58, 100, 134, 216, 91, 5, 231, 185,
46 140, 210, 48, 110, 237, 179, 81, 15, 78, 16, 242, 172, 47, 113, 147, 205,
47 17, 79, 173, 243, 112, 46, 204, 146, 211, 141, 111, 49, 178, 236, 14, 80,
48 175, 241, 19, 77, 206, 144, 114, 44, 109, 51, 209, 143, 12, 82, 176, 238,
49 50, 108, 142, 208, 83, 13, 239, 177, 240, 174, 76, 18, 145, 207, 45, 115,
50 202, 148, 118, 40, 171, 245, 23, 73, 8, 86, 180, 234, 105, 55, 213, 139,
51 87, 9, 235, 181, 54, 104, 138, 212, 149, 203, 41, 119, 244, 170, 72, 22,
52 233, 183, 85, 11, 136, 214, 52, 106, 43, 117, 151, 201, 74, 20, 246, 168,
53 116, 42, 200, 150, 21, 75, 169, 247, 182, 232, 10, 84, 215, 137, 107, 53
56 static void w1_delay(unsigned long tm)
58 udelay(tm * w1_delay_parm);
61 static void w1_write_bit(struct w1_master *dev, int bit);
62 static u8 w1_read_bit(struct w1_master *dev);
64 /**
65 * Generates a write-0 or write-1 cycle and samples the level.
67 static u8 w1_touch_bit(struct w1_master *dev, int bit)
69 if (dev->bus_master->touch_bit)
70 return dev->bus_master->touch_bit(dev->bus_master->data, bit);
71 else if (bit)
72 return w1_read_bit(dev);
73 else {
74 w1_write_bit(dev, 0);
75 return 0;
79 /**
80 * Generates a write-0 or write-1 cycle.
81 * Only call if dev->bus_master->touch_bit is NULL
83 static void w1_write_bit(struct w1_master *dev, int bit)
85 unsigned long flags = 0;
87 if(w1_disable_irqs) local_irq_save(flags);
89 if (bit) {
90 dev->bus_master->write_bit(dev->bus_master->data, 0);
91 w1_delay(6);
92 dev->bus_master->write_bit(dev->bus_master->data, 1);
93 w1_delay(64);
94 } else {
95 dev->bus_master->write_bit(dev->bus_master->data, 0);
96 w1_delay(60);
97 dev->bus_master->write_bit(dev->bus_master->data, 1);
98 w1_delay(10);
101 if(w1_disable_irqs) local_irq_restore(flags);
105 * Pre-write operation, currently only supporting strong pullups.
106 * Program the hardware for a strong pullup, if one has been requested and
107 * the hardware supports it.
109 * @param dev the master device
111 static void w1_pre_write(struct w1_master *dev)
113 if (dev->pullup_duration &&
114 dev->enable_pullup && dev->bus_master->set_pullup) {
115 dev->bus_master->set_pullup(dev->bus_master->data,
116 dev->pullup_duration);
121 * Post-write operation, currently only supporting strong pullups.
122 * If a strong pullup was requested, clear it if the hardware supports
123 * them, or execute the delay otherwise, in either case clear the request.
125 * @param dev the master device
127 static void w1_post_write(struct w1_master *dev)
129 if (dev->pullup_duration) {
130 if (dev->enable_pullup && dev->bus_master->set_pullup)
131 dev->bus_master->set_pullup(dev->bus_master->data, 0);
132 else
133 msleep(dev->pullup_duration);
134 dev->pullup_duration = 0;
139 * Writes 8 bits.
141 * @param dev the master device
142 * @param byte the byte to write
144 void w1_write_8(struct w1_master *dev, u8 byte)
146 int i;
148 if (dev->bus_master->write_byte) {
149 w1_pre_write(dev);
150 dev->bus_master->write_byte(dev->bus_master->data, byte);
152 else
153 for (i = 0; i < 8; ++i) {
154 if (i == 7)
155 w1_pre_write(dev);
156 w1_touch_bit(dev, (byte >> i) & 0x1);
158 w1_post_write(dev);
160 EXPORT_SYMBOL_GPL(w1_write_8);
164 * Generates a write-1 cycle and samples the level.
165 * Only call if dev->bus_master->touch_bit is NULL
167 static u8 w1_read_bit(struct w1_master *dev)
169 int result;
170 unsigned long flags = 0;
172 /* sample timing is critical here */
173 local_irq_save(flags);
174 dev->bus_master->write_bit(dev->bus_master->data, 0);
175 w1_delay(6);
176 dev->bus_master->write_bit(dev->bus_master->data, 1);
177 w1_delay(9);
179 result = dev->bus_master->read_bit(dev->bus_master->data);
180 local_irq_restore(flags);
182 w1_delay(55);
184 return result & 0x1;
188 * Does a triplet - used for searching ROM addresses.
189 * Return bits:
190 * bit 0 = id_bit
191 * bit 1 = comp_bit
192 * bit 2 = dir_taken
193 * If both bits 0 & 1 are set, the search should be restarted.
195 * @param dev the master device
196 * @param bdir the bit to write if both id_bit and comp_bit are 0
197 * @return bit fields - see above
199 u8 w1_triplet(struct w1_master *dev, int bdir)
201 if (dev->bus_master->triplet)
202 return dev->bus_master->triplet(dev->bus_master->data, bdir);
203 else {
204 u8 id_bit = w1_touch_bit(dev, 1);
205 u8 comp_bit = w1_touch_bit(dev, 1);
206 u8 retval;
208 if (id_bit && comp_bit)
209 return 0x03; /* error */
211 if (!id_bit && !comp_bit) {
212 /* Both bits are valid, take the direction given */
213 retval = bdir ? 0x04 : 0;
214 } else {
215 /* Only one bit is valid, take that direction */
216 bdir = id_bit;
217 retval = id_bit ? 0x05 : 0x02;
220 if (dev->bus_master->touch_bit)
221 w1_touch_bit(dev, bdir);
222 else
223 w1_write_bit(dev, bdir);
224 return retval;
229 * Reads 8 bits.
231 * @param dev the master device
232 * @return the byte read
234 u8 w1_read_8(struct w1_master *dev)
236 int i;
237 u8 res = 0;
239 if (dev->bus_master->read_byte)
240 res = dev->bus_master->read_byte(dev->bus_master->data);
241 else
242 for (i = 0; i < 8; ++i)
243 res |= (w1_touch_bit(dev,1) << i);
245 return res;
247 EXPORT_SYMBOL_GPL(w1_read_8);
250 * Writes a series of bytes.
252 * @param dev the master device
253 * @param buf pointer to the data to write
254 * @param len the number of bytes to write
256 void w1_write_block(struct w1_master *dev, const u8 *buf, int len)
258 int i;
260 if (dev->bus_master->write_block) {
261 w1_pre_write(dev);
262 dev->bus_master->write_block(dev->bus_master->data, buf, len);
264 else
265 for (i = 0; i < len; ++i)
266 w1_write_8(dev, buf[i]); /* calls w1_pre_write */
267 w1_post_write(dev);
269 EXPORT_SYMBOL_GPL(w1_write_block);
272 * Touches a series of bytes.
274 * @param dev the master device
275 * @param buf pointer to the data to write
276 * @param len the number of bytes to write
278 void w1_touch_block(struct w1_master *dev, u8 *buf, int len)
280 int i, j;
281 u8 tmp;
283 for (i = 0; i < len; ++i) {
284 tmp = 0;
285 for (j = 0; j < 8; ++j) {
286 if (j == 7)
287 w1_pre_write(dev);
288 tmp |= w1_touch_bit(dev, (buf[i] >> j) & 0x1) << j;
291 buf[i] = tmp;
294 EXPORT_SYMBOL_GPL(w1_touch_block);
297 * Reads a series of bytes.
299 * @param dev the master device
300 * @param buf pointer to the buffer to fill
301 * @param len the number of bytes to read
302 * @return the number of bytes read
304 u8 w1_read_block(struct w1_master *dev, u8 *buf, int len)
306 int i;
307 u8 ret;
309 if (dev->bus_master->read_block)
310 ret = dev->bus_master->read_block(dev->bus_master->data, buf, len);
311 else {
312 for (i = 0; i < len; ++i)
313 buf[i] = w1_read_8(dev);
314 ret = len;
317 return ret;
319 EXPORT_SYMBOL_GPL(w1_read_block);
322 * Issues a reset bus sequence.
324 * @param dev The bus master pointer
325 * @return 0=Device present, 1=No device present or error
327 int w1_reset_bus(struct w1_master *dev)
329 int result;
330 unsigned long flags = 0;
332 if(w1_disable_irqs) local_irq_save(flags);
334 if (dev->bus_master->reset_bus)
335 result = dev->bus_master->reset_bus(dev->bus_master->data) & 0x1;
336 else {
337 dev->bus_master->write_bit(dev->bus_master->data, 0);
338 /* minimum 480, max ? us
339 * be nice and sleep, except 18b20 spec lists 960us maximum,
340 * so until we can sleep with microsecond accuracy, spin.
341 * Feel free to come up with some other way to give up the
342 * cpu for such a short amount of time AND get it back in
343 * the maximum amount of time.
345 w1_delay(500);
346 dev->bus_master->write_bit(dev->bus_master->data, 1);
347 w1_delay(70);
349 result = dev->bus_master->read_bit(dev->bus_master->data) & 0x1;
350 /* minmum 70 (above) + 430 = 500 us
351 * There aren't any timing requirements between a reset and
352 * the following transactions. Sleeping is safe here.
354 /* w1_delay(430); min required time */
355 msleep(1);
358 if(w1_disable_irqs) local_irq_restore(flags);
360 return result;
362 EXPORT_SYMBOL_GPL(w1_reset_bus);
364 u8 w1_calc_crc8(u8 * data, int len)
366 u8 crc = 0;
368 while (len--)
369 crc = w1_crc8_table[crc ^ *data++];
371 return crc;
373 EXPORT_SYMBOL_GPL(w1_calc_crc8);
375 void w1_search_devices(struct w1_master *dev, u8 search_type, w1_slave_found_callback cb)
377 dev->attempts++;
378 if (dev->bus_master->search)
379 dev->bus_master->search(dev->bus_master->data, dev,
380 search_type, cb);
381 else
382 w1_search(dev, search_type, cb);
386 * Resets the bus and then selects the slave by sending either a skip rom
387 * or a rom match.
388 * The w1 master lock must be held.
390 * @param sl the slave to select
391 * @return 0=success, anything else=error
393 int w1_reset_select_slave(struct w1_slave *sl)
395 if (w1_reset_bus(sl->master))
396 return -1;
398 if (sl->master->slave_count == 1)
399 w1_write_8(sl->master, W1_SKIP_ROM);
400 else {
401 u8 match[9] = {W1_MATCH_ROM, };
402 u64 rn = le64_to_cpu(*((u64*)&sl->reg_num));
404 memcpy(&match[1], &rn, 8);
405 w1_write_block(sl->master, match, 9);
407 return 0;
409 EXPORT_SYMBOL_GPL(w1_reset_select_slave);
412 * When the workflow with a slave amongst many requires several
413 * successive commands a reset between each, this function is similar
414 * to doing a reset then a match ROM for the last matched ROM. The
415 * advantage being that the matched ROM step is skipped in favor of the
416 * resume command. The slave must support the command of course.
418 * If the bus has only one slave, traditionnaly the match ROM is skipped
419 * and a "SKIP ROM" is done for efficiency. On multi-slave busses, this
420 * doesn't work of course, but the resume command is the next best thing.
422 * The w1 master lock must be held.
424 * @param dev the master device
426 int w1_reset_resume_command(struct w1_master *dev)
428 if (w1_reset_bus(dev))
429 return -1;
431 /* This will make only the last matched slave perform a skip ROM. */
432 w1_write_8(dev, W1_RESUME_CMD);
433 return 0;
435 EXPORT_SYMBOL_GPL(w1_reset_resume_command);
438 * Put out a strong pull-up of the specified duration after the next write
439 * operation. Not all hardware supports strong pullups. Hardware that
440 * doesn't support strong pullups will sleep for the given time after the
441 * write operation without a strong pullup. This is a one shot request for
442 * the next write, specifying zero will clear a previous request.
443 * The w1 master lock must be held.
445 * @param delay time in milliseconds
446 * @return 0=success, anything else=error
448 void w1_next_pullup(struct w1_master *dev, int delay)
450 dev->pullup_duration = delay;
452 EXPORT_SYMBOL_GPL(w1_next_pullup);