drivers/watchdog/omap_wdt.c

   1 /*
   2  * omap_wdt.c
   3  *
   4  * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
   5  *
   6  * Author: MontaVista Software, Inc.
   7  *       <gdavis@mvista.com> or <source@mvista.com>
   8  *
   9  * 2003 (c) MontaVista Software, Inc. This file is licensed under the
  10  * terms of the GNU General Public License version 2. This program is
  11  * licensed "as is" without any warranty of any kind, whether express
  12  * or implied.
  13  *
  14  * History:
  15  *
  16  * 20030527: George G. Davis <gdavis@mvista.com>
  17  *      Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
  18  *      (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
  19  *      Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
  20  *
  21  * Copyright (c) 2004 Texas Instruments.
  22  *      1. Modified to support OMAP1610 32-KHz watchdog timer
  23  *      2. Ported to 2.6 kernel
  24  *
  25  * Copyright (c) 2005 David Brownell
  26  *      Use the driver model and standard identifiers; handle bigger timeouts.
  27  */
  28
  29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30
  31 #include <linux/module.h>
  32 #include <linux/types.h>
  33 #include <linux/kernel.h>
  34 #include <linux/mm.h>
  35 #include <linux/watchdog.h>
  36 #include <linux/reboot.h>
  37 #include <linux/init.h>
  38 #include <linux/err.h>
  39 #include <linux/platform_device.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/io.h>
  42 #include <linux/slab.h>
  43 #include <linux/pm_runtime.h>
  44 #include <linux/platform_data/omap-wd-timer.h>
  45
  46 #include "omap_wdt.h"
  47
  48 static bool nowayout = WATCHDOG_NOWAYOUT;
  49 module_param(nowayout, bool, 0);
  50 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
  51         "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  52
  53 static unsigned timer_margin;
  54 module_param(timer_margin, uint, 0);
  55 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
  56
  57 struct omap_wdt_dev {
  58         void __iomem    *base;          /* physical */
  59         struct device   *dev;
  60         bool            omap_wdt_users;
  61         struct resource *mem;
  62         int             wdt_trgr_pattern;
  63         struct mutex    lock;           /* to avoid races with PM */
  64 };
  65
  66 static void omap_wdt_reload(struct omap_wdt_dev *wdev)
  67 {
  68         void __iomem    *base = wdev->base;
  69
  70         /* wait for posted write to complete */
  71         while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
  72                 cpu_relax();
  73
  74         wdev->wdt_trgr_pattern = ~wdev->wdt_trgr_pattern;
  75         __raw_writel(wdev->wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
  76
  77         /* wait for posted write to complete */
  78         while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
  79                 cpu_relax();
  80         /* reloaded WCRR from WLDR */
  81 }
  82
  83 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
  84 {
  85         void __iomem *base = wdev->base;
  86
  87         /* Sequence to enable the watchdog */
  88         __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
  89         while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
  90                 cpu_relax();
  91
  92         __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
  93         while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
  94                 cpu_relax();
  95 }
  96
  97 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
  98 {
  99         void __iomem *base = wdev->base;
 100
 101         /* sequence required to disable watchdog */
 102         __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
 103         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
 104                 cpu_relax();
 105
 106         __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
 107         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
 108                 cpu_relax();
 109 }
 110
 111 static void omap_wdt_set_timer(struct omap_wdt_dev *wdev,
 112                                    unsigned int timeout)
 113 {
 114         u32 pre_margin = GET_WLDR_VAL(timeout);
 115         void __iomem *base = wdev->base;
 116
 117         /* just count up at 32 KHz */
 118         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
 119                 cpu_relax();
 120
 121         __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
 122         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
 123                 cpu_relax();
 124 }
 125
 126 static int omap_wdt_start(struct watchdog_device *wdog)
 127 {
 128         struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 129         void __iomem *base = wdev->base;
 130
 131         mutex_lock(&wdev->lock);
 132
 133         wdev->omap_wdt_users = true;
 134
 135         pm_runtime_get_sync(wdev->dev);
 136
 137         /*
 138          * Make sure the watchdog is disabled. This is unfortunately required
 139          * because writing to various registers with the watchdog running has no
 140          * effect.
 141          */
 142         omap_wdt_disable(wdev);
 143
 144         /* initialize prescaler */
 145         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
 146                 cpu_relax();
 147
 148         __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
 149         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
 150                 cpu_relax();
 151
 152         omap_wdt_set_timer(wdev, wdog->timeout);
 153         omap_wdt_reload(wdev); /* trigger loading of new timeout value */
 154         omap_wdt_enable(wdev);
 155
 156         mutex_unlock(&wdev->lock);
 157
 158         return 0;
 159 }
 160
 161 static int omap_wdt_stop(struct watchdog_device *wdog)
 162 {
 163         struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 164
 165         mutex_lock(&wdev->lock);
 166         omap_wdt_disable(wdev);
 167         pm_runtime_put_sync(wdev->dev);
 168         wdev->omap_wdt_users = false;
 169         mutex_unlock(&wdev->lock);
 170         return 0;
 171 }
 172
 173 static int omap_wdt_ping(struct watchdog_device *wdog)
 174 {
 175         struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 176
 177         mutex_lock(&wdev->lock);
 178         omap_wdt_reload(wdev);
 179         mutex_unlock(&wdev->lock);
 180
 181         return 0;
 182 }
 183
 184 static int omap_wdt_set_timeout(struct watchdog_device *wdog,
 185                                 unsigned int timeout)
 186 {
 187         struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 188
 189         mutex_lock(&wdev->lock);
 190         omap_wdt_disable(wdev);
 191         omap_wdt_set_timer(wdev, timeout);
 192         omap_wdt_enable(wdev);
 193         omap_wdt_reload(wdev);
 194         wdog->timeout = timeout;
 195         mutex_unlock(&wdev->lock);
 196
 197         return 0;
 198 }
 199
 200 static const struct watchdog_info omap_wdt_info = {
 201         .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
 202         .identity = "OMAP Watchdog",
 203 };
 204
 205 static const struct watchdog_ops omap_wdt_ops = {
 206         .owner          = THIS_MODULE,
 207         .start          = omap_wdt_start,
 208         .stop           = omap_wdt_stop,
 209         .ping           = omap_wdt_ping,
 210         .set_timeout    = omap_wdt_set_timeout,
 211 };
 212
 213 static int omap_wdt_probe(struct platform_device *pdev)
 214 {
 215         struct omap_wd_timer_platform_data *pdata = pdev->dev.platform_data;
 216         struct watchdog_device *omap_wdt;
 217         struct resource *res, *mem;
 218         struct omap_wdt_dev *wdev;
 219         u32 rs;
 220         int ret;
 221
 222         omap_wdt = devm_kzalloc(&pdev->dev, sizeof(*omap_wdt), GFP_KERNEL);
 223         if (!omap_wdt)
 224                 return -ENOMEM;
 225
 226         /* reserve static register mappings */
 227         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 228         if (!res)
 229                 return -ENOENT;
 230
 231         mem = devm_request_mem_region(&pdev->dev, res->start,
 232                                       resource_size(res), pdev->name);
 233         if (!mem)
 234                 return -EBUSY;
 235
 236         wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
 237         if (!wdev)
 238                 return -ENOMEM;
 239
 240         wdev->omap_wdt_users    = false;
 241         wdev->mem               = mem;
 242         wdev->dev               = &pdev->dev;
 243         wdev->wdt_trgr_pattern  = 0x1234;
 244         mutex_init(&wdev->lock);
 245
 246         wdev->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
 247         if (!wdev->base)
 248                 return -ENOMEM;
 249
 250         omap_wdt->info        = &omap_wdt_info;
 251         omap_wdt->ops         = &omap_wdt_ops;
 252         omap_wdt->min_timeout = TIMER_MARGIN_MIN;
 253         omap_wdt->max_timeout = TIMER_MARGIN_MAX;
 254
 255         if (timer_margin >= TIMER_MARGIN_MIN &&
 256             timer_margin <= TIMER_MARGIN_MAX)
 257                 omap_wdt->timeout = timer_margin;
 258         else
 259                 omap_wdt->timeout = TIMER_MARGIN_DEFAULT;
 260
 261         watchdog_set_drvdata(omap_wdt, wdev);
 262         watchdog_set_nowayout(omap_wdt, nowayout);
 263
 264         platform_set_drvdata(pdev, omap_wdt);
 265
 266         pm_runtime_enable(wdev->dev);
 267         pm_runtime_get_sync(wdev->dev);
 268
 269         if (pdata && pdata->read_reset_sources)
 270                 rs = pdata->read_reset_sources();
 271         else
 272                 rs = 0;
 273         omap_wdt->bootstatus = (rs & (1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT)) ?
 274                                 WDIOF_CARDRESET : 0;
 275
 276         omap_wdt_disable(wdev);
 277
 278         ret = watchdog_register_device(omap_wdt);
 279         if (ret) {
 280                 pm_runtime_disable(wdev->dev);
 281                 return ret;
 282         }
 283
 284         pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
 285                 __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
 286                 omap_wdt->timeout);
 287
 288         pm_runtime_put_sync(wdev->dev);
 289
 290         return 0;
 291 }
 292
 293 static void omap_wdt_shutdown(struct platform_device *pdev)
 294 {
 295         struct watchdog_device *wdog = platform_get_drvdata(pdev);
 296         struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 297
 298         mutex_lock(&wdev->lock);
 299         if (wdev->omap_wdt_users) {
 300                 omap_wdt_disable(wdev);
 301                 pm_runtime_put_sync(wdev->dev);
 302         }
 303         mutex_unlock(&wdev->lock);
 304 }
 305
 306 static int omap_wdt_remove(struct platform_device *pdev)
 307 {
 308         struct watchdog_device *wdog = platform_get_drvdata(pdev);
 309         struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 310
 311         pm_runtime_disable(wdev->dev);
 312         watchdog_unregister_device(wdog);
 313
 314         return 0;
 315 }
 316
 317 #ifdef  CONFIG_PM
 318
 319 /* REVISIT ... not clear this is the best way to handle system suspend; and
 320  * it's very inappropriate for selective device suspend (e.g. suspending this
 321  * through sysfs rather than by stopping the watchdog daemon).  Also, this
 322  * may not play well enough with NOWAYOUT...
 323  */
 324
 325 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
 326 {
 327         struct watchdog_device *wdog = platform_get_drvdata(pdev);
 328         struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 329
 330         mutex_lock(&wdev->lock);
 331         if (wdev->omap_wdt_users) {
 332                 omap_wdt_disable(wdev);
 333                 pm_runtime_put_sync(wdev->dev);
 334         }
 335         mutex_unlock(&wdev->lock);
 336
 337         return 0;
 338 }
 339
 340 static int omap_wdt_resume(struct platform_device *pdev)
 341 {
 342         struct watchdog_device *wdog = platform_get_drvdata(pdev);
 343         struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 344
 345         mutex_lock(&wdev->lock);
 346         if (wdev->omap_wdt_users) {
 347                 pm_runtime_get_sync(wdev->dev);
 348                 omap_wdt_enable(wdev);
 349                 omap_wdt_reload(wdev);
 350         }
 351         mutex_unlock(&wdev->lock);
 352
 353         return 0;
 354 }
 355
 356 #else
 357 #define omap_wdt_suspend        NULL
 358 #define omap_wdt_resume         NULL
 359 #endif
 360
 361 static const struct of_device_id omap_wdt_of_match[] = {
 362         { .compatible = "ti,omap3-wdt", },
 363         {},
 364 };
 365 MODULE_DEVICE_TABLE(of, omap_wdt_of_match);
 366
 367 static struct platform_driver omap_wdt_driver = {
 368         .probe          = omap_wdt_probe,
 369         .remove         = omap_wdt_remove,
 370         .shutdown       = omap_wdt_shutdown,
 371         .suspend        = omap_wdt_suspend,
 372         .resume         = omap_wdt_resume,
 373         .driver         = {
 374                 .owner  = THIS_MODULE,
 375                 .name   = "omap_wdt",
 376                 .of_match_table = omap_wdt_of_match,
 377         },
 378 };
 379
 380 module_platform_driver(omap_wdt_driver);
 381
 382 MODULE_AUTHOR("George G. Davis");
 383 MODULE_LICENSE("GPL");
 384 MODULE_ALIAS("platform:omap_wdt");