drivers/clk/sunxi/clk-a10-mod1.c

   1 /*
   2  * Copyright 2013 Emilio López
   3  *
   4  * Emilio López <emilio@elopez.com.ar>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <linux/clk-provider.h>
  18 #include <linux/io.h>
  19 #include <linux/of.h>
  20 #include <linux/of_address.h>
  21 #include <linux/slab.h>
  22
  23 static DEFINE_SPINLOCK(mod1_lock);
  24
  25 #define SUN4I_MOD1_ENABLE       31
  26 #define SUN4I_MOD1_MUX          16
  27 #define SUN4I_MOD1_MUX_WIDTH    2
  28 #define SUN4I_MOD1_MAX_PARENTS  4
  29
  30 static void __init sun4i_mod1_clk_setup(struct device_node *node)
  31 {
  32         struct clk *clk;
  33         struct clk_mux *mux;
  34         struct clk_gate *gate;
  35         const char *parents[4];
  36         const char *clk_name = node->name;
  37         void __iomem *reg;
  38         int i;
  39
  40         reg = of_io_request_and_map(node, 0, of_node_full_name(node));
  41         if (IS_ERR(reg))
  42                 return;
  43
  44         mux = kzalloc(sizeof(*mux), GFP_KERNEL);
  45         if (!mux)
  46                 goto err_unmap;
  47
  48         gate = kzalloc(sizeof(*gate), GFP_KERNEL);
  49         if (!gate)
  50                 goto err_free_mux;
  51
  52         of_property_read_string(node, "clock-output-names", &clk_name);
  53         i = of_clk_parent_fill(node, parents, SUN4I_MOD1_MAX_PARENTS);
  54
  55         gate->reg = reg;
  56         gate->bit_idx = SUN4I_MOD1_ENABLE;
  57         gate->lock = &mod1_lock;
  58         mux->reg = reg;
  59         mux->shift = SUN4I_MOD1_MUX;
  60         mux->mask = BIT(SUN4I_MOD1_MUX_WIDTH) - 1;
  61         mux->lock = &mod1_lock;
  62
  63         clk = clk_register_composite(NULL, clk_name, parents, i,
  64                                      &mux->hw, &clk_mux_ops,
  65                                      NULL, NULL,
  66                                      &gate->hw, &clk_gate_ops, CLK_SET_RATE_PARENT);
  67         if (IS_ERR(clk))
  68                 goto err_free_gate;
  69
  70         of_clk_add_provider(node, of_clk_src_simple_get, clk);
  71
  72         return;
  73
  74 err_free_gate:
  75         kfree(gate);
  76 err_free_mux:
  77         kfree(mux);
  78 err_unmap:
  79         iounmap(reg);
  80 }
  81 CLK_OF_DECLARE(sun4i_mod1, "allwinner,sun4i-a10-mod1-clk",
  82                sun4i_mod1_clk_setup);