drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.c

   1 /*
   2  * Copyright (c) 2013-2015, Linux Foundation. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 and
   6  * only version 2 as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  */
  14
  15 #include "phy-qcom-ufs-qmp-14nm.h"
  16
  17 #define UFS_PHY_NAME "ufs_phy_qmp_14nm"
  18 #define UFS_PHY_VDDA_PHY_UV     (925000)
  19
  20 static
  21 int ufs_qcom_phy_qmp_14nm_phy_calibrate(struct ufs_qcom_phy *ufs_qcom_phy,
  22                                         bool is_rate_B)
  23 {
  24         int tbl_size_A = ARRAY_SIZE(phy_cal_table_rate_A);
  25         int tbl_size_B = ARRAY_SIZE(phy_cal_table_rate_B);
  26         int err;
  27
  28         err = ufs_qcom_phy_calibrate(ufs_qcom_phy, phy_cal_table_rate_A,
  29                 tbl_size_A, phy_cal_table_rate_B, tbl_size_B, is_rate_B);
  30
  31         if (err)
  32                 dev_err(ufs_qcom_phy->dev,
  33                         "%s: ufs_qcom_phy_calibrate() failed %d\n",
  34                         __func__, err);
  35         return err;
  36 }
  37
  38 static
  39 void ufs_qcom_phy_qmp_14nm_advertise_quirks(struct ufs_qcom_phy *phy_common)
  40 {
  41         phy_common->quirks =
  42                 UFS_QCOM_PHY_QUIRK_HIBERN8_EXIT_AFTER_PHY_PWR_COLLAPSE;
  43 }
  44
  45 static
  46 int ufs_qcom_phy_qmp_14nm_set_mode(struct phy *generic_phy,
  47                                    enum phy_mode mode, int submode)
  48 {
  49         struct ufs_qcom_phy *phy_common = get_ufs_qcom_phy(generic_phy);
  50
  51         phy_common->mode = PHY_MODE_INVALID;
  52
  53         if (mode > 0)
  54                 phy_common->mode = mode;
  55
  56         return 0;
  57 }
  58
  59 static
  60 void ufs_qcom_phy_qmp_14nm_power_control(struct ufs_qcom_phy *phy, bool val)
  61 {
  62         writel_relaxed(val ? 0x1 : 0x0, phy->mmio + UFS_PHY_POWER_DOWN_CONTROL);
  63         /*
  64          * Before any transactions involving PHY, ensure PHY knows
  65          * that it's analog rail is powered ON (or OFF).
  66          */
  67         mb();
  68 }
  69
  70 static inline
  71 void ufs_qcom_phy_qmp_14nm_set_tx_lane_enable(struct ufs_qcom_phy *phy, u32 val)
  72 {
  73         /*
  74          * 14nm PHY does not have TX_LANE_ENABLE register.
  75          * Implement this function so as not to propagate error to caller.
  76          */
  77 }
  78
  79 static inline void ufs_qcom_phy_qmp_14nm_start_serdes(struct ufs_qcom_phy *phy)
  80 {
  81         u32 tmp;
  82
  83         tmp = readl_relaxed(phy->mmio + UFS_PHY_PHY_START);
  84         tmp &= ~MASK_SERDES_START;
  85         tmp |= (1 << OFFSET_SERDES_START);
  86         writel_relaxed(tmp, phy->mmio + UFS_PHY_PHY_START);
  87         /* Ensure register value is committed */
  88         mb();
  89 }
  90
  91 static int ufs_qcom_phy_qmp_14nm_is_pcs_ready(struct ufs_qcom_phy *phy_common)
  92 {
  93         int err = 0;
  94         u32 val;
  95
  96         err = readl_poll_timeout(phy_common->mmio + UFS_PHY_PCS_READY_STATUS,
  97                 val, (val & MASK_PCS_READY), 10, 1000000);
  98         if (err)
  99                 dev_err(phy_common->dev, "%s: poll for pcs failed err = %d\n",
 100                         __func__, err);
 101         return err;
 102 }
 103
 104 static const struct phy_ops ufs_qcom_phy_qmp_14nm_phy_ops = {
 105         .power_on       = ufs_qcom_phy_power_on,
 106         .power_off      = ufs_qcom_phy_power_off,
 107         .set_mode       = ufs_qcom_phy_qmp_14nm_set_mode,
 108         .owner          = THIS_MODULE,
 109 };
 110
 111 static struct ufs_qcom_phy_specific_ops phy_14nm_ops = {
 112         .calibrate              = ufs_qcom_phy_qmp_14nm_phy_calibrate,
 113         .start_serdes           = ufs_qcom_phy_qmp_14nm_start_serdes,
 114         .is_physical_coding_sublayer_ready = ufs_qcom_phy_qmp_14nm_is_pcs_ready,
 115         .set_tx_lane_enable     = ufs_qcom_phy_qmp_14nm_set_tx_lane_enable,
 116         .power_control          = ufs_qcom_phy_qmp_14nm_power_control,
 117 };
 118
 119 static int ufs_qcom_phy_qmp_14nm_probe(struct platform_device *pdev)
 120 {
 121         struct device *dev = &pdev->dev;
 122         struct phy *generic_phy;
 123         struct ufs_qcom_phy_qmp_14nm *phy;
 124         struct ufs_qcom_phy *phy_common;
 125         int err = 0;
 126
 127         phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
 128         if (!phy) {
 129                 err = -ENOMEM;
 130                 goto out;
 131         }
 132         phy_common = &phy->common_cfg;
 133
 134         generic_phy = ufs_qcom_phy_generic_probe(pdev, phy_common,
 135                                 &ufs_qcom_phy_qmp_14nm_phy_ops, &phy_14nm_ops);
 136
 137         if (!generic_phy) {
 138                 err = -EIO;
 139                 goto out;
 140         }
 141
 142         err = ufs_qcom_phy_init_clks(phy_common);
 143         if (err)
 144                 goto out;
 145
 146         err = ufs_qcom_phy_init_vregulators(phy_common);
 147         if (err)
 148                 goto out;
 149
 150         phy_common->vdda_phy.max_uV = UFS_PHY_VDDA_PHY_UV;
 151         phy_common->vdda_phy.min_uV = UFS_PHY_VDDA_PHY_UV;
 152
 153         ufs_qcom_phy_qmp_14nm_advertise_quirks(phy_common);
 154
 155         phy_set_drvdata(generic_phy, phy);
 156
 157         strlcpy(phy_common->name, UFS_PHY_NAME, sizeof(phy_common->name));
 158
 159 out:
 160         return err;
 161 }
 162
 163 static const struct of_device_id ufs_qcom_phy_qmp_14nm_of_match[] = {
 164         {.compatible = "qcom,ufs-phy-qmp-14nm"},
 165         {.compatible = "qcom,msm8996-ufs-phy-qmp-14nm"},
 166         {},
 167 };
 168 MODULE_DEVICE_TABLE(of, ufs_qcom_phy_qmp_14nm_of_match);
 169
 170 static struct platform_driver ufs_qcom_phy_qmp_14nm_driver = {
 171         .probe = ufs_qcom_phy_qmp_14nm_probe,
 172         .driver = {
 173                 .of_match_table = ufs_qcom_phy_qmp_14nm_of_match,
 174                 .name = "ufs_qcom_phy_qmp_14nm",
 175         },
 176 };
 177
 178 module_platform_driver(ufs_qcom_phy_qmp_14nm_driver);
 179
 180 MODULE_DESCRIPTION("Universal Flash Storage (UFS) QCOM PHY QMP 14nm");
 181 MODULE_LICENSE("GPL v2");