drivers/platform/x86/intel_int0002_vgpio.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Intel INT0002 "Virtual GPIO" driver
   4  *
   5  * Copyright (C) 2017 Hans de Goede <hdegoede@redhat.com>
   6  *
   7  * Loosely based on android x86 kernel code which is:
   8  *
   9  * Copyright (c) 2014, Intel Corporation.
  10  *
  11  * Author: Dyut Kumar Sil <dyut.k.sil@intel.com>
  12  *
  13  * Some peripherals on Bay Trail and Cherry Trail platforms signal a Power
  14  * Management Event (PME) to the Power Management Controller (PMC) to wakeup
  15  * the system. When this happens software needs to clear the PME bus 0 status
  16  * bit in the GPE0a_STS register to avoid an IRQ storm on IRQ 9.
  17  *
  18  * This is modelled in ACPI through the INT0002 ACPI device, which is
  19  * called a "Virtual GPIO controller" in ACPI because it defines the event
  20  * handler to call when the PME triggers through _AEI and _L02 / _E02
  21  * methods as would be done for a real GPIO interrupt in ACPI. Note this
  22  * is a hack to define an AML event handler for the PME while using existing
  23  * ACPI mechanisms, this is not a real GPIO at all.
  24  *
  25  * This driver will bind to the INT0002 device, and register as a GPIO
  26  * controller, letting gpiolib-acpi.c call the _L02 handler as it would
  27  * for a real GPIO controller.
  28  */
  29
  30 #include <linux/acpi.h>
  31 #include <linux/bitmap.h>
  32 #include <linux/gpio/driver.h>
  33 #include <linux/interrupt.h>
  34 #include <linux/io.h>
  35 #include <linux/kernel.h>
  36 #include <linux/module.h>
  37 #include <linux/platform_device.h>
  38 #include <linux/slab.h>
  39 #include <linux/suspend.h>
  40
  41 #include <asm/cpu_device_id.h>
  42 #include <asm/intel-family.h>
  43
  44 #define DRV_NAME                        "INT0002 Virtual GPIO"
  45
  46 /* For some reason the virtual GPIO pin tied to the GPE is numbered pin 2 */
  47 #define GPE0A_PME_B0_VIRT_GPIO_PIN      2
  48
  49 #define GPE0A_PME_B0_STS_BIT            BIT(13)
  50 #define GPE0A_PME_B0_EN_BIT             BIT(13)
  51 #define GPE0A_STS_PORT                  0x420
  52 #define GPE0A_EN_PORT                   0x428
  53
  54 #define BAYTRAIL                        0x01
  55 #define CHERRYTRAIL                     0x02
  56
  57 #define ICPU(model, data) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, data }
  58
  59 static const struct x86_cpu_id int0002_cpu_ids[] = {
  60         ICPU(INTEL_FAM6_ATOM_SILVERMONT, BAYTRAIL), /* Valleyview, Bay Trail  */
  61         ICPU(INTEL_FAM6_ATOM_AIRMONT, CHERRYTRAIL), /* Braswell, Cherry Trail */
  62         {}
  63 };
  64
  65 /*
  66  * As this is not a real GPIO at all, but just a hack to model an event in
  67  * ACPI the get / set functions are dummy functions.
  68  */
  69
  70 static int int0002_gpio_get(struct gpio_chip *chip, unsigned int offset)
  71 {
  72         return 0;
  73 }
  74
  75 static void int0002_gpio_set(struct gpio_chip *chip, unsigned int offset,
  76                              int value)
  77 {
  78 }
  79
  80 static int int0002_gpio_direction_output(struct gpio_chip *chip,
  81                                          unsigned int offset, int value)
  82 {
  83         return 0;
  84 }
  85
  86 static void int0002_irq_ack(struct irq_data *data)
  87 {
  88         outl(GPE0A_PME_B0_STS_BIT, GPE0A_STS_PORT);
  89 }
  90
  91 static void int0002_irq_unmask(struct irq_data *data)
  92 {
  93         u32 gpe_en_reg;
  94
  95         gpe_en_reg = inl(GPE0A_EN_PORT);
  96         gpe_en_reg |= GPE0A_PME_B0_EN_BIT;
  97         outl(gpe_en_reg, GPE0A_EN_PORT);
  98 }
  99
 100 static void int0002_irq_mask(struct irq_data *data)
 101 {
 102         u32 gpe_en_reg;
 103
 104         gpe_en_reg = inl(GPE0A_EN_PORT);
 105         gpe_en_reg &= ~GPE0A_PME_B0_EN_BIT;
 106         outl(gpe_en_reg, GPE0A_EN_PORT);
 107 }
 108
 109 static int int0002_irq_set_wake(struct irq_data *data, unsigned int on)
 110 {
 111         struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
 112         struct platform_device *pdev = to_platform_device(chip->parent);
 113         int irq = platform_get_irq(pdev, 0);
 114
 115         /* Propagate to parent irq */
 116         if (on)
 117                 enable_irq_wake(irq);
 118         else
 119                 disable_irq_wake(irq);
 120
 121         return 0;
 122 }
 123
 124 static irqreturn_t int0002_irq(int irq, void *data)
 125 {
 126         struct gpio_chip *chip = data;
 127         u32 gpe_sts_reg;
 128
 129         gpe_sts_reg = inl(GPE0A_STS_PORT);
 130         if (!(gpe_sts_reg & GPE0A_PME_B0_STS_BIT))
 131                 return IRQ_NONE;
 132
 133         generic_handle_irq(irq_find_mapping(chip->irq.domain,
 134                                             GPE0A_PME_B0_VIRT_GPIO_PIN));
 135
 136         pm_system_wakeup();
 137
 138         return IRQ_HANDLED;
 139 }
 140
 141 static struct irq_chip int0002_byt_irqchip = {
 142         .name                   = DRV_NAME,
 143         .irq_ack                = int0002_irq_ack,
 144         .irq_mask               = int0002_irq_mask,
 145         .irq_unmask             = int0002_irq_unmask,
 146         .irq_set_wake           = int0002_irq_set_wake,
 147 };
 148
 149 static struct irq_chip int0002_cht_irqchip = {
 150         .name                   = DRV_NAME,
 151         .irq_ack                = int0002_irq_ack,
 152         .irq_mask               = int0002_irq_mask,
 153         .irq_unmask             = int0002_irq_unmask,
 154         /*
 155          * No set_wake, on CHT the IRQ is typically shared with the ACPI SCI
 156          * and we don't want to mess with the ACPI SCI irq settings.
 157          */
 158 };
 159
 160 static int int0002_probe(struct platform_device *pdev)
 161 {
 162         struct device *dev = &pdev->dev;
 163         const struct x86_cpu_id *cpu_id;
 164         struct irq_chip *irq_chip;
 165         struct gpio_chip *chip;
 166         int irq, ret;
 167
 168         /* Menlow has a different INT0002 device? <sigh> */
 169         cpu_id = x86_match_cpu(int0002_cpu_ids);
 170         if (!cpu_id)
 171                 return -ENODEV;
 172
 173         irq = platform_get_irq(pdev, 0);
 174         if (irq < 0) {
 175                 dev_err(dev, "Error getting IRQ: %d\n", irq);
 176                 return irq;
 177         }
 178
 179         chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
 180         if (!chip)
 181                 return -ENOMEM;
 182
 183         chip->label = DRV_NAME;
 184         chip->parent = dev;
 185         chip->owner = THIS_MODULE;
 186         chip->get = int0002_gpio_get;
 187         chip->set = int0002_gpio_set;
 188         chip->direction_input = int0002_gpio_get;
 189         chip->direction_output = int0002_gpio_direction_output;
 190         chip->base = -1;
 191         chip->ngpio = GPE0A_PME_B0_VIRT_GPIO_PIN + 1;
 192         chip->irq.need_valid_mask = true;
 193
 194         ret = devm_gpiochip_add_data(&pdev->dev, chip, NULL);
 195         if (ret) {
 196                 dev_err(dev, "Error adding gpio chip: %d\n", ret);
 197                 return ret;
 198         }
 199
 200         bitmap_clear(chip->irq.valid_mask, 0, GPE0A_PME_B0_VIRT_GPIO_PIN);
 201
 202         /*
 203          * We manually request the irq here instead of passing a flow-handler
 204          * to gpiochip_set_chained_irqchip, because the irq is shared.
 205          */
 206         ret = devm_request_irq(dev, irq, int0002_irq,
 207                                IRQF_SHARED, "INT0002", chip);
 208         if (ret) {
 209                 dev_err(dev, "Error requesting IRQ %d: %d\n", irq, ret);
 210                 return ret;
 211         }
 212
 213         if (cpu_id->driver_data == BAYTRAIL)
 214                 irq_chip = &int0002_byt_irqchip;
 215         else
 216                 irq_chip = &int0002_cht_irqchip;
 217
 218         ret = gpiochip_irqchip_add(chip, irq_chip, 0, handle_edge_irq,
 219                                    IRQ_TYPE_NONE);
 220         if (ret) {
 221                 dev_err(dev, "Error adding irqchip: %d\n", ret);
 222                 return ret;
 223         }
 224
 225         gpiochip_set_chained_irqchip(chip, irq_chip, irq, NULL);
 226
 227         return 0;
 228 }
 229
 230 static const struct acpi_device_id int0002_acpi_ids[] = {
 231         { "INT0002", 0 },
 232         { },
 233 };
 234 MODULE_DEVICE_TABLE(acpi, int0002_acpi_ids);
 235
 236 static struct platform_driver int0002_driver = {
 237         .driver = {
 238                 .name                   = DRV_NAME,
 239                 .acpi_match_table       = int0002_acpi_ids,
 240         },
 241         .probe  = int0002_probe,
 242 };
 243
 244 module_platform_driver(int0002_driver);
 245
 246 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
 247 MODULE_DESCRIPTION("Intel INT0002 Virtual GPIO driver");
 248 MODULE_LICENSE("GPL v2");